11 static u8 xec_mask	 = 0xf;
72 	"PFB valid bit parity error",			/* xec = 0xd */
73 	"Microcode Patch Buffer",			/* xec = 010 */
82 	"Fill ECC error on data fills",			/* xec = 0x4 */
91 	"L2 Tag ECC error",				/* xec = 0x10 */
114 	"L3 data cache ECC error",			/* xec = 0x1c */
157 	"System Read Data Error Thread 0",
207 	"BPQ Thread 0 Snoop Parity Error",
337 	"Instruction Cache Bank 0 ECC or parity error",
339 	"Instruction Tag Ram 0 parity error",
341 	"Data Cache Bank 0 ECC or parity error",
345 	"Data Tag Bank 0 parity error",
350 	"TLB Bank 0 parity error",
431 static bool f12h_mc0_mce(u16 ec, u8 xec)  in f12h_mc0_mce()  argument
449 static bool f10h_mc0_mce(u16 ec, u8 xec)  in f10h_mc0_mce()  argument
455 	return f12h_mc0_mce(ec, xec);  in f10h_mc0_mce()
458 static bool k8_mc0_mce(u16 ec, u8 xec)  in k8_mc0_mce()  argument
465 	return f10h_mc0_mce(ec, xec);  in k8_mc0_mce()
468 static bool cat_mc0_mce(u16 ec, u8 xec)  in cat_mc0_mce()  argument
520 static bool f15h_mc0_mce(u16 ec, u8 xec)  in f15h_mc0_mce()  argument
526 		switch (xec) {  in f15h_mc0_mce()
527 		case 0x0:  in f15h_mc0_mce()
531 		case 0x1:  in f15h_mc0_mce()
535 		case 0x2:  in f15h_mc0_mce()
536 		case 0x11:  in f15h_mc0_mce()
540 		case 0x3:  in f15h_mc0_mce()
544 		case 0x10:  in f15h_mc0_mce()
548 		case 0x12:  in f15h_mc0_mce()
557 		if (!xec)  in f15h_mc0_mce()
560 			pr_cont(" Internal error condition type %d.\n", xec);  in f15h_mc0_mce()
562 		if (xec <= 0x1f)  in f15h_mc0_mce()
576 	u8 xec = XEC(m->status, xec_mask);  in decode_mc0_mce()  local
584 				((xec == 2) ? "locked miss"  in decode_mc0_mce()
585 					    : (xec ? "multimatch" : "parity")));  in decode_mc0_mce()
588 	} else if (fam_ops.mc0_mce(ec, xec))  in decode_mc0_mce()
594 static bool k8_mc1_mce(u16 ec, u8 xec)  in k8_mc1_mce()  argument
602 	if (ll == 0x2)  in k8_mc1_mce()
604 	else if (ll == 0x1) {  in k8_mc1_mce()
628 static bool cat_mc1_mce(u16 ec, u8 xec)  in cat_mc1_mce()  argument
643 	else if (xec == 0x0)  in cat_mc1_mce()
645 	else if (xec == 0x2)  in cat_mc1_mce()
653 static bool f15h_mc1_mce(u16 ec, u8 xec)  in f15h_mc1_mce()  argument
660 	switch (xec) {  in f15h_mc1_mce()
661 	case 0x0 ... 0xa:  in f15h_mc1_mce()
662 		pr_cont("%s.\n", f15h_mc1_mce_desc[xec]);  in f15h_mc1_mce()
665 	case 0xd:  in f15h_mc1_mce()
666 		pr_cont("%s.\n", f15h_mc1_mce_desc[xec-2]);  in f15h_mc1_mce()
669 	case 0x10:  in f15h_mc1_mce()
670 		pr_cont("%s.\n", f15h_mc1_mce_desc[xec-4]);  in f15h_mc1_mce()
673 	case 0x11 ... 0x15:  in f15h_mc1_mce()
674 		pr_cont("Decoder %s parity error.\n", f15h_mc1_mce_desc[xec-4]);  in f15h_mc1_mce()
686 	u8 xec = XEC(m->status, xec_mask);  in decode_mc1_mce()  local
692 			(xec ? "multimatch" : "parity error"));  in decode_mc1_mce()
694 		bool k8 = (boot_cpu_data.x86 == 0xf && (m->status & BIT_64(58)));  in decode_mc1_mce()
698 		if (xec <= 0x3f)  in decode_mc1_mce()
702 	} else if (fam_ops.mc1_mce(ec, xec))  in decode_mc1_mce()
713 static bool k8_mc2_mce(u16 ec, u8 xec)  in k8_mc2_mce()  argument
717 	if (xec == 0x1)  in k8_mc2_mce()
719 	else if (xec == 0x3)  in k8_mc2_mce()
721 	else if (xec == 0x2 && MEM_ERROR(ec))  in k8_mc2_mce()
723 	else if (xec == 0x0) {  in k8_mc2_mce()
733 			if (r4 >= 0x7)  in k8_mc2_mce()
736 			else if (r4 <= 0x1)  in k8_mc2_mce()
749 static bool f15h_mc2_mce(u16 ec, u8 xec)  in f15h_mc2_mce()  argument
754 		if (xec == 0x0)  in f15h_mc2_mce()
756 		else if (xec == 0x1)  in f15h_mc2_mce()
761 		if (xec > 2)  in f15h_mc2_mce()
766 		switch (xec) {  in f15h_mc2_mce()
767 		case 0x4 ... 0xc:  in f15h_mc2_mce()
768 			pr_cont("%s.\n", f15h_mc2_mce_desc[xec - 0x4]);  in f15h_mc2_mce()
771 		case 0x10 ... 0x14:  in f15h_mc2_mce()
772 			pr_cont("%s.\n", f15h_mc2_mce_desc[xec - 0x7]);  in f15h_mc2_mce()
779 		if (xec <= 0x3f)  in f15h_mc2_mce()
788 static bool f16h_mc2_mce(u16 ec, u8 xec)  in f16h_mc2_mce()  argument
795 	switch (xec) {  in f16h_mc2_mce()
796 	case 0x04 ... 0x05:  in f16h_mc2_mce()
800 	case 0x09 ... 0x0b:  in f16h_mc2_mce()
801 	case 0x0d ... 0x0f:  in f16h_mc2_mce()
807 	case 0x10 ... 0x19:  in f16h_mc2_mce()
808 	case 0x1b:  in f16h_mc2_mce()
810 			(((r4 == R4_RD) && !(xec & 0x3)) ? "Hit"  :  in f16h_mc2_mce()
815 	case 0x1c ... 0x1d:  in f16h_mc2_mce()
816 	case 0x1f:  in f16h_mc2_mce()
832 	u8 xec = XEC(m->status, xec_mask);  in decode_mc2_mce()  local
836 	if (!fam_ops.mc2_mce(ec, xec))  in decode_mc2_mce()
843 	u8 xec = XEC(m->status, xec_mask);  in decode_mc3_mce()  local
845 	if (boot_cpu_data.x86 >= 0x14) {  in decode_mc3_mce()
853 	if (xec == 0x0) {  in decode_mc3_mce()
874 	u8 xec = XEC(m->status, 0x1f);  in decode_mc4_mce()  local
875 	u8 offset = 0;  in decode_mc4_mce()
879 	switch (xec) {  in decode_mc4_mce()
880 	case 0x0 ... 0xe:  in decode_mc4_mce()
883 		if (xec == 0x0 || xec == 0x8) {  in decode_mc4_mce()
885 			if (fam == 0x11)  in decode_mc4_mce()
888 			pr_cont("%s.\n", mc4_mce_desc[xec]);  in decode_mc4_mce()
896 	case 0xf:  in decode_mc4_mce()
905 	case 0x19:  in decode_mc4_mce()
906 		if (fam == 0x15 || fam == 0x16)  in decode_mc4_mce()
912 	case 0x1c ... 0x1f:  in decode_mc4_mce()
920 	pr_cont("%s.\n", mc4_mce_desc[xec - offset]);  in decode_mc4_mce()
931 	u8 xec = XEC(m->status, xec_mask);  in decode_mc5_mce()  local
933 	if (fam == 0xf || fam == 0x11)  in decode_mc5_mce()
939 		if (xec <= 0x1f) {  in decode_mc5_mce()
946 	if (xec == 0x0 || xec == 0xc)  in decode_mc5_mce()
947 		pr_cont("%s.\n", mc5_mce_desc[xec]);  in decode_mc5_mce()
948 	else if (xec <= 0xd)  in decode_mc5_mce()
949 		pr_cont("%s parity error.\n", mc5_mce_desc[xec]);  in decode_mc5_mce()
961 	u8 xec = XEC(m->status, xec_mask);  in decode_mc6_mce()  local
965 	if (xec > 0x5)  in decode_mc6_mce()
968 	pr_cont("%s parity error.\n", mc6_mce_desc[xec]);  in decode_mc6_mce()
981 	u8 xec = XEC(m->status, xec_mask);  in decode_smca_error()  local
999 	pr_emerg(HW_ERR "%s Ext. Error Code: %d", ip_name, xec);  in decode_smca_error()
1002 	if (xec < smca_mce_descs[bank_type].num_descs)  in decode_smca_error()
1003 		pr_cont(", %s.\n", smca_mce_descs[bank_type].descs[xec]);  in decode_smca_error()
1005 	if (bank_type == SMCA_UMC && xec == 0 && decode_dram_ecc)  in decode_smca_error()
1084 	ecc = (m->status >> 45) & 0x3;  in amd_decode_mce()
1088 	if (fam >= 0x15) {  in amd_decode_mce()
1092 		if (fam != 0x15 || m->bank != 4)  in amd_decode_mce()
1096 	if (fam >= 0x17)  in amd_decode_mce()
1099 	pr_cont("]: 0x%016llx\n", m->status);  in amd_decode_mce()
1102 		pr_emerg(HW_ERR "Error Addr: 0x%016llx\n", m->addr);  in amd_decode_mce()
1105 		pr_emerg(HW_ERR "PPIN: 0x%016llx\n", m->ppin);  in amd_decode_mce()
1108 		pr_emerg(HW_ERR "IPID: 0x%016llx", m->ipid);  in amd_decode_mce()
1111 			pr_cont(", Syndrome: 0x%016llx", m->synd);  in amd_decode_mce()
1127 	case 0:  in amd_decode_mce()
1160 	amd_decode_err_code(m->status & 0xffff);  in amd_decode_mce()
1183 		xec_mask = 0x3f;  in mce_amd_init()
1188 	case 0xf:  in mce_amd_init()
1194 	case 0x10:  in mce_amd_init()
1200 	case 0x11:  in mce_amd_init()
1206 	case 0x12:  in mce_amd_init()
1212 	case 0x14:  in mce_amd_init()
1218 	case 0x15:  in mce_amd_init()
1219 		xec_mask = c->x86_model == 0x60 ? 0x3f : 0x1f;  in mce_amd_init()
1226 	case 0x16:  in mce_amd_init()
1227 		xec_mask = 0x1f;  in mce_amd_init()
1233 	case 0x17:  in mce_amd_init()
1234 	case 0x18:  in mce_amd_init()
1239 		printk(KERN_WARNING "Huh? What family is it: 0x%x?!\n", c->x86);  in mce_amd_init()
1248 	return 0;  in mce_amd_init()