Lines Matching +full:packet +full:- +full:processor
1 /* SPDX-License-Identifier: BSD-3-Clause */
9 * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/
54 /* PSI-L requests */
74 /* Processor Control requests */
83 * struct ti_sci_msg_hdr - Generic Message Header for All messages and responses
104 * struct ti_sci_msg_resp_version - Response for a message
126 * struct ti_sci_msg_req_reboot - Reboot the SoC
137 * struct ti_sci_msg_req_set_device_state - Set the desired state of the device
144 * + MSG_FLAG_DEVICE_WAKE_ENABLED - Configure the device to be a wake source.
148 * + MSG_FLAG_DEVICE_RESET_ISO - Enable reset isolation for this device.
149 * + MSG_FLAG_DEVICE_EXCLUSIVE - Claim this device exclusively. When passed
159 /* Additional hdr->flags options */
174 * struct ti_sci_msg_req_get_device_state - Request to get device.
187 * struct ti_sci_msg_resp_get_device_state - Response to get device request.
194 * - Uses the MSG_DEVICE_SW_* macros
211 * struct ti_sci_msg_req_set_device_resets - Set the desired resets
230 * struct ti_sci_msg_req_set_clock_state - Request to setup a Clock state
238 * is only applicable to clock inputs on the SoC pseudo-device.
267 /* Additional hdr->flags options */
282 * struct ti_sci_msg_req_get_clock_state - Request for clock state
304 * struct ti_sci_msg_resp_get_clock_state - Response to get clock state
323 * struct ti_sci_msg_req_set_clock_parent - Set the clock parent
349 * struct ti_sci_msg_req_get_clock_parent - Get the clock parent
369 * struct ti_sci_msg_resp_get_clock_parent - Response with clock parent
385 * struct ti_sci_msg_req_get_clock_num_parents - Request to get clock parents
407 * struct ti_sci_msg_resp_get_clock_num_parents - Response for get clk parents
424 * struct ti_sci_msg_req_query_clock_freq - Request to query a frequency
458 * struct ti_sci_msg_resp_query_clock_freq - Response to a clock frequency query
471 * struct ti_sci_msg_req_set_clock_freq - Request to setup a clock frequency
496 * Calling set frequency on a clock input to the SoC pseudo-device will
500 * Calling set frequency on clock outputs from the SoC pseudo-device will
517 * struct ti_sci_msg_req_get_clock_freq - Request to get the clock frequency
538 * struct ti_sci_msg_resp_get_clock_freq - Response of clock frequency request
552 * struct ti_sci_msg_req_get_resource_range - Request to get a host's assigned
575 * struct ti_sci_msg_resp_get_resource_range - Response to resource get range.
589 * struct ti_sci_msg_req_manage_irq - Request to configure/release the route
596 * 0 - Valid bit for @dst_id
597 * 1 - Valid bit for @dst_host_irq
598 * 2 - Valid bit for @ia_id
599 * 3 - Valid bit for @vint
600 * 4 - Valid bit for @global_event
601 * 5 - Valid bit for @vint_status_bit_index
602 * 31 - Valid bit for @secondary_host
606 * IRQ controller or host processor ID.
645 * struct ti_sci_msg_rm_ring_cfg_req - Configure a Navigator Subsystem ring
647 * Configures the non-real-time registers of a Navigator Subsystem ring.
653 * 0 - Valid bit for @tisci_msg_rm_ring_cfg_req addr_lo
654 * 1 - Valid bit for @tisci_msg_rm_ring_cfg_req addr_hi
655 * 2 - Valid bit for @tisci_msg_rm_ring_cfg_req count
656 * 3 - Valid bit for @tisci_msg_rm_ring_cfg_req mode
657 * 4 - Valid bit for @tisci_msg_rm_ring_cfg_req size
658 * 5 - Valid bit for @tisci_msg_rm_ring_cfg_req order_id
669 * the formula (log2(size_bytes) - 2), where size_bytes cannot be
687 * struct ti_sci_msg_rm_ring_get_cfg_req - Get RA ring's configuration
689 * Gets the configuration of the non-real-time register fields of a ring. The
691 * host. The values of the non-real-time registers are returned in
705 * struct ti_sci_msg_rm_ring_get_cfg_resp - Ring get configuration response
707 * Response received by host processor after RM has handled
709 * non-real-time register values.
730 * struct ti_sci_msg_psil_pair - Pairs a PSI-L source thread to a destination
733 * @nav_id: SoC Navigator Subsystem device ID whose PSI-L config proxy is
735 * @src_thread: PSI-L source thread ID within the PSI-L System thread map.
741 * @dst_thread: PSI-L destination thread ID within the PSI-L System thread map.
742 * PSI-L destination threads start at index 0x8000. The request is NACK'd if
760 * struct ti_sci_msg_psil_unpair - Unpairs a PSI-L source thread from a
763 * @nav_id: SoC Navigator Subsystem device ID whose PSI-L config proxy is
765 * @src_thread: PSI-L source thread ID within the PSI-L System thread map.
770 * @dst_thread: PSI-L destination thread ID within the PSI-L System thread map.
771 * PSI-L destination threads start at index 0x8000. The request is NACK'd if
788 * struct ti_sci_msg_udmap_rx_flow_cfg - UDMAP receive flow configuration
793 * @flow_index: UDMAP receive flow index for non-optional configuration.
795 * @rx_einfo_present: UDMAP receive flow extended packet info present.
801 * @rx_sop_offset: UDMAP receive flow start of packet offset.
804 * 0 - end of packet descriptor
805 * 1 - Beginning of the data buffer
814 * @rx_size_thresh_en: UDMAP receive flow packet size based free buffer queue
852 * struct rm_ti_sci_msg_udmap_rx_flow_opt_cfg - parameters for UDMAP receive
859 * @rx_size_thresh0: UDMAP receive flow packet size threshold 0.
860 * @rx_size_thresh1: UDMAP receive flow packet size threshold 1.
861 * @rx_size_thresh2: UDMAP receive flow packet size threshold 2.
887 * Configures the non-real-time registers of a Navigator Subsystem UDMAP
898 * 0 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_pause_on_err
899 * 1 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_atype
900 * 2 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_chan_type
901 * 3 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_fetch_size
902 * 4 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::txcq_qnum
903 * 5 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_priority
904 * 6 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_qos
905 * 7 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_orderid
906 * 8 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_sched_priority
907 * 9 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_filt_einfo
908 * 10 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_filt_pswords
909 * 11 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_supr_tdpkt
910 * 12 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_credit_count
911 * 13 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::fdepth
912 * 14 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_burst_size
922 * @tx_filt_einfo: UDMAP transmit channel extended packet information passing
938 * @tx_supr_tdpkt: UDMAP transmit channel teardown packet generation suppression
942 * @tx_fetch_size: UDMAP transmit channel number of 32-bit descriptor words to
1002 * Configures the non-real-time registers of a Navigator Subsystem UDMAP
1014 * 0 - Valid bit for @ti_sci_msg_rm_udmap_rx_ch_cfg_req::rx_pause_on_err
1015 * 1 - Valid bit for @ti_sci_msg_rm_udmap_rx_ch_cfg_req::rx_atype
1016 * 2 - Valid bit for @ti_sci_msg_rm_udmap_rx_ch_cfg_req::rx_chan_type
1017 * 3 - Valid bit for @ti_sci_msg_rm_udmap_rx_ch_cfg_req::rx_fetch_size
1018 * 4 - Valid bit for @ti_sci_msg_rm_udmap_rx_ch_cfg_req::rxcq_qnum
1019 * 5 - Valid bit for @ti_sci_msg_rm_udmap_rx_ch_cfg_req::rx_priority
1020 * 6 - Valid bit for @ti_sci_msg_rm_udmap_rx_ch_cfg_req::rx_qos
1021 * 7 - Valid bit for @ti_sci_msg_rm_udmap_rx_ch_cfg_req::rx_orderid
1022 * 8 - Valid bit for @ti_sci_msg_rm_udmap_rx_ch_cfg_req::rx_sched_priority
1023 * 9 - Valid bit for @ti_sci_msg_rm_udmap_rx_ch_cfg_req::flowid_start
1024 * 10 - Valid bit for @ti_sci_msg_rm_udmap_rx_ch_cfg_req::flowid_cnt
1025 * 11 - Valid bit for @ti_sci_msg_rm_udmap_rx_ch_cfg_req::rx_ignore_short
1026 * 12 - Valid bit for @ti_sci_msg_rm_udmap_rx_ch_cfg_req::rx_ignore_long
1027 * 14 - Valid bit for @ti_sci_msg_rm_udmap_rx_ch_cfg_req::rx_burst_size
1033 * @rx_fetch_size: UDMAP receive channel number of 32-bit descriptor words to
1088 * @rx_ignore_short: UDMAP receive channel short packet treatment configuration
1091 * @rx_ignore_long: UDMAP receive channel long packet treatment configuration to
1122 * Configuration does not include the flow registers which handle size-based
1134 * 0 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_einfo_present
1135 * 1 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_psinfo_present
1136 * 2 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_error_handling
1137 * 3 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_desc_type
1138 * 4 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_sop_offset
1139 * 5 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_dest_qnum
1140 * 6 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_src_tag_hi
1141 * 7 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_src_tag_lo
1142 * 8 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_dest_tag_hi
1143 * 9 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_dest_tag_lo
1144 * 10 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_src_tag_hi_sel
1145 * 11 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_src_tag_lo_sel
1146 * 12 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_dest_tag_hi_sel
1147 * 13 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_dest_tag_lo_sel
1148 * 14 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_fdq0_sz0_qnum
1149 * 15 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_fdq1_sz0_qnum
1150 * 16 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_fdq2_sz0_qnum
1151 * 17 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_fdq3_sz0_qnum
1152 * 18 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_ps_location
1157 * @flow_index: UDMAP receive flow index for non-optional configuration.
1160 * UDMAP receive flow extended packet info present configuration to be
1176 * UDMAP receive flow start of packet offset configuration to be programmed
1179 * this field are 0-255 bytes.
1291 * struct ti_sci_msg_req_proc_request - Request a processor
1293 * @processor_id: ID of processor being requested
1304 * struct ti_sci_msg_req_proc_release - Release a processor
1306 * @processor_id: ID of processor being released
1317 * struct ti_sci_msg_req_proc_handover - Handover a processor to a host
1319 * @processor_id: ID of processor being handed over
1337 * struct ti_sci_msg_req_set_config - Set Processor boot configuration
1339 * @processor_id: ID of processor being configured
1342 * @config_flags_set: Optional Processor specific Config Flags to set.
1345 * @config_flags_clear: Optional Processor specific Config Flags to clear.
1362 * struct ti_sci_msg_req_set_ctrl - Set Processor boot control flags
1364 * @processor_id: ID of processor being configured
1365 * @control_flags_set: Optional Processor specific Control Flags to set.
1368 * @control_flags_clear:Optional Processor specific Control Flags to clear.
1383 * struct ti_sci_msg_req_get_status - Processor boot status request
1385 * @processor_id: ID of processor whose status is being requested
1396 * struct ti_sci_msg_resp_get_status - Processor boot status response
1398 * @processor_id: ID of processor whose status is returned
1401 * @config_flags: Optional Processor specific Config Flags set currently
1402 * @control_flags: Optional Processor specific Control Flags set currently
1403 * @status_flags: Optional Processor specific Status Flags set currently