1 // SPDX-License-Identifier: GPL-2.0
3  * FPGA to/from HPS Bridge Driver for Altera SoCFPGA Devices
5  *  Copyright (C) 2013-2016 Altera Corporation, All Rights Reserved.
8  *   fpga: altera-hps2fpga: fix HPS2FPGA bridge visibility to L3 masters
9  *   Signed-off-by: Anatolij Gustschin <agust@denx.de>
14  * processor system (HPS) and the embedded FPGA.
17  * allows for safe reprogramming of the FPGA, assuming that the new FPGA image
19  * reprogramming the FPGA and re-enabled after the FPGA has been programmed.
23 #include <linux/fpga/fpga-bridge.h>
49 static int alt_hps2fpga_enable_show(struct fpga_bridge *bridge)  in alt_hps2fpga_enable_show()  argument
51 	struct altera_hps2fpga_data *priv = bridge->priv;  in alt_hps2fpga_enable_show()
53 	return reset_control_status(priv->bridge_reset);  in alt_hps2fpga_enable_show()
66 	/* bring bridge out of reset */  in _alt_hps2fpga_enable_set()
68 		ret = reset_control_deassert(priv->bridge_reset);  in _alt_hps2fpga_enable_set()
70 		ret = reset_control_assert(priv->bridge_reset);  in _alt_hps2fpga_enable_set()
74 	/* Allow bridge to be visible to L3 masters or not */  in _alt_hps2fpga_enable_set()
75 	if (priv->remap_mask) {  in _alt_hps2fpga_enable_set()
80 			l3_remap_shadow |= priv->remap_mask;  in _alt_hps2fpga_enable_set()
82 			l3_remap_shadow &= ~priv->remap_mask;  in _alt_hps2fpga_enable_set()
84 		ret = regmap_write(priv->l3reg, ALT_L3_REMAP_OFST,  in _alt_hps2fpga_enable_set()
92 static int alt_hps2fpga_enable_set(struct fpga_bridge *bridge, bool enable)  in alt_hps2fpga_enable_set()  argument
94 	return _alt_hps2fpga_enable_set(bridge->priv, enable);  in alt_hps2fpga_enable_set()
117 	{ .compatible = "altr,socfpga-hps2fpga-bridge",
119 	{ .compatible = "altr,socfpga-lwhps2fpga-bridge",
121 	{ .compatible = "altr,socfpga-fpga2hps-bridge",
128 	struct device *dev = &pdev->dev;  in alt_fpga_bridge_probe()
138 		return -ENODEV;  in alt_fpga_bridge_probe()
141 	priv = (struct altera_hps2fpga_data *)of_id->data;  in alt_fpga_bridge_probe()
143 	priv->bridge_reset = of_reset_control_get_exclusive_by_index(dev->of_node,  in alt_fpga_bridge_probe()
145 	if (IS_ERR(priv->bridge_reset)) {  in alt_fpga_bridge_probe()
146 		dev_err(dev, "Could not get %s reset control\n", priv->name);  in alt_fpga_bridge_probe()
147 		return PTR_ERR(priv->bridge_reset);  in alt_fpga_bridge_probe()
150 	if (priv->remap_mask) {  in alt_fpga_bridge_probe()
151 		priv->l3reg = syscon_regmap_lookup_by_compatible("altr,l3regs");  in alt_fpga_bridge_probe()
152 		if (IS_ERR(priv->l3reg)) {  in alt_fpga_bridge_probe()
154 			return PTR_ERR(priv->l3reg);  in alt_fpga_bridge_probe()
158 	priv->clk = devm_clk_get(dev, NULL);  in alt_fpga_bridge_probe()
159 	if (IS_ERR(priv->clk)) {  in alt_fpga_bridge_probe()
161 		return PTR_ERR(priv->clk);  in alt_fpga_bridge_probe()
164 	ret = clk_prepare_enable(priv->clk);  in alt_fpga_bridge_probe()
167 		return -EBUSY;  in alt_fpga_bridge_probe()
170 	if (!of_property_read_u32(dev->of_node, "bridge-enable", &enable)) {  in alt_fpga_bridge_probe()
172 			dev_warn(dev, "invalid bridge-enable %u > 1\n", enable);  in alt_fpga_bridge_probe()
174 			dev_info(dev, "%s bridge\n",  in alt_fpga_bridge_probe()
183 	br = devm_fpga_bridge_create(dev, priv->name,  in alt_fpga_bridge_probe()
186 		ret = -ENOMEM;  in alt_fpga_bridge_probe()
199 	clk_disable_unprepare(priv->clk);  in alt_fpga_bridge_probe()
206 	struct fpga_bridge *bridge = platform_get_drvdata(pdev);  in alt_fpga_bridge_remove()  local
207 	struct altera_hps2fpga_data *priv = bridge->priv;  in alt_fpga_bridge_remove()
209 	fpga_bridge_unregister(bridge);  in alt_fpga_bridge_remove()
211 	clk_disable_unprepare(priv->clk);  in alt_fpga_bridge_remove()
229 MODULE_DESCRIPTION("Altera SoCFPGA HPS to FPGA Bridge");