9  *  ARM HDLCD Driver
43 	struct hdlcd_drm_private *hdlcd = drm->dev_private;  in hdlcd_load()  local
49 	hdlcd->clk = devm_clk_get(drm->dev, "pxlclk");  in hdlcd_load()
50 	if (IS_ERR(hdlcd->clk))  in hdlcd_load()
51 		return PTR_ERR(hdlcd->clk);  in hdlcd_load()
54 	atomic_set(&hdlcd->buffer_underrun_count, 0);  in hdlcd_load()
55 	atomic_set(&hdlcd->bus_error_count, 0);  in hdlcd_load()
56 	atomic_set(&hdlcd->vsync_count, 0);  in hdlcd_load()
57 	atomic_set(&hdlcd->dma_end_count, 0);  in hdlcd_load()
61 	hdlcd->mmio = devm_ioremap_resource(drm->dev, res);  in hdlcd_load()
62 	if (IS_ERR(hdlcd->mmio)) {  in hdlcd_load()
64 		ret = PTR_ERR(hdlcd->mmio);  in hdlcd_load()
65 		hdlcd->mmio = NULL;  in hdlcd_load()
69 	version = hdlcd_read(hdlcd, HDLCD_REG_VERSION);  in hdlcd_load()
74 	DRM_INFO("found ARM HDLCD version r%dp%d\n",  in hdlcd_load()
102 	drm_crtc_cleanup(&hdlcd->crtc);  in hdlcd_load()
128 	struct hdlcd_drm_private *hdlcd = drm->dev_private;  in hdlcd_irq()  local
131 	irq_status = hdlcd_read(hdlcd, HDLCD_REG_INT_STATUS);  in hdlcd_irq()
135 		atomic_inc(&hdlcd->buffer_underrun_count);  in hdlcd_irq()
138 		atomic_inc(&hdlcd->dma_end_count);  in hdlcd_irq()
141 		atomic_inc(&hdlcd->bus_error_count);  in hdlcd_irq()
144 		atomic_inc(&hdlcd->vsync_count);  in hdlcd_irq()
148 		drm_crtc_handle_vblank(&hdlcd->crtc);  in hdlcd_irq()
151 	hdlcd_write(hdlcd, HDLCD_REG_INT_CLEAR, irq_status);  in hdlcd_irq()
158 	struct hdlcd_drm_private *hdlcd = drm->dev_private;  in hdlcd_irq_preinstall()  local
160 	hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, 0);  in hdlcd_irq_preinstall()
161 	hdlcd_write(hdlcd, HDLCD_REG_INT_CLEAR, ~0);  in hdlcd_irq_preinstall()
167 	struct hdlcd_drm_private *hdlcd = drm->dev_private;  in hdlcd_irq_postinstall()  local
168 	unsigned long irq_mask = hdlcd_read(hdlcd, HDLCD_REG_INT_MASK);  in hdlcd_irq_postinstall()
173 	hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, irq_mask);  in hdlcd_irq_postinstall()
180 	struct hdlcd_drm_private *hdlcd = drm->dev_private;  in hdlcd_irq_uninstall()  local
182 	unsigned long irq_mask = hdlcd_read(hdlcd, HDLCD_REG_INT_MASK);  in hdlcd_irq_uninstall()
192 	hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, irq_mask);  in hdlcd_irq_uninstall()
200 	struct hdlcd_drm_private *hdlcd = drm->dev_private;  in hdlcd_show_underrun_count()  local
202 	seq_printf(m, "underrun : %d\n", atomic_read(&hdlcd->buffer_underrun_count));  in hdlcd_show_underrun_count()
203 	seq_printf(m, "dma_end  : %d\n", atomic_read(&hdlcd->dma_end_count));  in hdlcd_show_underrun_count()
204 	seq_printf(m, "bus_error: %d\n", atomic_read(&hdlcd->bus_error_count));  in hdlcd_show_underrun_count()
205 	seq_printf(m, "vsync    : %d\n", atomic_read(&hdlcd->vsync_count));  in hdlcd_show_underrun_count()
213 	struct hdlcd_drm_private *hdlcd = drm->dev_private;  in hdlcd_show_pxlclock()  local
214 	unsigned long clkrate = clk_get_rate(hdlcd->clk);  in hdlcd_show_pxlclock()
215 	unsigned long mode_clock = hdlcd->crtc.mode.crtc_clock * 1000;  in hdlcd_show_pxlclock()
248 	.name = "hdlcd",
249 	.desc = "ARM HDLCD Controller DRM",
258 	struct hdlcd_drm_private *hdlcd;  in hdlcd_drm_bind()  local
261 	hdlcd = devm_kzalloc(dev, sizeof(*hdlcd), GFP_KERNEL);  in hdlcd_drm_bind()
262 	if (!hdlcd)  in hdlcd_drm_bind()
269 	drm->dev_private = hdlcd;  in hdlcd_drm_bind()
278 	hdlcd->crtc.port = of_graph_get_port_by_id(dev->of_node, 0);  in hdlcd_drm_bind()
317 	of_node_put(hdlcd->crtc.port);  in hdlcd_drm_bind()
318 	hdlcd->crtc.port = NULL;  in hdlcd_drm_bind()
332 	struct hdlcd_drm_private *hdlcd = drm->dev_private;  in hdlcd_drm_unbind()  local
337 	of_node_put(hdlcd->crtc.port);  in hdlcd_drm_unbind()
338 	hdlcd->crtc.port = NULL;  in hdlcd_drm_unbind()
386 	{ .compatible	= "arm,hdlcd" },
413 		.name = "hdlcd",
422 MODULE_DESCRIPTION("ARM HDLCD DRM driver");