33 #define DRIVER_NAME "imx-ldb"
53 	struct imx_ldb *ldb;  member
57 	/* Defines what is connected to the ldb, only one at a time */
102 	struct imx_ldb *ldb = imx_ldb_ch->ldb;  in imx_ldb_ch_set_bus_format()  local
103 	int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;  in imx_ldb_ch_set_bus_format()
110 			ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24;  in imx_ldb_ch_set_bus_format()
112 			ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24;  in imx_ldb_ch_set_bus_format()
116 			ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24 |  in imx_ldb_ch_set_bus_format()
119 			ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24 |  in imx_ldb_ch_set_bus_format()
158 static void imx_ldb_set_clock(struct imx_ldb *ldb, int mux, int chno,  in imx_ldb_set_clock()  argument
163 	dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,  in imx_ldb_set_clock()
164 			clk_get_rate(ldb->clk_pll[chno]), serial_clk);  in imx_ldb_set_clock()
165 	clk_set_rate(ldb->clk_pll[chno], serial_clk);  in imx_ldb_set_clock()
167 	dev_dbg(ldb->dev, "%s after: %ld\n", __func__,  in imx_ldb_set_clock()
168 			clk_get_rate(ldb->clk_pll[chno]));  in imx_ldb_set_clock()
170 	dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,  in imx_ldb_set_clock()
171 			clk_get_rate(ldb->clk[chno]),  in imx_ldb_set_clock()
173 	clk_set_rate(ldb->clk[chno], di_clk);  in imx_ldb_set_clock()
175 	dev_dbg(ldb->dev, "%s after: %ld\n", __func__,  in imx_ldb_set_clock()
176 			clk_get_rate(ldb->clk[chno]));  in imx_ldb_set_clock()
178 	/* set display clock mux to LDB input clock */  in imx_ldb_set_clock()
179 	ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk[chno]);  in imx_ldb_set_clock()
181 		dev_err(ldb->dev,  in imx_ldb_set_clock()
189 	struct imx_ldb *ldb = imx_ldb_ch->ldb;  in imx_ldb_encoder_enable()  local
190 	int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;  in imx_ldb_encoder_enable()
193 	if (mux < 0 || mux >= ARRAY_SIZE(ldb->clk_sel)) {  in imx_ldb_encoder_enable()
194 		dev_warn(ldb->dev, "%s: invalid mux %d\n", __func__, mux);  in imx_ldb_encoder_enable()
201 		clk_set_parent(ldb->clk_sel[mux], ldb->clk[0]);  in imx_ldb_encoder_enable()
202 		clk_set_parent(ldb->clk_sel[mux], ldb->clk[1]);  in imx_ldb_encoder_enable()
204 		clk_prepare_enable(ldb->clk[0]);  in imx_ldb_encoder_enable()
205 		clk_prepare_enable(ldb->clk[1]);  in imx_ldb_encoder_enable()
207 		clk_set_parent(ldb->clk_sel[mux], ldb->clk[imx_ldb_ch->chno]);  in imx_ldb_encoder_enable()
210 	if (imx_ldb_ch == &ldb->channel[0] || dual) {  in imx_ldb_encoder_enable()
211 		ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;  in imx_ldb_encoder_enable()
212 		if (mux == 0 || ldb->lvds_mux)  in imx_ldb_encoder_enable()
213 			ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI0;  in imx_ldb_encoder_enable()
215 			ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI1;  in imx_ldb_encoder_enable()
217 	if (imx_ldb_ch == &ldb->channel[1] || dual) {  in imx_ldb_encoder_enable()
218 		ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;  in imx_ldb_encoder_enable()
219 		if (mux == 1 || ldb->lvds_mux)  in imx_ldb_encoder_enable()
220 			ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI1;  in imx_ldb_encoder_enable()
222 			ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI0;  in imx_ldb_encoder_enable()
225 	if (ldb->lvds_mux) {  in imx_ldb_encoder_enable()
228 		if (imx_ldb_ch == &ldb->channel[0])  in imx_ldb_encoder_enable()
229 			lvds_mux = &ldb->lvds_mux[0];  in imx_ldb_encoder_enable()
230 		else if (imx_ldb_ch == &ldb->channel[1])  in imx_ldb_encoder_enable()
231 			lvds_mux = &ldb->lvds_mux[1];  in imx_ldb_encoder_enable()
233 		regmap_update_bits(ldb->regmap, lvds_mux->reg, lvds_mux->mask,  in imx_ldb_encoder_enable()
237 	regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);  in imx_ldb_encoder_enable()
249 	struct imx_ldb *ldb = imx_ldb_ch->ldb;  in imx_ldb_encoder_atomic_mode_set()  local
250 	int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;  in imx_ldb_encoder_atomic_mode_set()
256 	if (mux < 0 || mux >= ARRAY_SIZE(ldb->clk_sel)) {  in imx_ldb_encoder_atomic_mode_set()
257 		dev_warn(ldb->dev, "%s: invalid mux %d\n", __func__, mux);  in imx_ldb_encoder_atomic_mode_set()
262 		dev_warn(ldb->dev,  in imx_ldb_encoder_atomic_mode_set()
266 		dev_warn(ldb->dev,  in imx_ldb_encoder_atomic_mode_set()
272 		imx_ldb_set_clock(ldb, mux, 0, serial_clk, di_clk);  in imx_ldb_encoder_atomic_mode_set()
273 		imx_ldb_set_clock(ldb, mux, 1, serial_clk, di_clk);  in imx_ldb_encoder_atomic_mode_set()
276 		imx_ldb_set_clock(ldb, mux, imx_ldb_ch->chno, serial_clk,  in imx_ldb_encoder_atomic_mode_set()
281 	if (imx_ldb_ch == &ldb->channel[0] || dual) {  in imx_ldb_encoder_atomic_mode_set()
283 			ldb->ldb_ctrl |= LDB_DI0_VS_POL_ACT_LOW;  in imx_ldb_encoder_atomic_mode_set()
285 			ldb->ldb_ctrl &= ~LDB_DI0_VS_POL_ACT_LOW;  in imx_ldb_encoder_atomic_mode_set()
287 	if (imx_ldb_ch == &ldb->channel[1] || dual) {  in imx_ldb_encoder_atomic_mode_set()
289 			ldb->ldb_ctrl |= LDB_DI1_VS_POL_ACT_LOW;  in imx_ldb_encoder_atomic_mode_set()
291 			ldb->ldb_ctrl &= ~LDB_DI1_VS_POL_ACT_LOW;  in imx_ldb_encoder_atomic_mode_set()
307 	struct imx_ldb *ldb = imx_ldb_ch->ldb;  in imx_ldb_encoder_disable()  local
308 	int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;  in imx_ldb_encoder_disable()
313 	if (imx_ldb_ch == &ldb->channel[0] || dual)  in imx_ldb_encoder_disable()
314 		ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;  in imx_ldb_encoder_disable()
315 	if (imx_ldb_ch == &ldb->channel[1] || dual)  in imx_ldb_encoder_disable()
316 		ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;  in imx_ldb_encoder_disable()
318 	regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);  in imx_ldb_encoder_disable()
321 		clk_disable_unprepare(ldb->clk[0]);  in imx_ldb_encoder_disable()
322 		clk_disable_unprepare(ldb->clk[1]);  in imx_ldb_encoder_disable()
325 	if (ldb->lvds_mux) {  in imx_ldb_encoder_disable()
328 		if (imx_ldb_ch == &ldb->channel[0])  in imx_ldb_encoder_disable()
329 			lvds_mux = &ldb->lvds_mux[0];  in imx_ldb_encoder_disable()
330 		else if (imx_ldb_ch == &ldb->channel[1])  in imx_ldb_encoder_disable()
331 			lvds_mux = &ldb->lvds_mux[1];  in imx_ldb_encoder_disable()
333 		regmap_read(ldb->regmap, lvds_mux->reg, &mux);  in imx_ldb_encoder_disable()
337 		mux = (imx_ldb_ch == &ldb->channel[0]) ? 0 : 1;  in imx_ldb_encoder_disable()
341 	ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk_parent[mux]);  in imx_ldb_encoder_disable()
343 		dev_err(ldb->dev,  in imx_ldb_encoder_disable()
405 static int imx_ldb_get_clk(struct imx_ldb *ldb, int chno)  in imx_ldb_get_clk()  argument
410 	ldb->clk[chno] = devm_clk_get(ldb->dev, clkname);  in imx_ldb_get_clk()
411 	if (IS_ERR(ldb->clk[chno]))  in imx_ldb_get_clk()
412 		return PTR_ERR(ldb->clk[chno]);  in imx_ldb_get_clk()
415 	ldb->clk_pll[chno] = devm_clk_get(ldb->dev, clkname);  in imx_ldb_get_clk()
417 	return PTR_ERR_OR_ZERO(ldb->clk_pll[chno]);  in imx_ldb_get_clk()
423 	struct imx_ldb *ldb = imx_ldb_ch->ldb;  in imx_ldb_register()  local
431 	ret = imx_ldb_get_clk(ldb, imx_ldb_ch->chno);  in imx_ldb_register()
435 	if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {  in imx_ldb_register()
436 		ret = imx_ldb_get_clk(ldb, 1);  in imx_ldb_register()
455 		 * historical reasons, the ldb driver can also work without  in imx_ldb_register()
518  * For a device declaring compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb",
521  * entries (in this case fsl,imx53-ldb) need to be ordered last.
524 	{ .compatible = "fsl,imx6q-ldb", .data = imx6q_lvds_mux, },
525 	{ .compatible = "fsl,imx53-ldb", .data = NULL, },
592 	/* disable LDB by resetting the control register to POR default */  in imx_ldb_bind()
646 		channel->ldb = imx_ldb;  in imx_ldb_bind()