Lines Matching +full:background +full:- +full:layer
1 // SPDX-License-Identifier: GPL-2.0
41 #define CRTC_MASK GENMASK(NB_CRTC - 1, 0)
54 #define REG_OFS_4 4 /* Insertion of "Layer Conf. 2" reg */
55 #define REG_OFS (ldev->caps.reg_ofs)
60 #define LTDC_LCR 0x0004 /* Layer Count */
70 #define LTDC_BCCR 0x002C /* Background Color Configuration */
78 /* Layer register offsets */
79 #define LTDC_L1LC1R (0x80) /* L1 Layer Configuration 1 */
80 #define LTDC_L1LC2R (0x84) /* L1 Layer Configuration 2 */
116 #define GCR_PCPOL BIT(28) /* Pixel Clock POLarity-Inverted */
117 #define GCR_DEPOL BIT(29) /* Data Enable POLarity-High */
118 #define GCR_VSPOL BIT(30) /* Vertical Synchro POLarity-High */
119 #define GCR_HSPOL BIT(31) /* Horizontal Synchro POLarity-High */
128 #define GC1R_BCP BIT(22) /* Background Colour Programmable */
129 #define GC1R_BBEN BIT(23) /* Background Blending ENabled */
140 #define GC2R_DVAEN BIT(2) /* Dual-View Ability ENabled */
141 #define GC2R_DPAEN BIT(3) /* Dual-Port Ability ENabled */
148 #define BCCR_BCBLACK 0x00 /* Background Color BLACK */
149 #define BCCR_BCBLUE GENMASK(7, 0) /* Background Color BLUE */
150 #define BCCR_BCGREEN GENMASK(15, 8) /* Background Color GREEN */
151 #define BCCR_BCRED GENMASK(23, 16) /* Background Color RED */
152 #define BCCR_BCWHITE GENMASK(23, 0) /* Background Color WHITE */
166 #define LXCR_LEN BIT(0) /* Layer ENable */
168 #define LXCR_CLUTEN BIT(4) /* Color Look-Up Table ENable */
193 #define BF2_1PAXCA 0x007 /* 1 - (Pixel Alpha x Constant Alpha) */
194 #define BF2_1CA 0x005 /* 1 - Constant Alpha */
269 return (struct ltdc_device *)crtc->dev->dev_private; in crtc_to_ltdc()
274 return (struct ltdc_device *)plane->dev->dev_private; in plane_to_ltdc()
279 return (struct ltdc_device *)enc->dev->dev_private; in encoder_to_ltdc()
369 struct ltdc_device *ldev = ddev->dev_private; in ltdc_irq_thread()
373 if (ldev->irq_status & ISR_LIF) in ltdc_irq_thread()
377 mutex_lock(&ldev->err_lock); in ltdc_irq_thread()
378 if (ldev->irq_status & ISR_FUIF) in ltdc_irq_thread()
379 ldev->error_status |= ISR_FUIF; in ltdc_irq_thread()
380 if (ldev->irq_status & ISR_TERRIF) in ltdc_irq_thread()
381 ldev->error_status |= ISR_TERRIF; in ltdc_irq_thread()
382 mutex_unlock(&ldev->err_lock); in ltdc_irq_thread()
390 struct ltdc_device *ldev = ddev->dev_private; in ltdc_irq()
393 ldev->irq_status = reg_read(ldev->regs, LTDC_ISR); in ltdc_irq()
394 reg_write(ldev->regs, LTDC_ICR, ldev->irq_status); in ltdc_irq()
410 if (!crtc->state->color_mgmt_changed || !crtc->state->gamma_lut) in ltdc_crtc_update_clut()
413 lut = (struct drm_color_lut *)crtc->state->gamma_lut->data; in ltdc_crtc_update_clut()
416 val = ((lut->red << 8) & 0xff0000) | (lut->green & 0xff00) | in ltdc_crtc_update_clut()
417 (lut->blue >> 8) | (i << 24); in ltdc_crtc_update_clut()
418 reg_write(ldev->regs, LTDC_L1CLUTWR, val); in ltdc_crtc_update_clut()
426 struct drm_device *ddev = crtc->dev; in ltdc_crtc_atomic_enable()
430 pm_runtime_get_sync(ddev->dev); in ltdc_crtc_atomic_enable()
432 /* Sets the background color value */ in ltdc_crtc_atomic_enable()
433 reg_write(ldev->regs, LTDC_BCCR, BCCR_BCBLACK); in ltdc_crtc_atomic_enable()
436 reg_set(ldev->regs, LTDC_IER, IER_RRIE | IER_FUIE | IER_TERRIE); in ltdc_crtc_atomic_enable()
439 reg_set(ldev->regs, LTDC_SRCR, SRCR_VBR); in ltdc_crtc_atomic_enable()
448 struct drm_device *ddev = crtc->dev; in ltdc_crtc_atomic_disable()
455 reg_clear(ldev->regs, LTDC_IER, IER_RRIE | IER_FUIE | IER_TERRIE); in ltdc_crtc_atomic_disable()
458 reg_set(ldev->regs, LTDC_SRCR, SRCR_IMR); in ltdc_crtc_atomic_disable()
460 pm_runtime_put_sync(ddev->dev); in ltdc_crtc_atomic_disable()
470 int target = mode->clock * 1000; in ltdc_crtc_mode_valid()
471 int target_min = target - CLK_TOLERANCE_HZ; in ltdc_crtc_mode_valid()
475 result = clk_round_rate(ldev->pixel_clk, target); in ltdc_crtc_mode_valid()
480 if (result > ldev->caps.pad_max_freq_hz) in ltdc_crtc_mode_valid()
485 * - this is important for panels because panel clock tolerances are in ltdc_crtc_mode_valid()
488 * - the hdmi preferred mode will be accepted too, but userland will in ltdc_crtc_mode_valid()
491 if (mode->type & DRM_MODE_TYPE_PREFERRED) in ltdc_crtc_mode_valid()
509 int rate = mode->clock * 1000; in ltdc_crtc_mode_fixup()
511 if (clk_set_rate(ldev->pixel_clk, rate) < 0) { in ltdc_crtc_mode_fixup()
516 adjusted_mode->clock = clk_get_rate(ldev->pixel_clk) / 1000; in ltdc_crtc_mode_fixup()
519 mode->clock, adjusted_mode->clock); in ltdc_crtc_mode_fixup()
527 struct drm_device *ddev = crtc->dev; in ltdc_crtc_mode_set_nofb()
532 struct drm_display_mode *mode = &crtc->state->adjusted_mode; in ltdc_crtc_mode_set_nofb()
542 if (en_iter->crtc == crtc) { in ltdc_crtc_mode_set_nofb()
549 list_for_each_entry(br_iter, &encoder->bridge_chain, chain_node) in ltdc_crtc_mode_set_nofb()
550 if (br_iter->encoder == encoder) { in ltdc_crtc_mode_set_nofb()
558 if (connector->encoder == encoder) in ltdc_crtc_mode_set_nofb()
563 if (bridge && bridge->timings) in ltdc_crtc_mode_set_nofb()
564 bus_flags = bridge->timings->input_bus_flags; in ltdc_crtc_mode_set_nofb()
566 bus_flags = connector->display_info.bus_flags; in ltdc_crtc_mode_set_nofb()
568 if (!pm_runtime_active(ddev->dev)) { in ltdc_crtc_mode_set_nofb()
569 ret = pm_runtime_get_sync(ddev->dev); in ltdc_crtc_mode_set_nofb()
578 DRM_DEBUG_DRIVER("CRTC:%d mode:%s\n", crtc->base.id, mode->name); in ltdc_crtc_mode_set_nofb()
585 hsync = vm.hsync_len - 1; in ltdc_crtc_mode_set_nofb()
586 vsync = vm.vsync_len - 1; in ltdc_crtc_mode_set_nofb()
609 reg_update_bits(ldev->regs, LTDC_GCR, in ltdc_crtc_mode_set_nofb()
614 reg_update_bits(ldev->regs, LTDC_SSCR, SSCR_VSH | SSCR_HSW, val); in ltdc_crtc_mode_set_nofb()
618 reg_update_bits(ldev->regs, LTDC_BPCR, BPCR_AVBP | BPCR_AHBP, val); in ltdc_crtc_mode_set_nofb()
622 reg_update_bits(ldev->regs, LTDC_AWCR, AWCR_AAW | AWCR_AAH, val); in ltdc_crtc_mode_set_nofb()
626 reg_update_bits(ldev->regs, LTDC_TWCR, TWCR_TOTALH | TWCR_TOTALW, val); in ltdc_crtc_mode_set_nofb()
628 reg_write(ldev->regs, LTDC_LIPCR, (accum_act_h + 1)); in ltdc_crtc_mode_set_nofb()
635 struct drm_device *ddev = crtc->dev; in ltdc_crtc_atomic_flush()
636 struct drm_pending_vblank_event *event = crtc->state->event; in ltdc_crtc_atomic_flush()
643 reg_set(ldev->regs, LTDC_SRCR, SRCR_VBR); in ltdc_crtc_atomic_flush()
646 crtc->state->event = NULL; in ltdc_crtc_atomic_flush()
648 spin_lock_irq(&ddev->event_lock); in ltdc_crtc_atomic_flush()
653 spin_unlock_irq(&ddev->event_lock); in ltdc_crtc_atomic_flush()
663 struct drm_device *ddev = crtc->dev; in ltdc_crtc_get_scanout_position()
664 struct ltdc_device *ldev = ddev->dev_private; in ltdc_crtc_get_scanout_position()
674 * - line < vactive_start: vpos = line - vactive_start and will be in ltdc_crtc_get_scanout_position()
676 * - vactive_start < line < vactive_end: vpos = line - vactive_start in ltdc_crtc_get_scanout_position()
678 * - line > vactive_end: vpos = line - vtotal - vactive_start in ltdc_crtc_get_scanout_position()
684 if (pm_runtime_active(ddev->dev)) { in ltdc_crtc_get_scanout_position()
685 line = reg_read(ldev->regs, LTDC_CPSR) & CPSR_CYPOS; in ltdc_crtc_get_scanout_position()
686 vactive_start = reg_read(ldev->regs, LTDC_BPCR) & BPCR_AVBP; in ltdc_crtc_get_scanout_position()
687 vactive_end = reg_read(ldev->regs, LTDC_AWCR) & AWCR_AAH; in ltdc_crtc_get_scanout_position()
688 vtotal = reg_read(ldev->regs, LTDC_TWCR) & TWCR_TOTALH; in ltdc_crtc_get_scanout_position()
691 *vpos = line - vtotal - vactive_start; in ltdc_crtc_get_scanout_position()
693 *vpos = line - vactive_start; in ltdc_crtc_get_scanout_position()
719 struct drm_crtc_state *state = crtc->state; in ltdc_crtc_enable_vblank()
723 if (state->enable) in ltdc_crtc_enable_vblank()
724 reg_set(ldev->regs, LTDC_IER, IER_LIE); in ltdc_crtc_enable_vblank()
726 return -EPERM; in ltdc_crtc_enable_vblank()
736 reg_clear(ldev->regs, LTDC_IER, IER_LIE); in ltdc_crtc_disable_vblank()
759 struct drm_framebuffer *fb = state->fb; in ltdc_plane_atomic_check()
768 src_w = state->src_w >> 16; in ltdc_plane_atomic_check()
769 src_h = state->src_h >> 16; in ltdc_plane_atomic_check()
772 if (src_w != state->crtc_w || src_h != state->crtc_h) { in ltdc_plane_atomic_check()
774 return -EINVAL; in ltdc_plane_atomic_check()
784 struct drm_plane_state *state = plane->state; in ltdc_plane_atomic_update()
785 struct drm_framebuffer *fb = state->fb; in ltdc_plane_atomic_update()
786 u32 lofs = plane->index * LAY_OFS; in ltdc_plane_atomic_update()
787 u32 x0 = state->crtc_x; in ltdc_plane_atomic_update()
788 u32 x1 = state->crtc_x + state->crtc_w - 1; in ltdc_plane_atomic_update()
789 u32 y0 = state->crtc_y; in ltdc_plane_atomic_update()
790 u32 y1 = state->crtc_y + state->crtc_h - 1; in ltdc_plane_atomic_update()
795 if (!state->crtc || !fb) { in ltdc_plane_atomic_update()
801 src_x = state->src_x >> 16; in ltdc_plane_atomic_update()
802 src_y = state->src_y >> 16; in ltdc_plane_atomic_update()
803 src_w = state->src_w >> 16; in ltdc_plane_atomic_update()
804 src_h = state->src_h >> 16; in ltdc_plane_atomic_update()
806 DRM_DEBUG_DRIVER("plane:%d fb:%d (%dx%d)@(%d,%d) -> (%dx%d)@(%d,%d)\n", in ltdc_plane_atomic_update()
807 plane->base.id, fb->base.id, in ltdc_plane_atomic_update()
809 state->crtc_w, state->crtc_h, in ltdc_plane_atomic_update()
810 state->crtc_x, state->crtc_y); in ltdc_plane_atomic_update()
812 bpcr = reg_read(ldev->regs, LTDC_BPCR); in ltdc_plane_atomic_update()
818 reg_update_bits(ldev->regs, LTDC_L1WHPCR + lofs, in ltdc_plane_atomic_update()
823 reg_update_bits(ldev->regs, LTDC_L1WVPCR + lofs, in ltdc_plane_atomic_update()
827 pf = to_ltdc_pixelformat(fb->format->format); in ltdc_plane_atomic_update()
829 if (ldev->caps.pix_fmt_hw[val] == pf) in ltdc_plane_atomic_update()
834 (char *)&fb->format->format); in ltdc_plane_atomic_update()
837 reg_update_bits(ldev->regs, LTDC_L1PFCR + lofs, LXPFCR_PF, val); in ltdc_plane_atomic_update()
840 pitch_in_bytes = fb->pitches[0]; in ltdc_plane_atomic_update()
841 line_length = fb->format->cpp[0] * in ltdc_plane_atomic_update()
842 (x1 - x0 + 1) + (ldev->caps.bus_width >> 3) - 1; in ltdc_plane_atomic_update()
844 reg_update_bits(ldev->regs, LTDC_L1CFBLR + lofs, in ltdc_plane_atomic_update()
849 reg_update_bits(ldev->regs, LTDC_L1CACR + lofs, LXCACR_CONSTA, val); in ltdc_plane_atomic_update()
853 if (!fb->format->has_alpha) in ltdc_plane_atomic_update()
856 /* Manage hw-specific capabilities */ in ltdc_plane_atomic_update()
857 if (ldev->caps.non_alpha_only_l1 && in ltdc_plane_atomic_update()
858 plane->type != DRM_PLANE_TYPE_PRIMARY) in ltdc_plane_atomic_update()
861 reg_update_bits(ldev->regs, LTDC_L1BFCR + lofs, in ltdc_plane_atomic_update()
865 val = y1 - y0 + 1; in ltdc_plane_atomic_update()
866 reg_update_bits(ldev->regs, LTDC_L1CFBLNR + lofs, LXCFBLNR_CFBLN, val); in ltdc_plane_atomic_update()
872 reg_write(ldev->regs, LTDC_L1CFBAR + lofs, paddr); in ltdc_plane_atomic_update()
874 /* Enable layer and CLUT if needed */ in ltdc_plane_atomic_update()
875 val = fb->format->format == DRM_FORMAT_C8 ? LXCR_CLUTEN : 0; in ltdc_plane_atomic_update()
877 reg_update_bits(ldev->regs, LTDC_L1CR + lofs, in ltdc_plane_atomic_update()
880 ldev->plane_fpsi[plane->index].counter++; in ltdc_plane_atomic_update()
882 mutex_lock(&ldev->err_lock); in ltdc_plane_atomic_update()
883 if (ldev->error_status & ISR_FUIF) { in ltdc_plane_atomic_update()
885 ldev->error_status &= ~ISR_FUIF; in ltdc_plane_atomic_update()
887 if (ldev->error_status & ISR_TERRIF) { in ltdc_plane_atomic_update()
889 ldev->error_status &= ~ISR_TERRIF; in ltdc_plane_atomic_update()
891 mutex_unlock(&ldev->err_lock); in ltdc_plane_atomic_update()
898 u32 lofs = plane->index * LAY_OFS; in ltdc_plane_atomic_disable()
900 /* disable layer */ in ltdc_plane_atomic_disable()
901 reg_clear(ldev->regs, LTDC_L1CR + lofs, LXCR_LEN); in ltdc_plane_atomic_disable()
904 oldstate->crtc->base.id, plane->base.id); in ltdc_plane_atomic_disable()
910 struct drm_plane *plane = state->plane; in ltdc_plane_atomic_print_state()
912 struct fps_info *fpsi = &ldev->plane_fpsi[plane->index]; in ltdc_plane_atomic_print_state()
917 ms_since_last = ktime_to_ms(ktime_sub(now, fpsi->last_timestamp)); in ltdc_plane_atomic_print_state()
920 DIV_ROUND_CLOSEST(fpsi->counter * 1000, ms_since_last)); in ltdc_plane_atomic_print_state()
922 fpsi->last_timestamp = now; in ltdc_plane_atomic_print_state()
923 fpsi->counter = 0; in ltdc_plane_atomic_print_state()
958 struct ltdc_device *ldev = ddev->dev_private; in ltdc_plane_create()
959 struct device *dev = ddev->dev; in ltdc_plane_create()
969 drm_fmt = to_drm_pixelformat(ldev->caps.pix_fmt_hw[i]); in ltdc_plane_create()
974 /* Add the no-alpha related format if any & supported */ in ltdc_plane_create()
979 /* Manage hw-specific capabilities */ in ltdc_plane_create()
980 if (ldev->caps.non_alpha_only_l1 && in ltdc_plane_create()
999 DRM_DEBUG_DRIVER("plane:%d created\n", plane->base.id); in ltdc_plane_create()
1009 &ddev->mode_config.plane_list, head) in ltdc_plane_destroy_all()
1015 struct ltdc_device *ldev = ddev->dev_private; in ltdc_crtc_init()
1023 return -EINVAL; in ltdc_crtc_init()
1038 DRM_DEBUG_DRIVER("CRTC:%d created\n", crtc->base.id); in ltdc_crtc_init()
1040 /* Add planes. Note : the first layer is used by primary plane */ in ltdc_crtc_init()
1041 for (i = 1; i < ldev->caps.nb_layers; i++) { in ltdc_crtc_init()
1044 ret = -ENOMEM; in ltdc_crtc_init()
1067 struct drm_device *ddev = encoder->dev; in ltdc_encoder_disable()
1068 struct ltdc_device *ldev = ddev->dev_private; in ltdc_encoder_disable()
1073 reg_clear(ldev->regs, LTDC_GCR, GCR_LTDCEN); in ltdc_encoder_disable()
1076 pinctrl_pm_select_sleep_state(ddev->dev); in ltdc_encoder_disable()
1081 struct drm_device *ddev = encoder->dev; in ltdc_encoder_enable()
1082 struct ltdc_device *ldev = ddev->dev_private; in ltdc_encoder_enable()
1087 reg_set(ldev->regs, LTDC_GCR, GCR_LTDCEN); in ltdc_encoder_enable()
1094 struct drm_device *ddev = encoder->dev; in ltdc_encoder_mode_set()
1103 if (encoder->encoder_type == DRM_MODE_ENCODER_DPI) in ltdc_encoder_mode_set()
1104 pinctrl_pm_select_default_state(ddev->dev); in ltdc_encoder_mode_set()
1118 encoder = devm_kzalloc(ddev->dev, sizeof(*encoder), GFP_KERNEL); in ltdc_encoder_init()
1120 return -ENOMEM; in ltdc_encoder_init()
1122 encoder->possible_crtcs = CRTC_MASK; in ltdc_encoder_init()
1123 encoder->possible_clones = 0; /* No cloning support */ in ltdc_encoder_init()
1133 return -EINVAL; in ltdc_encoder_init()
1136 DRM_DEBUG_DRIVER("Bridge encoder:%d created\n", encoder->base.id); in ltdc_encoder_init()
1143 struct ltdc_device *ldev = ddev->dev_private; in ltdc_get_caps()
1147 * at least 1 layer must be managed & the number of layers in ltdc_get_caps()
1150 lcr = reg_read(ldev->regs, LTDC_LCR); in ltdc_get_caps()
1152 ldev->caps.nb_layers = clamp((int)lcr, 1, LTDC_MAX_LAYER); in ltdc_get_caps()
1155 gc2r = reg_read(ldev->regs, LTDC_GC2R); in ltdc_get_caps()
1157 ldev->caps.bus_width = 8 << bus_width_log2; in ltdc_get_caps()
1158 ldev->caps.hw_version = reg_read(ldev->regs, LTDC_IDR); in ltdc_get_caps()
1160 switch (ldev->caps.hw_version) { in ltdc_get_caps()
1163 ldev->caps.reg_ofs = REG_OFS_NONE; in ltdc_get_caps()
1164 ldev->caps.pix_fmt_hw = ltdc_pix_fmt_a0; in ltdc_get_caps()
1166 * Hw older versions support non-alpha color formats derived in ltdc_get_caps()
1167 * from native alpha color formats only on the primary layer. in ltdc_get_caps()
1169 * on 2nd layer but XR24 (derived color format from AR24) in ltdc_get_caps()
1170 * does not work on 2nd layer. in ltdc_get_caps()
1172 ldev->caps.non_alpha_only_l1 = true; in ltdc_get_caps()
1173 ldev->caps.pad_max_freq_hz = 90000000; in ltdc_get_caps()
1174 if (ldev->caps.hw_version == HWVER_10200) in ltdc_get_caps()
1175 ldev->caps.pad_max_freq_hz = 65000000; in ltdc_get_caps()
1176 ldev->caps.nb_irq = 2; in ltdc_get_caps()
1179 ldev->caps.reg_ofs = REG_OFS_4; in ltdc_get_caps()
1180 ldev->caps.pix_fmt_hw = ltdc_pix_fmt_a1; in ltdc_get_caps()
1181 ldev->caps.non_alpha_only_l1 = false; in ltdc_get_caps()
1182 ldev->caps.pad_max_freq_hz = 150000000; in ltdc_get_caps()
1183 ldev->caps.nb_irq = 4; in ltdc_get_caps()
1186 return -ENODEV; in ltdc_get_caps()
1194 struct ltdc_device *ldev = ddev->dev_private; in ltdc_suspend()
1197 clk_disable_unprepare(ldev->pixel_clk); in ltdc_suspend()
1202 struct ltdc_device *ldev = ddev->dev_private; in ltdc_resume()
1207 ret = clk_prepare_enable(ldev->pixel_clk); in ltdc_resume()
1218 struct platform_device *pdev = to_platform_device(ddev->dev); in ltdc_load()
1219 struct ltdc_device *ldev = ddev->dev_private; in ltdc_load()
1220 struct device *dev = ddev->dev; in ltdc_load()
1221 struct device_node *np = dev->of_node; in ltdc_load()
1228 int ret = -ENODEV; in ltdc_load()
1235 return -ENODEV; in ltdc_load()
1237 ldev->pixel_clk = devm_clk_get(dev, "lcd"); in ltdc_load()
1238 if (IS_ERR(ldev->pixel_clk)) { in ltdc_load()
1239 if (PTR_ERR(ldev->pixel_clk) != -EPROBE_DEFER) in ltdc_load()
1241 return PTR_ERR(ldev->pixel_clk); in ltdc_load()
1244 if (clk_prepare_enable(ldev->pixel_clk)) { in ltdc_load()
1246 return -ENODEV; in ltdc_load()
1254 * If at least one endpoint is -ENODEV, continue probing, in ltdc_load()
1256 * (ie -EPROBE_DEFER) then stop probing. in ltdc_load()
1258 if (ret == -ENODEV) in ltdc_load()
1267 DRM_ERROR("panel-bridge endpoint %d\n", i); in ltdc_load()
1284 mutex_init(&ldev->err_lock); in ltdc_load()
1293 ldev->regs = devm_ioremap_resource(dev, res); in ltdc_load()
1294 if (IS_ERR(ldev->regs)) { in ltdc_load()
1296 ret = PTR_ERR(ldev->regs); in ltdc_load()
1301 reg_clear(ldev->regs, LTDC_IER, in ltdc_load()
1307 ldev->caps.hw_version); in ltdc_load()
1311 DRM_DEBUG_DRIVER("ltdc hw version 0x%08x\n", ldev->caps.hw_version); in ltdc_load()
1313 for (i = 0; i < ldev->caps.nb_irq; i++) { in ltdc_load()
1333 ret = -ENOMEM; in ltdc_load()
1337 ddev->mode_config.allow_fb_modifiers = true; in ltdc_load()
1352 ddev->irq_enabled = 1; in ltdc_load()
1354 clk_disable_unprepare(ldev->pixel_clk); in ltdc_load()
1356 pinctrl_pm_select_sleep_state(ddev->dev); in ltdc_load()
1358 pm_runtime_enable(ddev->dev); in ltdc_load()
1363 drm_of_panel_bridge_remove(ddev->dev->of_node, 0, i); in ltdc_load()
1365 clk_disable_unprepare(ldev->pixel_clk); in ltdc_load()
1372 struct device *dev = ddev->dev; in ltdc_unload()
1377 nb_endpoints = of_graph_get_endpoint_count(dev->of_node); in ltdc_unload()
1380 drm_of_panel_bridge_remove(ddev->dev->of_node, 0, i); in ltdc_unload()
1382 pm_runtime_disable(ddev->dev); in ltdc_unload()