Lines Matching +full:smbus +full:- +full:timeout +full:- +full:disable
1 // SPDX-License-Identifier: GPL-2.0
54 * Note that the following SMBus, CAUSE, GPIO and PLL register addresses
56 * memory-mapped region whose addresses are specified in either the DT or
61 * SMBus Master core clock frequency. Timing configurations are
62 * strongly dependent on the core clock frequency of the SMBus
66 /* Reference clock for Bluefield - 156 MHz. */
106 /* Transfer timeout occurred. */
149 * Note that Smbus GWs are on GPIOs 30:25. Two pins are used to control
152 * SMBUS GW0 -> bits[26:25]
153 * SMBUS GW1 -> bits[28:27]
154 * SMBUS GW2 -> bits[30:29]
168 /* SMBus timing parameters. */
184 * Defines SMBus operating frequency and core clock frequency.
185 * According to ADB files, default values are compliant to 100KHz SMBus
205 /* SMBus Master GW. */
211 /* Status bits (ACK/NACK/FW Timeout). */
213 /* SMbus Master Finite State Machine. */
218 * timeout while waiting for FW response.
222 /* SMBus master GW control bits offset in MLXBF_I2C_SMBUS_MASTER_GW[31:3]. */
246 /* SMBus master GW Data descriptor. */
250 /* Maximum bytes to read/write per SMBus transaction. */
252 #define MLXBF_I2C_MASTER_DATA_W_LENGTH (MLXBF_I2C_MASTER_DATA_DESC_SIZE - 1)
260 /* Timeout occurred. */
273 /* SMBus slave GW. */
279 /* SMBus slave Finite State Machine (FSM). */
287 /* SMBus slave GW control bits offset in MLXBF_I2C_SMBUS_SLAVE_GW[31:19]. */
297 /* SMBus slave GW Data descriptor. */
301 /* SMbus slave configuration registers. */
311 * Timeout is given in microsends. Note also that timeout handling is not
333 u32 timeout; /* Detect clock low timeout. */ member
385 .end = (addr) + (size) - 1, \
412 MLXBF_I2C_CHIP_TYPE_1, /* Mellanox BlueField-1 chip. */
413 MLXBF_I2C_CHIP_TYPE_2, /* Mallanox BlueField-2 chip. */
428 struct mlxbf_i2c_resource *smbus; member
488 * Note that the timeout is given in microseconds.
491 bool eq_zero, u32 timeout) in mlxbf_smbus_poll() argument
495 timeout = (timeout / MLXBF_I2C_POLL_FREQ_IN_USEC) + 1; in mlxbf_smbus_poll()
502 } while (timeout-- != 0); in mlxbf_smbus_poll()
508 * SW must make sure that the SMBus Master GW is idle before starting
516 u32 timeout = MLXBF_I2C_SMBUS_TIMEOUT; in mlxbf_smbus_master_wait_for_idle() local
518 if (mlxbf_smbus_poll(priv->smbus->io, addr, mask, true, timeout)) in mlxbf_smbus_master_wait_for_idle()
529 if (mlxbf_smbus_poll(priv->smbus->io, MLXBF_I2C_SMBUS_MASTER_GW, in mlxbf_i2c_smbus_master_lock()
540 writel(0, priv->smbus->io + MLXBF_I2C_SMBUS_MASTER_GW); in mlxbf_i2c_smbus_master_unlock()
550 * de-asserted then the SMBus expects the following GW configuration in mlxbf_i2c_smbus_transaction_success()
563 * Poll SMBus master status and return transaction status,
564 * i.e. whether succeeded or failed. I2C and SMBus fault codes
566 * or some positive number indicating a non-fault return.
580 mlxbf_smbus_poll(priv->smbus->io, MLXBF_I2C_SMBUS_MASTER_GW, in mlxbf_i2c_smbus_check_status()
585 cause_status_bits = readl(priv->mst_cause->io + in mlxbf_i2c_smbus_check_status()
593 master_status_bits = readl(priv->smbus->io + in mlxbf_i2c_smbus_check_status()
602 * In case of timeout on GW busy, the ISR will clear busy bit but in mlxbf_i2c_smbus_check_status()
609 return -EIO; in mlxbf_i2c_smbus_check_status()
612 return -EAGAIN; in mlxbf_i2c_smbus_check_status()
614 return -ETIMEDOUT; in mlxbf_i2c_smbus_check_status()
626 * Copy data bytes from 4-byte aligned source buffer. in mlxbf_i2c_smbus_write_data()
630 * when writing data bytes to the 32 * 32-bit HW Data registers in mlxbf_i2c_smbus_write_data()
635 iowrite32be(data32, priv->smbus->io + addr + offset); in mlxbf_i2c_smbus_write_data()
645 mask = sizeof(u32) - 1; in mlxbf_i2c_smbus_read_data()
651 * reading data bytes from the 32 * 32-bit HW Data registers in mlxbf_i2c_smbus_read_data()
656 data32 = ioread32be(priv->smbus->io + addr + offset); in mlxbf_i2c_smbus_read_data()
663 data32 = ioread32be(priv->smbus->io + addr + offset); in mlxbf_i2c_smbus_read_data()
689 writel(0x0, priv->smbus->io + MLXBF_I2C_SMBUS_MASTER_STATUS); in mlxbf_i2c_smbus_enable()
691 writel(~0x0, priv->mst_cause->io + MLXBF_I2C_CAUSE_OR_CLEAR); in mlxbf_i2c_smbus_enable()
693 writel(0x0, priv->smbus->io + MLXBF_I2C_SMBUS_MASTER_PEC); in mlxbf_i2c_smbus_enable()
695 writel(0x0, priv->smbus->io + MLXBF_I2C_SMBUS_RS_BYTES); in mlxbf_i2c_smbus_enable()
698 writel(command, priv->smbus->io + MLXBF_I2C_SMBUS_MASTER_GW); in mlxbf_i2c_smbus_enable()
720 if (request->operation_cnt > MLXBF_I2C_SMBUS_MAX_OP_CNT) in mlxbf_i2c_smbus_start_transaction()
721 return -EINVAL; in mlxbf_i2c_smbus_start_transaction()
731 slave = request->slave & GENMASK(6, 0); in mlxbf_i2c_smbus_start_transaction()
735 * Try to acquire the smbus gw lock before any reads of the GW register since in mlxbf_i2c_smbus_start_transaction()
739 return -EBUSY; in mlxbf_i2c_smbus_start_transaction()
743 ret = -EBUSY; in mlxbf_i2c_smbus_start_transaction()
750 for (op_idx = 0; op_idx < request->operation_cnt; op_idx++) { in mlxbf_i2c_smbus_start_transaction()
751 operation = &request->operation[op_idx]; in mlxbf_i2c_smbus_start_transaction()
752 flags = operation->flags; in mlxbf_i2c_smbus_start_transaction()
757 * then write command byte and set the optional SMBus specific in mlxbf_i2c_smbus_start_transaction()
768 write_len += operation->length; in mlxbf_i2c_smbus_start_transaction()
769 if (data_idx + operation->length > in mlxbf_i2c_smbus_start_transaction()
771 ret = -ENOBUFS; in mlxbf_i2c_smbus_start_transaction()
775 operation->buffer, operation->length); in mlxbf_i2c_smbus_start_transaction()
776 data_idx += operation->length; in mlxbf_i2c_smbus_start_transaction()
780 * SMBus transaction. *TBD* protect this statement so it won't in mlxbf_i2c_smbus_start_transaction()
787 read_len = operation->length - 1; in mlxbf_i2c_smbus_start_transaction()
788 read_buf = operation->buffer; in mlxbf_i2c_smbus_start_transaction()
824 * After a read operation the SMBus FSM ps (present state) in mlxbf_i2c_smbus_start_transaction()
829 priv->smbus->io + MLXBF_I2C_SMBUS_MASTER_FSM); in mlxbf_i2c_smbus_start_transaction()
838 /* I2C SMBus protocols. */
844 request->operation_cnt = MLXBF_I2C_SMBUS_OP_CNT_1; in mlxbf_i2c_smbus_quick_command()
846 request->operation[0].length = 0; in mlxbf_i2c_smbus_quick_command()
847 request->operation[0].flags = MLXBF_I2C_F_WRITE; in mlxbf_i2c_smbus_quick_command()
848 request->operation[0].flags |= read ? MLXBF_I2C_F_READ : 0; in mlxbf_i2c_smbus_quick_command()
854 request->operation_cnt = MLXBF_I2C_SMBUS_OP_CNT_1; in mlxbf_i2c_smbus_byte_func()
856 request->operation[0].length = 1; in mlxbf_i2c_smbus_byte_func()
857 request->operation[0].length += pec_check; in mlxbf_i2c_smbus_byte_func()
859 request->operation[0].flags = MLXBF_I2C_F_SMBUS_OPERATION; in mlxbf_i2c_smbus_byte_func()
860 request->operation[0].flags |= read ? in mlxbf_i2c_smbus_byte_func()
862 request->operation[0].flags |= pec_check ? MLXBF_I2C_F_SMBUS_PEC : 0; in mlxbf_i2c_smbus_byte_func()
864 request->operation[0].buffer = data; in mlxbf_i2c_smbus_byte_func()
871 request->operation_cnt = MLXBF_I2C_SMBUS_OP_CNT_2; in mlxbf_i2c_smbus_data_byte_func()
873 request->operation[0].length = 1; in mlxbf_i2c_smbus_data_byte_func()
874 request->operation[0].flags = in mlxbf_i2c_smbus_data_byte_func()
876 request->operation[0].flags |= pec_check ? MLXBF_I2C_F_SMBUS_PEC : 0; in mlxbf_i2c_smbus_data_byte_func()
877 request->operation[0].buffer = command; in mlxbf_i2c_smbus_data_byte_func()
879 request->operation[1].length = 1; in mlxbf_i2c_smbus_data_byte_func()
880 request->operation[1].length += pec_check; in mlxbf_i2c_smbus_data_byte_func()
881 request->operation[1].flags = read ? in mlxbf_i2c_smbus_data_byte_func()
883 request->operation[1].buffer = data; in mlxbf_i2c_smbus_data_byte_func()
890 request->operation_cnt = MLXBF_I2C_SMBUS_OP_CNT_2; in mlxbf_i2c_smbus_data_word_func()
892 request->operation[0].length = 1; in mlxbf_i2c_smbus_data_word_func()
893 request->operation[0].flags = in mlxbf_i2c_smbus_data_word_func()
895 request->operation[0].flags |= pec_check ? MLXBF_I2C_F_SMBUS_PEC : 0; in mlxbf_i2c_smbus_data_word_func()
896 request->operation[0].buffer = command; in mlxbf_i2c_smbus_data_word_func()
898 request->operation[1].length = 2; in mlxbf_i2c_smbus_data_word_func()
899 request->operation[1].length += pec_check; in mlxbf_i2c_smbus_data_word_func()
900 request->operation[1].flags = read ? in mlxbf_i2c_smbus_data_word_func()
902 request->operation[1].buffer = data; in mlxbf_i2c_smbus_data_word_func()
910 request->operation_cnt = MLXBF_I2C_SMBUS_OP_CNT_2; in mlxbf_i2c_smbus_i2c_block_func()
912 request->operation[0].length = 1; in mlxbf_i2c_smbus_i2c_block_func()
913 request->operation[0].flags = in mlxbf_i2c_smbus_i2c_block_func()
915 request->operation[0].flags |= pec_check ? MLXBF_I2C_F_SMBUS_PEC : 0; in mlxbf_i2c_smbus_i2c_block_func()
916 request->operation[0].buffer = command; in mlxbf_i2c_smbus_i2c_block_func()
923 request->operation[1].length = in mlxbf_i2c_smbus_i2c_block_func()
926 request->operation[1].flags = read ? in mlxbf_i2c_smbus_i2c_block_func()
932 request->operation[1].buffer = data + 1; in mlxbf_i2c_smbus_i2c_block_func()
934 *data_len = request->operation[1].length; in mlxbf_i2c_smbus_i2c_block_func()
945 request->operation_cnt = MLXBF_I2C_SMBUS_OP_CNT_2; in mlxbf_i2c_smbus_block_func()
947 request->operation[0].length = 1; in mlxbf_i2c_smbus_block_func()
948 request->operation[0].flags = in mlxbf_i2c_smbus_block_func()
950 request->operation[0].flags |= MLXBF_I2C_F_SMBUS_BLOCK; in mlxbf_i2c_smbus_block_func()
951 request->operation[0].flags |= pec_check ? MLXBF_I2C_F_SMBUS_PEC : 0; in mlxbf_i2c_smbus_block_func()
952 request->operation[0].buffer = command; in mlxbf_i2c_smbus_block_func()
954 request->operation[1].length = in mlxbf_i2c_smbus_block_func()
957 request->operation[1].flags = read ? in mlxbf_i2c_smbus_block_func()
959 request->operation[1].buffer = data + 1; in mlxbf_i2c_smbus_block_func()
961 *data_len = request->operation[1].length; in mlxbf_i2c_smbus_block_func()
972 request->operation_cnt = MLXBF_I2C_SMBUS_OP_CNT_3; in mlxbf_i2c_smbus_process_call_func()
974 request->operation[0].length = 1; in mlxbf_i2c_smbus_process_call_func()
975 request->operation[0].flags = in mlxbf_i2c_smbus_process_call_func()
977 request->operation[0].flags |= MLXBF_I2C_F_SMBUS_BLOCK; in mlxbf_i2c_smbus_process_call_func()
978 request->operation[0].flags |= pec_check ? MLXBF_I2C_F_SMBUS_PEC : 0; in mlxbf_i2c_smbus_process_call_func()
979 request->operation[0].buffer = command; in mlxbf_i2c_smbus_process_call_func()
981 request->operation[1].length = 2; in mlxbf_i2c_smbus_process_call_func()
982 request->operation[1].flags = MLXBF_I2C_F_WRITE; in mlxbf_i2c_smbus_process_call_func()
983 request->operation[1].buffer = data; in mlxbf_i2c_smbus_process_call_func()
985 request->operation[2].length = 3; in mlxbf_i2c_smbus_process_call_func()
986 request->operation[2].flags = MLXBF_I2C_F_READ; in mlxbf_i2c_smbus_process_call_func()
987 request->operation[2].buffer = data; in mlxbf_i2c_smbus_process_call_func()
997 request->operation_cnt = MLXBF_I2C_SMBUS_OP_CNT_3; in mlxbf_i2c_smbus_blk_process_call_func()
999 request->operation[0].length = 1; in mlxbf_i2c_smbus_blk_process_call_func()
1000 request->operation[0].flags = in mlxbf_i2c_smbus_blk_process_call_func()
1002 request->operation[0].flags |= MLXBF_I2C_F_SMBUS_BLOCK; in mlxbf_i2c_smbus_blk_process_call_func()
1003 request->operation[0].flags |= (pec_check) ? MLXBF_I2C_F_SMBUS_PEC : 0; in mlxbf_i2c_smbus_blk_process_call_func()
1004 request->operation[0].buffer = command; in mlxbf_i2c_smbus_blk_process_call_func()
1009 request->operation[1].length = length - pec_check; in mlxbf_i2c_smbus_blk_process_call_func()
1010 request->operation[1].flags = MLXBF_I2C_F_WRITE; in mlxbf_i2c_smbus_blk_process_call_func()
1011 request->operation[1].buffer = data; in mlxbf_i2c_smbus_blk_process_call_func()
1013 request->operation[2].length = length; in mlxbf_i2c_smbus_blk_process_call_func()
1014 request->operation[2].flags = MLXBF_I2C_F_READ; in mlxbf_i2c_smbus_blk_process_call_func()
1015 request->operation[2].buffer = data; in mlxbf_i2c_smbus_blk_process_call_func()
1024 return priv->chip->type == type; in mlxbf_i2c_has_chip_type()
1030 const struct mlxbf_i2c_chip_info *chip = priv->chip; in mlxbf_i2c_get_shared_resource()
1035 res = chip->shared_res[res_idx]; in mlxbf_i2c_get_shared_resource()
1036 if (res && res->type == type) in mlxbf_i2c_get_shared_resource()
1048 struct device *dev = &pdev->dev; in mlxbf_i2c_init_resource()
1051 return -EINVAL; in mlxbf_i2c_init_resource()
1056 return -ENOMEM; in mlxbf_i2c_init_resource()
1058 tmp_res->params = platform_get_resource(pdev, IORESOURCE_MEM, type); in mlxbf_i2c_init_resource()
1059 if (!tmp_res->params) { in mlxbf_i2c_init_resource()
1061 return -EIO; in mlxbf_i2c_init_resource()
1064 tmp_res->io = devm_ioremap_resource(dev, tmp_res->params); in mlxbf_i2c_init_resource()
1065 if (IS_ERR(tmp_res->io)) { in mlxbf_i2c_init_resource()
1067 return PTR_ERR(tmp_res->io); in mlxbf_i2c_init_resource()
1070 tmp_res->type = type; in mlxbf_i2c_init_resource()
1087 * Time = --------- x 10^9 => Ticks = Time x Frequency x 10^-9 in mlxbf_i2c_get_ticks()
1090 frequency = priv->frequency; in mlxbf_i2c_get_ticks()
1115 timer = mlxbf_i2c_set_timer(priv, timings->scl_high, in mlxbf_i2c_set_timings()
1118 timer |= mlxbf_i2c_set_timer(priv, timings->scl_low, in mlxbf_i2c_set_timings()
1121 writel(timer, priv->smbus->io + in mlxbf_i2c_set_timings()
1124 timer = mlxbf_i2c_set_timer(priv, timings->sda_rise, false, in mlxbf_i2c_set_timings()
1126 timer |= mlxbf_i2c_set_timer(priv, timings->sda_fall, false, in mlxbf_i2c_set_timings()
1128 timer |= mlxbf_i2c_set_timer(priv, timings->scl_rise, false, in mlxbf_i2c_set_timings()
1130 timer |= mlxbf_i2c_set_timer(priv, timings->scl_fall, false, in mlxbf_i2c_set_timings()
1132 writel(timer, priv->smbus->io + in mlxbf_i2c_set_timings()
1135 timer = mlxbf_i2c_set_timer(priv, timings->hold_start, true, in mlxbf_i2c_set_timings()
1137 timer |= mlxbf_i2c_set_timer(priv, timings->hold_data, true, in mlxbf_i2c_set_timings()
1139 writel(timer, priv->smbus->io + MLXBF_I2C_SMBUS_TIMER_THOLD); in mlxbf_i2c_set_timings()
1141 timer = mlxbf_i2c_set_timer(priv, timings->setup_start, true, in mlxbf_i2c_set_timings()
1143 timer |= mlxbf_i2c_set_timer(priv, timings->setup_stop, true, in mlxbf_i2c_set_timings()
1145 writel(timer, priv->smbus->io + in mlxbf_i2c_set_timings()
1148 timer = mlxbf_i2c_set_timer(priv, timings->setup_data, true, in mlxbf_i2c_set_timings()
1150 writel(timer, priv->smbus->io + MLXBF_I2C_SMBUS_TIMER_TSETUP_DATA); in mlxbf_i2c_set_timings()
1152 timer = mlxbf_i2c_set_timer(priv, timings->buf, false, in mlxbf_i2c_set_timings()
1154 timer |= mlxbf_i2c_set_timer(priv, timings->thigh_max, false, in mlxbf_i2c_set_timings()
1156 writel(timer, priv->smbus->io + MLXBF_I2C_SMBUS_THIGH_MAX_TBUF); in mlxbf_i2c_set_timings()
1158 timer = timings->timeout; in mlxbf_i2c_set_timings()
1159 writel(timer, priv->smbus->io + MLXBF_I2C_SMBUS_SCL_LOW_TIMEOUT); in mlxbf_i2c_set_timings()
1169 * Note that the mlxbf_i2c_timings->timeout value is not related to the
1188 .timeout = 106500
1204 .timeout = 106500
1220 .timeout = 106500
1228 struct device *dev = &pdev->dev; in mlxbf_i2c_init_timings()
1233 ret = device_property_read_u32(dev, "clock-frequency", &config_khz); in mlxbf_i2c_init_timings()
1265 struct device *dev = &pdev->dev; in mlxbf_i2c_get_gpio()
1271 return -EPERM; in mlxbf_i2c_get_gpio()
1278 lockdep_assert_held(gpio_res->lock); in mlxbf_i2c_get_gpio()
1281 if (gpio_res->io) in mlxbf_i2c_get_gpio()
1284 params = gpio_res->params; in mlxbf_i2c_get_gpio()
1287 if (!devm_request_mem_region(dev, params->start, size, params->name)) in mlxbf_i2c_get_gpio()
1288 return -EFAULT; in mlxbf_i2c_get_gpio()
1290 gpio_res->io = devm_ioremap(dev, params->start, size); in mlxbf_i2c_get_gpio()
1291 if (!gpio_res->io) { in mlxbf_i2c_get_gpio()
1292 devm_release_mem_region(dev, params->start, size); in mlxbf_i2c_get_gpio()
1293 return -ENOMEM; in mlxbf_i2c_get_gpio()
1303 struct device *dev = &pdev->dev; in mlxbf_i2c_release_gpio()
1310 mutex_lock(gpio_res->lock); in mlxbf_i2c_release_gpio()
1312 if (gpio_res->io) { in mlxbf_i2c_release_gpio()
1314 params = gpio_res->params; in mlxbf_i2c_release_gpio()
1315 devm_iounmap(dev, gpio_res->io); in mlxbf_i2c_release_gpio()
1316 devm_release_mem_region(dev, params->start, in mlxbf_i2c_release_gpio()
1320 mutex_unlock(gpio_res->lock); in mlxbf_i2c_release_gpio()
1329 struct device *dev = &pdev->dev; in mlxbf_i2c_get_corepll()
1336 return -EPERM; in mlxbf_i2c_get_corepll()
1343 lockdep_assert_held(corepll_res->lock); in mlxbf_i2c_get_corepll()
1346 if (corepll_res->io) in mlxbf_i2c_get_corepll()
1349 params = corepll_res->params; in mlxbf_i2c_get_corepll()
1352 if (!devm_request_mem_region(dev, params->start, size, params->name)) in mlxbf_i2c_get_corepll()
1353 return -EFAULT; in mlxbf_i2c_get_corepll()
1355 corepll_res->io = devm_ioremap(dev, params->start, size); in mlxbf_i2c_get_corepll()
1356 if (!corepll_res->io) { in mlxbf_i2c_get_corepll()
1357 devm_release_mem_region(dev, params->start, size); in mlxbf_i2c_get_corepll()
1358 return -ENOMEM; in mlxbf_i2c_get_corepll()
1368 struct device *dev = &pdev->dev; in mlxbf_i2c_release_corepll()
1374 mutex_lock(corepll_res->lock); in mlxbf_i2c_release_corepll()
1376 if (corepll_res->io) { in mlxbf_i2c_release_corepll()
1378 params = corepll_res->params; in mlxbf_i2c_release_corepll()
1379 devm_iounmap(dev, corepll_res->io); in mlxbf_i2c_release_corepll()
1380 devm_release_mem_region(dev, params->start, in mlxbf_i2c_release_corepll()
1384 mutex_unlock(corepll_res->lock); in mlxbf_i2c_release_corepll()
1393 struct device *dev = &pdev->dev; in mlxbf_i2c_init_master()
1403 return -EPERM; in mlxbf_i2c_init_master()
1411 mutex_lock(gpio_res->lock); in mlxbf_i2c_init_master()
1416 mutex_unlock(gpio_res->lock); in mlxbf_i2c_init_master()
1421 * TYU - Configuration for GPIO pins. Those pins must be asserted in in mlxbf_i2c_init_master()
1426 * First, it is not necessary to disable the bus since we are using in mlxbf_i2c_init_master()
1431 config_reg = readl(gpio_res->io + MLXBF_I2C_GPIO_0_FUNC_EN_0); in mlxbf_i2c_init_master()
1432 config_reg = MLXBF_I2C_GPIO_SMBUS_GW_ASSERT_PINS(priv->bus, in mlxbf_i2c_init_master()
1434 writel(config_reg, gpio_res->io + MLXBF_I2C_GPIO_0_FUNC_EN_0); in mlxbf_i2c_init_master()
1436 config_reg = readl(gpio_res->io + MLXBF_I2C_GPIO_0_FORCE_OE_EN); in mlxbf_i2c_init_master()
1437 config_reg = MLXBF_I2C_GPIO_SMBUS_GW_RESET_PINS(priv->bus, in mlxbf_i2c_init_master()
1439 writel(config_reg, gpio_res->io + MLXBF_I2C_GPIO_0_FORCE_OE_EN); in mlxbf_i2c_init_master()
1441 mutex_unlock(gpio_res->lock); in mlxbf_i2c_init_master()
1453 corepll_val = readl(corepll_res->io + MLXBF_I2C_CORE_PLL_REG1); in mlxbf_i2c_calculate_freq_from_tyu()
1464 * PLL_OUT_FREQ = PLL_IN_FREQ * ---------------------------- in mlxbf_i2c_calculate_freq_from_tyu()
1483 corepll_reg1_val = readl(corepll_res->io + MLXBF_I2C_CORE_PLL_REG1); in mlxbf_i2c_calculate_freq_from_yu()
1484 corepll_reg2_val = readl(corepll_res->io + MLXBF_I2C_CORE_PLL_REG2); in mlxbf_i2c_calculate_freq_from_yu()
1495 * PLL_OUT_FREQ = PLL_IN_FREQ * ---------------------------- in mlxbf_i2c_calculate_freq_from_yu()
1510 const struct mlxbf_i2c_chip_info *chip = priv->chip; in mlxbf_i2c_calculate_corepll_freq()
1512 struct device *dev = &pdev->dev; in mlxbf_i2c_calculate_corepll_freq()
1513 u64 *freq = &priv->frequency; in mlxbf_i2c_calculate_corepll_freq()
1519 return -EPERM; in mlxbf_i2c_calculate_corepll_freq()
1529 mutex_lock(corepll_res->lock); in mlxbf_i2c_calculate_corepll_freq()
1531 if (!chip->calculate_freq) { in mlxbf_i2c_calculate_corepll_freq()
1532 mutex_unlock(corepll_res->lock); in mlxbf_i2c_calculate_corepll_freq()
1533 return -EPERM; in mlxbf_i2c_calculate_corepll_freq()
1539 mutex_unlock(corepll_res->lock); in mlxbf_i2c_calculate_corepll_freq()
1543 mlxbf_i2c_corepll_frequency = chip->calculate_freq(corepll_res); in mlxbf_i2c_calculate_corepll_freq()
1545 mutex_unlock(corepll_res->lock); in mlxbf_i2c_calculate_corepll_freq()
1562 return -EPERM; in mlxbf_slave_enable()
1568 * Read the slave registers. There are 4 * 32-bit slave registers. in mlxbf_slave_enable()
1569 * Each slave register can hold up to 4 * 8-bit slave configuration in mlxbf_slave_enable()
1570 * (7-bit address, 1 status bit (1 if enabled, 0 if not)). in mlxbf_slave_enable()
1573 slave_reg = readl(priv->smbus->io + in mlxbf_slave_enable()
1618 return -EINVAL; /* No room for a new slave address. */ in mlxbf_slave_enable()
1631 writel(slave_reg, priv->smbus->io + MLXBF_I2C_SMBUS_SLAVE_ADDR_CFG + in mlxbf_slave_enable()
1641 struct i2c_client *client = priv->slave; in mlxbf_slave_disable()
1646 addr = client->addr; in mlxbf_slave_disable()
1651 * Read the slave registers. There are 4 * 32-bit slave registers. in mlxbf_slave_disable()
1652 * Each slave register can hold up to 4 * 8-bit slave configuration in mlxbf_slave_disable()
1653 * (7-bit address, 1 status bit (1 if enabled, 0 if not)). in mlxbf_slave_disable()
1656 slave_reg = readl(priv->smbus->io + in mlxbf_slave_disable()
1696 writel(slave_reg, priv->smbus->io + MLXBF_I2C_SMBUS_SLAVE_ADDR_CFG + in mlxbf_slave_disable()
1711 * Unlike BlueField-1 platform, the coalesce registers is a dedicated in mlxbf_i2c_init_coalesce()
1718 return -EPERM; in mlxbf_i2c_init_coalesce()
1725 lockdep_assert_held(mlxbf_i2c_gpio_res->lock); in mlxbf_i2c_init_coalesce()
1728 if (coalesce_res->io) { in mlxbf_i2c_init_coalesce()
1729 priv->coalesce = coalesce_res; in mlxbf_i2c_init_coalesce()
1733 params = coalesce_res->params; in mlxbf_i2c_init_coalesce()
1736 if (!request_mem_region(params->start, size, params->name)) in mlxbf_i2c_init_coalesce()
1737 return -EFAULT; in mlxbf_i2c_init_coalesce()
1739 coalesce_res->io = ioremap(params->start, size); in mlxbf_i2c_init_coalesce()
1740 if (!coalesce_res->io) { in mlxbf_i2c_init_coalesce()
1741 release_mem_region(params->start, size); in mlxbf_i2c_init_coalesce()
1742 return -ENOMEM; in mlxbf_i2c_init_coalesce()
1745 priv->coalesce = coalesce_res; in mlxbf_i2c_init_coalesce()
1748 ret = mlxbf_i2c_init_resource(pdev, &priv->coalesce, in mlxbf_i2c_init_coalesce()
1759 struct device *dev = &pdev->dev; in mlxbf_i2c_release_coalesce()
1763 coalesce_res = priv->coalesce; in mlxbf_i2c_release_coalesce()
1765 if (coalesce_res->io) { in mlxbf_i2c_release_coalesce()
1766 params = coalesce_res->params; in mlxbf_i2c_release_coalesce()
1769 mutex_lock(coalesce_res->lock); in mlxbf_i2c_release_coalesce()
1770 iounmap(coalesce_res->io); in mlxbf_i2c_release_coalesce()
1771 release_mem_region(params->start, size); in mlxbf_i2c_release_coalesce()
1772 mutex_unlock(coalesce_res->lock); in mlxbf_i2c_release_coalesce()
1774 devm_release_mem_region(dev, params->start, size); in mlxbf_i2c_release_coalesce()
1784 struct device *dev = &pdev->dev; in mlxbf_i2c_init_slave()
1789 writel(0, priv->smbus->io + MLXBF_I2C_SMBUS_SLAVE_FSM); in mlxbf_i2c_init_slave()
1798 writel(~0, priv->slv_cause->io + MLXBF_I2C_CAUSE_OR_CLEAR); in mlxbf_i2c_init_slave()
1801 writel(int_reg, priv->slv_cause->io + MLXBF_I2C_CAUSE_OR_EVTEN0); in mlxbf_i2c_init_slave()
1804 writel(0x1, priv->smbus->io + MLXBF_I2C_SMBUS_SLAVE_READY); in mlxbf_i2c_init_slave()
1819 const struct mlxbf_i2c_chip_info *chip = priv->chip; in mlxbf_i2c_has_coalesce()
1826 slave_shift = chip->type != MLXBF_I2C_CHIP_TYPE_1 ? in mlxbf_i2c_has_coalesce()
1828 priv->bus + MLXBF_I2C_CAUSE_TYU_SLAVE_BIT; in mlxbf_i2c_has_coalesce()
1830 coalesce0_reg = readl(priv->coalesce->io + MLXBF_I2C_CAUSE_COALESCE_0); in mlxbf_i2c_has_coalesce()
1837 cause_reg = readl(priv->slv_cause->io + MLXBF_I2C_CAUSE_ARBITER); in mlxbf_i2c_has_coalesce()
1844 writel(~0x0, priv->slv_cause->io + MLXBF_I2C_CAUSE_OR_CLEAR); in mlxbf_i2c_has_coalesce()
1850 u32 timeout) in mlxbf_smbus_slave_wait_for_idle() argument
1855 if (mlxbf_smbus_poll(priv->slv_cause->io, addr, mask, false, timeout)) in mlxbf_smbus_slave_wait_for_idle()
1861 /* Send byte to 'external' smbus master. */
1866 struct i2c_client *slave = priv->slave; in mlxbf_smbus_irq_send()
1871 return -EINVAL; in mlxbf_smbus_irq_send()
1884 data32 = ioread32be(priv->smbus->io + in mlxbf_smbus_irq_send()
1897 if (slave->addr != addr) in mlxbf_smbus_irq_send()
1898 return -EINVAL; in mlxbf_smbus_irq_send()
1937 write_size = (byte_cnt - 1) & 0x7f; in mlxbf_smbus_irq_send()
1943 pec_en = 0; /* Disable PEC since it is not supported. */ in mlxbf_smbus_irq_send()
1950 writel(control32, priv->smbus->io + MLXBF_I2C_SMBUS_SLAVE_GW); in mlxbf_smbus_irq_send()
1959 writel(0x0, priv->smbus->io + MLXBF_I2C_SMBUS_SLAVE_RS_MASTER_BYTES); in mlxbf_smbus_irq_send()
1960 writel(0x0, priv->smbus->io + MLXBF_I2C_SMBUS_SLAVE_PEC); in mlxbf_smbus_irq_send()
1961 writel(0x1, priv->smbus->io + MLXBF_I2C_SMBUS_SLAVE_READY); in mlxbf_smbus_irq_send()
1966 /* Receive bytes from 'external' smbus master. */
1970 struct i2c_client *slave = priv->slave; in mlxbf_smbus_irq_recv()
1975 return -EINVAL; in mlxbf_smbus_irq_recv()
1983 if (slave->addr != addr) in mlxbf_smbus_irq_recv()
1984 return -EINVAL; in mlxbf_smbus_irq_recv()
2006 writel(0x0, priv->smbus->io + MLXBF_I2C_SMBUS_SLAVE_RS_MASTER_BYTES); in mlxbf_smbus_irq_recv()
2007 writel(0x0, priv->smbus->io + MLXBF_I2C_SMBUS_SLAVE_PEC); in mlxbf_smbus_irq_recv()
2008 writel(0x1, priv->smbus->io + MLXBF_I2C_SMBUS_SLAVE_READY); in mlxbf_smbus_irq_recv()
2024 * - Receive data and send response to master. in mlxbf_smbus_irq()
2025 * - Send data and release slave GW. in mlxbf_smbus_irq()
2038 * bytes from/to master. These are defined by 8-bits each. If the lower in mlxbf_smbus_irq()
2043 rw_bytes_reg = readl(priv->smbus->io + in mlxbf_smbus_irq()
2054 * specified in the SMBus standard, block transactions cannot exceed in mlxbf_smbus_irq()
2087 dev_dbg(&adap->dev, "smbus quick, slave 0x%02x\n", addr); in mlxbf_i2c_smbus_xfer()
2092 read ? &data->byte : &command, read, in mlxbf_i2c_smbus_xfer()
2094 dev_dbg(&adap->dev, "smbus %s byte, slave 0x%02x.\n", in mlxbf_i2c_smbus_xfer()
2099 mlxbf_i2c_smbus_data_byte_func(&request, &command, &data->byte, in mlxbf_i2c_smbus_xfer()
2101 dev_dbg(&adap->dev, "smbus %s byte data at 0x%02x, slave 0x%02x.\n", in mlxbf_i2c_smbus_xfer()
2107 (u8 *)&data->word, read, pec); in mlxbf_i2c_smbus_xfer()
2108 dev_dbg(&adap->dev, "smbus %s word data at 0x%02x, slave 0x%02x.\n", in mlxbf_i2c_smbus_xfer()
2113 byte_cnt = data->block[0]; in mlxbf_i2c_smbus_xfer()
2114 mlxbf_i2c_smbus_i2c_block_func(&request, &command, data->block, in mlxbf_i2c_smbus_xfer()
2116 dev_dbg(&adap->dev, "i2c %s block data, %d bytes at 0x%02x, slave 0x%02x.\n", in mlxbf_i2c_smbus_xfer()
2121 byte_cnt = read ? I2C_SMBUS_BLOCK_MAX : data->block[0]; in mlxbf_i2c_smbus_xfer()
2122 mlxbf_i2c_smbus_block_func(&request, &command, data->block, in mlxbf_i2c_smbus_xfer()
2124 dev_dbg(&adap->dev, "smbus %s block data, %d bytes at 0x%02x, slave 0x%02x.\n", in mlxbf_i2c_smbus_xfer()
2130 (u8 *)&data->word, pec); in mlxbf_i2c_smbus_xfer()
2131 dev_dbg(&adap->dev, "process call, wr/rd at 0x%02x, slave 0x%02x.\n", in mlxbf_i2c_smbus_xfer()
2136 byte_cnt = data->block[0]; in mlxbf_i2c_smbus_xfer()
2138 data->block, &byte_cnt, in mlxbf_i2c_smbus_xfer()
2140 dev_dbg(&adap->dev, "block process call, wr/rd %d bytes, slave 0x%02x.\n", in mlxbf_i2c_smbus_xfer()
2145 dev_dbg(&adap->dev, "Unsupported I2C/SMBus command %d\n", in mlxbf_i2c_smbus_xfer()
2147 return -EOPNOTSUPP; in mlxbf_i2c_smbus_xfer()
2157 struct mlxbf_i2c_priv *priv = i2c_get_adapdata(slave->adapter); in mlxbf_i2c_reg_slave()
2160 if (priv->slave) in mlxbf_i2c_reg_slave()
2161 return -EBUSY; in mlxbf_i2c_reg_slave()
2167 if (slave->flags & (I2C_CLIENT_TEN | I2C_CLIENT_PEC)) in mlxbf_i2c_reg_slave()
2168 return -EAFNOSUPPORT; in mlxbf_i2c_reg_slave()
2170 ret = mlxbf_slave_enable(priv, slave->addr); in mlxbf_i2c_reg_slave()
2174 priv->slave = slave; in mlxbf_i2c_reg_slave()
2181 struct mlxbf_i2c_priv *priv = i2c_get_adapdata(slave->adapter); in mlxbf_i2c_unreg_slave()
2184 WARN_ON(!priv->slave); in mlxbf_i2c_unreg_slave()
2186 /* Unregister slave, i.e. disable the slave address in hardware. */ in mlxbf_i2c_unreg_slave()
2191 priv->slave = NULL; in mlxbf_i2c_unreg_slave()
2234 .compatible = "mellanox,i2c-mlxbf1",
2238 .compatible = "mellanox,i2c-mlxbf2",
2264 return -ENOENT; in mlxbf_i2c_acpi_probe()
2268 return -ENXIO; in mlxbf_i2c_acpi_probe()
2272 return -ENODEV; in mlxbf_i2c_acpi_probe()
2274 priv->chip = (struct mlxbf_i2c_chip_info *)aid->driver_data; in mlxbf_i2c_acpi_probe()
2279 return -ENODEV; in mlxbf_i2c_acpi_probe()
2284 priv->bus = bus_id; in mlxbf_i2c_acpi_probe()
2291 return -ENOENT; in mlxbf_i2c_acpi_probe()
2298 int bus_id = -1; in mlxbf_i2c_of_probe()
2300 if (IS_ENABLED(CONFIG_OF) && dev->of_node) { in mlxbf_i2c_of_probe()
2301 oid = of_match_node(mlxbf_i2c_dt_ids, dev->of_node); in mlxbf_i2c_of_probe()
2303 return -ENODEV; in mlxbf_i2c_of_probe()
2305 priv->chip = oid->data; in mlxbf_i2c_of_probe()
2307 bus_id = of_alias_get_id(dev->of_node, "i2c"); in mlxbf_i2c_of_probe()
2309 priv->bus = bus_id; in mlxbf_i2c_of_probe()
2322 struct device *dev = &pdev->dev; in mlxbf_i2c_probe()
2329 return -ENOMEM; in mlxbf_i2c_probe()
2332 if (ret < 0 && ret != -ENOENT && ret != -ENXIO) in mlxbf_i2c_probe()
2338 ret = mlxbf_i2c_init_resource(pdev, &priv->smbus, in mlxbf_i2c_probe()
2341 dev_err(dev, "Cannot fetch smbus resource info"); in mlxbf_i2c_probe()
2345 ret = mlxbf_i2c_init_resource(pdev, &priv->mst_cause, in mlxbf_i2c_probe()
2352 ret = mlxbf_i2c_init_resource(pdev, &priv->slv_cause, in mlxbf_i2c_probe()
2359 adap = &priv->adap; in mlxbf_i2c_probe()
2360 adap->owner = THIS_MODULE; in mlxbf_i2c_probe()
2361 adap->class = I2C_CLASS_HWMON; in mlxbf_i2c_probe()
2362 adap->algo = &mlxbf_i2c_algo; in mlxbf_i2c_probe()
2363 adap->quirks = &mlxbf_i2c_quirks; in mlxbf_i2c_probe()
2364 adap->dev.parent = dev; in mlxbf_i2c_probe()
2365 adap->dev.of_node = dev->of_node; in mlxbf_i2c_probe()
2366 adap->nr = priv->bus; in mlxbf_i2c_probe()
2368 snprintf(adap->name, sizeof(adap->name), "i2c%d", adap->nr); in mlxbf_i2c_probe()
2376 priv->frequency = MLXBF_I2C_COREPLL_FREQ; in mlxbf_i2c_probe()
2389 dev_err(dev, "failed to initialize smbus master %d", in mlxbf_i2c_probe()
2390 priv->bus); in mlxbf_i2c_probe()
2409 priv->irq = irq; in mlxbf_i2c_probe()
2427 struct device *dev = &pdev->dev; in mlxbf_i2c_remove()
2430 params = priv->smbus->params; in mlxbf_i2c_remove()
2431 devm_release_mem_region(dev, params->start, resource_size(params)); in mlxbf_i2c_remove()
2433 params = priv->mst_cause->params; in mlxbf_i2c_remove()
2434 devm_release_mem_region(dev, params->start, resource_size(params)); in mlxbf_i2c_remove()
2436 params = priv->slv_cause->params; in mlxbf_i2c_remove()
2437 devm_release_mem_region(dev, params->start, resource_size(params)); in mlxbf_i2c_remove()
2444 if (--mlxbf_i2c_bus_count == 0) { in mlxbf_i2c_remove()
2451 devm_free_irq(dev, priv->irq, priv); in mlxbf_i2c_remove()
2453 i2c_del_adapter(&priv->adap); in mlxbf_i2c_remove()
2462 .name = "i2c-mlxbf",