Lines Matching +full:stm32f7 +full:- +full:i2c
1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for STMicroelectronics STM32F7 I2C controller
5 * This I2C controller is described in the STM32F75xxx and STM32F74xxx Soc
14 * This driver is based on i2c-stm32f4.c
20 #include <linux/i2c.h>
21 #include <linux/i2c-smbus.h>
38 #include "i2c-stm32.h"
40 /* STM32F7 I2C registers */
52 /* STM32F7 I2C control 1 */
82 /* STM32F7 I2C control 2 */
99 /* STM32F7 I2C Own Address 1 */
112 /* STM32F7 I2C Own Address 2 */
122 /* STM32F7 I2C Interrupt Status */
140 /* STM32F7 I2C Interrupt Clear */
148 /* STM32F7 I2C Timing */
183 * struct stm32f7_i2c_regs - i2c f7 registers backup
199 * struct stm32f7_i2c_spec - private i2c specification timing
200 * @rate: I2C bus speed (Hz)
221 * struct stm32f7_i2c_setup - private I2C timing setup parameters
222 * @speed_freq: I2C speed frequency (Hz)
223 * @clock_src: I2C clock source frequency (Hz)
226 * @dnf: Digital filter coefficient (0-16)
241 * struct stm32f7_i2c_timings - private I2C output parameters
259 * struct stm32f7_i2c_msg - client specific data
260 * @addr: 8-bit or 10-bit slave addr, including r/w bit
264 * @stop: last I2C msg to be sent, i.e. STOP to be generated
265 * @smbus: boolean to know if the I2C IP is used in SMBus mode
268 * SMBus block read and SMBus block write - block read process call protocols
271 * This buffer has to be 32-bit aligned to be compliant with memory address
287 * struct stm32f7_i2c_dev - private data of the controller
288 * @adap: I2C adapter for this controller
291 * @complete: completion of I2C message
292 * @clk: hw i2c clock
293 * @bus_rate: I2C clock frequency of the controller
295 * @msg_num: number of I2C messages to be executed
297 * @f7_msg: customized i2c msg for driver usage
298 * @setup: I2C timing input setup
299 * @timing: I2C computed timings
300 * @slave: list of slave devices registered on the I2C bus
302 * @backup_regs: backup of i2c controller registers (for suspend/resume)
304 * @master_mode: boolean to know in which mode the I2C is running (master or
314 * @host_notify_client: SMBus host-notify client
346 * All these values are coming from I2C Specification, Version 6.0, 4th of
350 * and Fast-mode Plus I2C-bus devices
412 stm32f7_i2c_clr_bits(i2c_dev->base + STM32F7_I2C_CR1, mask); in stm32f7_i2c_disable_irq()
423 return ERR_PTR(-EINVAL); in stm32f7_get_specs()
434 setup->clock_src); in stm32f7_i2c_compute_timing()
436 setup->speed_freq); in stm32f7_i2c_compute_timing()
449 specs = stm32f7_get_specs(setup->speed_freq); in stm32f7_i2c_compute_timing()
450 if (specs == ERR_PTR(-EINVAL)) { in stm32f7_i2c_compute_timing()
451 dev_err(i2c_dev->dev, "speed out of bound {%d}\n", in stm32f7_i2c_compute_timing()
452 setup->speed_freq); in stm32f7_i2c_compute_timing()
453 return -EINVAL; in stm32f7_i2c_compute_timing()
456 if ((setup->rise_time > specs->rise_max) || in stm32f7_i2c_compute_timing()
457 (setup->fall_time > specs->fall_max)) { in stm32f7_i2c_compute_timing()
458 dev_err(i2c_dev->dev, in stm32f7_i2c_compute_timing()
460 setup->rise_time, specs->rise_max, in stm32f7_i2c_compute_timing()
461 setup->fall_time, specs->fall_max); in stm32f7_i2c_compute_timing()
462 return -EINVAL; in stm32f7_i2c_compute_timing()
465 if (setup->dnf > STM32F7_I2C_DNF_MAX) { in stm32f7_i2c_compute_timing()
466 dev_err(i2c_dev->dev, in stm32f7_i2c_compute_timing()
468 setup->dnf, STM32F7_I2C_DNF_MAX); in stm32f7_i2c_compute_timing()
469 return -EINVAL; in stm32f7_i2c_compute_timing()
474 (setup->analog_filter ? in stm32f7_i2c_compute_timing()
477 (setup->analog_filter ? in stm32f7_i2c_compute_timing()
479 dnf_delay = setup->dnf * i2cclk; in stm32f7_i2c_compute_timing()
481 sdadel_min = specs->hddat_min + setup->fall_time - in stm32f7_i2c_compute_timing()
482 af_delay_min - (setup->dnf + 3) * i2cclk; in stm32f7_i2c_compute_timing()
484 sdadel_max = specs->vddat_max - setup->rise_time - in stm32f7_i2c_compute_timing()
485 af_delay_max - (setup->dnf + 4) * i2cclk; in stm32f7_i2c_compute_timing()
487 scldel_min = setup->rise_time + specs->sudat_min; in stm32f7_i2c_compute_timing()
494 dev_dbg(i2c_dev->dev, "SDADEL(min/max): %i/%i, SCLDEL(Min): %i\n", in stm32f7_i2c_compute_timing()
514 ret = -ENOMEM; in stm32f7_i2c_compute_timing()
518 v->presc = p; in stm32f7_i2c_compute_timing()
519 v->scldel = l; in stm32f7_i2c_compute_timing()
520 v->sdadel = a; in stm32f7_i2c_compute_timing()
523 list_add_tail(&v->node, in stm32f7_i2c_compute_timing()
535 dev_err(i2c_dev->dev, "no Prescaler solution\n"); in stm32f7_i2c_compute_timing()
536 ret = -EPERM; in stm32f7_i2c_compute_timing()
542 clk_max = NSEC_PER_SEC / RATE_MIN(setup->speed_freq); in stm32f7_i2c_compute_timing()
543 clk_min = NSEC_PER_SEC / setup->speed_freq; in stm32f7_i2c_compute_timing()
548 * - SCL Low Period has to be higher than SCL Clock Low Period in stm32f7_i2c_compute_timing()
549 * defined by I2C Specification. I2C Clock has to be lower than in stm32f7_i2c_compute_timing()
550 * (SCL Low Period - Analog/Digital filters) / 4. in stm32f7_i2c_compute_timing()
551 * - SCL High Period has to be lower than SCL Clock High Period in stm32f7_i2c_compute_timing()
552 * defined by I2C Specification in stm32f7_i2c_compute_timing()
553 * - I2C Clock has to be lower than SCL High Period in stm32f7_i2c_compute_timing()
556 u32 prescaler = (v->presc + 1) * i2cclk; in stm32f7_i2c_compute_timing()
561 if ((tscl_l < specs->l_min) || in stm32f7_i2c_compute_timing()
563 ((tscl_l - af_delay_min - dnf_delay) / 4))) { in stm32f7_i2c_compute_timing()
570 setup->rise_time + setup->fall_time; in stm32f7_i2c_compute_timing()
573 (tscl_h >= specs->h_min) && in stm32f7_i2c_compute_timing()
575 int clk_error = tscl - i2cbus; in stm32f7_i2c_compute_timing()
578 clk_error = -clk_error; in stm32f7_i2c_compute_timing()
582 v->scll = l; in stm32f7_i2c_compute_timing()
583 v->sclh = h; in stm32f7_i2c_compute_timing()
592 dev_err(i2c_dev->dev, "no solution at all\n"); in stm32f7_i2c_compute_timing()
593 ret = -EPERM; in stm32f7_i2c_compute_timing()
597 output->presc = s->presc; in stm32f7_i2c_compute_timing()
598 output->scldel = s->scldel; in stm32f7_i2c_compute_timing()
599 output->sdadel = s->sdadel; in stm32f7_i2c_compute_timing()
600 output->scll = s->scll; in stm32f7_i2c_compute_timing()
601 output->sclh = s->sclh; in stm32f7_i2c_compute_timing()
603 dev_dbg(i2c_dev->dev, in stm32f7_i2c_compute_timing()
605 output->presc, in stm32f7_i2c_compute_timing()
606 output->scldel, output->sdadel, in stm32f7_i2c_compute_timing()
607 output->scll, output->sclh); in stm32f7_i2c_compute_timing()
612 list_del(&v->node); in stm32f7_i2c_compute_timing()
623 while (--i) in stm32f7_get_lower_rate()
636 t->bus_freq_hz = I2C_MAX_STANDARD_MODE_FREQ; in stm32f7_i2c_setup_timing()
637 t->scl_rise_ns = i2c_dev->setup.rise_time; in stm32f7_i2c_setup_timing()
638 t->scl_fall_ns = i2c_dev->setup.fall_time; in stm32f7_i2c_setup_timing()
640 i2c_parse_fw_timings(i2c_dev->dev, t, false); in stm32f7_i2c_setup_timing()
642 if (t->bus_freq_hz > I2C_MAX_FAST_MODE_PLUS_FREQ) { in stm32f7_i2c_setup_timing()
643 dev_err(i2c_dev->dev, "Invalid bus speed (%i>%i)\n", in stm32f7_i2c_setup_timing()
644 t->bus_freq_hz, I2C_MAX_FAST_MODE_PLUS_FREQ); in stm32f7_i2c_setup_timing()
645 return -EINVAL; in stm32f7_i2c_setup_timing()
648 setup->speed_freq = t->bus_freq_hz; in stm32f7_i2c_setup_timing()
649 i2c_dev->setup.rise_time = t->scl_rise_ns; in stm32f7_i2c_setup_timing()
650 i2c_dev->setup.fall_time = t->scl_fall_ns; in stm32f7_i2c_setup_timing()
651 setup->clock_src = clk_get_rate(i2c_dev->clk); in stm32f7_i2c_setup_timing()
653 if (!setup->clock_src) { in stm32f7_i2c_setup_timing()
654 dev_err(i2c_dev->dev, "clock rate is 0\n"); in stm32f7_i2c_setup_timing()
655 return -EINVAL; in stm32f7_i2c_setup_timing()
660 &i2c_dev->timing); in stm32f7_i2c_setup_timing()
662 dev_err(i2c_dev->dev, in stm32f7_i2c_setup_timing()
663 "failed to compute I2C timings.\n"); in stm32f7_i2c_setup_timing()
664 if (setup->speed_freq <= I2C_MAX_STANDARD_MODE_FREQ) in stm32f7_i2c_setup_timing()
666 setup->speed_freq = in stm32f7_i2c_setup_timing()
667 stm32f7_get_lower_rate(setup->speed_freq); in stm32f7_i2c_setup_timing()
668 dev_warn(i2c_dev->dev, in stm32f7_i2c_setup_timing()
669 "downgrade I2C Speed Freq to (%i)\n", in stm32f7_i2c_setup_timing()
670 setup->speed_freq); in stm32f7_i2c_setup_timing()
675 dev_err(i2c_dev->dev, "Impossible to compute I2C timings.\n"); in stm32f7_i2c_setup_timing()
679 dev_dbg(i2c_dev->dev, "I2C Speed(%i), Clk Source(%i)\n", in stm32f7_i2c_setup_timing()
680 setup->speed_freq, setup->clock_src); in stm32f7_i2c_setup_timing()
681 dev_dbg(i2c_dev->dev, "I2C Rise(%i) and Fall(%i) Time\n", in stm32f7_i2c_setup_timing()
682 setup->rise_time, setup->fall_time); in stm32f7_i2c_setup_timing()
683 dev_dbg(i2c_dev->dev, "I2C Analog Filter(%s), DNF(%i)\n", in stm32f7_i2c_setup_timing()
684 (setup->analog_filter ? "On" : "Off"), setup->dnf); in stm32f7_i2c_setup_timing()
686 i2c_dev->bus_rate = setup->speed_freq; in stm32f7_i2c_setup_timing()
693 void __iomem *base = i2c_dev->base; in stm32f7_i2c_disable_dma_req()
702 struct stm32_i2c_dma *dma = i2c_dev->dma; in stm32f7_i2c_dma_callback()
703 struct device *dev = dma->chan_using->device->dev; in stm32f7_i2c_dma_callback()
706 dma_unmap_single(dev, dma->dma_buf, dma->dma_len, dma->dma_data_dir); in stm32f7_i2c_dma_callback()
707 complete(&dma->dma_complete); in stm32f7_i2c_dma_callback()
712 struct stm32f7_i2c_timings *t = &i2c_dev->timing; in stm32f7_i2c_hw_config()
716 timing |= STM32F7_I2C_TIMINGR_PRESC(t->presc); in stm32f7_i2c_hw_config()
717 timing |= STM32F7_I2C_TIMINGR_SCLDEL(t->scldel); in stm32f7_i2c_hw_config()
718 timing |= STM32F7_I2C_TIMINGR_SDADEL(t->sdadel); in stm32f7_i2c_hw_config()
719 timing |= STM32F7_I2C_TIMINGR_SCLH(t->sclh); in stm32f7_i2c_hw_config()
720 timing |= STM32F7_I2C_TIMINGR_SCLL(t->scll); in stm32f7_i2c_hw_config()
721 writel_relaxed(timing, i2c_dev->base + STM32F7_I2C_TIMINGR); in stm32f7_i2c_hw_config()
723 /* Enable I2C */ in stm32f7_i2c_hw_config()
724 if (i2c_dev->setup.analog_filter) in stm32f7_i2c_hw_config()
725 stm32f7_i2c_clr_bits(i2c_dev->base + STM32F7_I2C_CR1, in stm32f7_i2c_hw_config()
728 stm32f7_i2c_set_bits(i2c_dev->base + STM32F7_I2C_CR1, in stm32f7_i2c_hw_config()
732 stm32f7_i2c_clr_bits(i2c_dev->base + STM32F7_I2C_CR1, in stm32f7_i2c_hw_config()
734 stm32f7_i2c_set_bits(i2c_dev->base + STM32F7_I2C_CR1, in stm32f7_i2c_hw_config()
735 STM32F7_I2C_CR1_DNF(i2c_dev->setup.dnf)); in stm32f7_i2c_hw_config()
737 stm32f7_i2c_set_bits(i2c_dev->base + STM32F7_I2C_CR1, in stm32f7_i2c_hw_config()
743 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_write_tx_data()
744 void __iomem *base = i2c_dev->base; in stm32f7_i2c_write_tx_data()
746 if (f7_msg->count) { in stm32f7_i2c_write_tx_data()
747 writeb_relaxed(*f7_msg->buf++, base + STM32F7_I2C_TXDR); in stm32f7_i2c_write_tx_data()
748 f7_msg->count--; in stm32f7_i2c_write_tx_data()
754 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_read_rx_data()
755 void __iomem *base = i2c_dev->base; in stm32f7_i2c_read_rx_data()
757 if (f7_msg->count) { in stm32f7_i2c_read_rx_data()
758 *f7_msg->buf++ = readb_relaxed(base + STM32F7_I2C_RXDR); in stm32f7_i2c_read_rx_data()
759 f7_msg->count--; in stm32f7_i2c_read_rx_data()
768 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_reload()
771 if (i2c_dev->use_dma) in stm32f7_i2c_reload()
772 f7_msg->count -= STM32F7_I2C_MAX_LEN; in stm32f7_i2c_reload()
774 cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_reload()
777 if (f7_msg->count > STM32F7_I2C_MAX_LEN) { in stm32f7_i2c_reload()
781 cr2 |= STM32F7_I2C_CR2_NBYTES(f7_msg->count); in stm32f7_i2c_reload()
784 writel_relaxed(cr2, i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_reload()
789 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_smbus_reload()
802 val = f7_msg->buf - sizeof(u8); in stm32f7_i2c_smbus_reload()
803 f7_msg->count = *val; in stm32f7_i2c_smbus_reload()
804 cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_smbus_reload()
806 cr2 |= STM32F7_I2C_CR2_NBYTES(f7_msg->count); in stm32f7_i2c_smbus_reload()
807 writel_relaxed(cr2, i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_smbus_reload()
814 dev_info(i2c_dev->dev, "Trying to recover bus\n"); in stm32f7_i2c_release_bus()
816 stm32f7_i2c_clr_bits(i2c_dev->base + STM32F7_I2C_CR1, in stm32f7_i2c_release_bus()
829 ret = readl_relaxed_poll_timeout(i2c_dev->base + STM32F7_I2C_ISR, in stm32f7_i2c_wait_free_bus()
836 dev_info(i2c_dev->dev, "bus busy\n"); in stm32f7_i2c_wait_free_bus()
838 ret = stm32f7_i2c_release_bus(&i2c_dev->adap); in stm32f7_i2c_wait_free_bus()
840 dev_err(i2c_dev->dev, "Failed to recover the bus (%d)\n", ret); in stm32f7_i2c_wait_free_bus()
844 return -EBUSY; in stm32f7_i2c_wait_free_bus()
850 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_xfer_msg()
851 void __iomem *base = i2c_dev->base; in stm32f7_i2c_xfer_msg()
855 f7_msg->addr = msg->addr; in stm32f7_i2c_xfer_msg()
856 f7_msg->buf = msg->buf; in stm32f7_i2c_xfer_msg()
857 f7_msg->count = msg->len; in stm32f7_i2c_xfer_msg()
858 f7_msg->result = 0; in stm32f7_i2c_xfer_msg()
859 f7_msg->stop = (i2c_dev->msg_id >= i2c_dev->msg_num - 1); in stm32f7_i2c_xfer_msg()
861 reinit_completion(&i2c_dev->complete); in stm32f7_i2c_xfer_msg()
868 if (msg->flags & I2C_M_RD) in stm32f7_i2c_xfer_msg()
873 if (msg->flags & I2C_M_TEN) { in stm32f7_i2c_xfer_msg()
875 cr2 |= STM32F7_I2C_CR2_SADD10(f7_msg->addr); in stm32f7_i2c_xfer_msg()
879 cr2 |= STM32F7_I2C_CR2_SADD7(f7_msg->addr); in stm32f7_i2c_xfer_msg()
884 if (f7_msg->count > STM32F7_I2C_MAX_LEN) { in stm32f7_i2c_xfer_msg()
888 cr2 |= STM32F7_I2C_CR2_NBYTES(f7_msg->count); in stm32f7_i2c_xfer_msg()
900 i2c_dev->use_dma = false; in stm32f7_i2c_xfer_msg()
901 if (i2c_dev->dma && f7_msg->count >= STM32F7_I2C_DMA_LEN_MIN) { in stm32f7_i2c_xfer_msg()
902 ret = stm32_i2c_prep_dma_xfer(i2c_dev->dev, i2c_dev->dma, in stm32f7_i2c_xfer_msg()
903 msg->flags & I2C_M_RD, in stm32f7_i2c_xfer_msg()
904 f7_msg->count, f7_msg->buf, in stm32f7_i2c_xfer_msg()
908 i2c_dev->use_dma = true; in stm32f7_i2c_xfer_msg()
910 dev_warn(i2c_dev->dev, "can't use DMA\n"); in stm32f7_i2c_xfer_msg()
913 if (!i2c_dev->use_dma) { in stm32f7_i2c_xfer_msg()
914 if (msg->flags & I2C_M_RD) in stm32f7_i2c_xfer_msg()
919 if (msg->flags & I2C_M_RD) in stm32f7_i2c_xfer_msg()
928 i2c_dev->master_mode = true; in stm32f7_i2c_xfer_msg()
939 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_smbus_xfer_msg()
940 struct device *dev = i2c_dev->dev; in stm32f7_i2c_smbus_xfer_msg()
941 void __iomem *base = i2c_dev->base; in stm32f7_i2c_smbus_xfer_msg()
945 f7_msg->result = 0; in stm32f7_i2c_smbus_xfer_msg()
946 reinit_completion(&i2c_dev->complete); in stm32f7_i2c_smbus_xfer_msg()
953 if (f7_msg->read_write) in stm32f7_i2c_smbus_xfer_msg()
958 cr2 |= STM32F7_I2C_CR2_SADD7(f7_msg->addr); in stm32f7_i2c_smbus_xfer_msg()
960 f7_msg->smbus_buf[0] = command; in stm32f7_i2c_smbus_xfer_msg()
961 switch (f7_msg->size) { in stm32f7_i2c_smbus_xfer_msg()
963 f7_msg->stop = true; in stm32f7_i2c_smbus_xfer_msg()
964 f7_msg->count = 0; in stm32f7_i2c_smbus_xfer_msg()
967 f7_msg->stop = true; in stm32f7_i2c_smbus_xfer_msg()
968 f7_msg->count = 1; in stm32f7_i2c_smbus_xfer_msg()
971 if (f7_msg->read_write) { in stm32f7_i2c_smbus_xfer_msg()
972 f7_msg->stop = false; in stm32f7_i2c_smbus_xfer_msg()
973 f7_msg->count = 1; in stm32f7_i2c_smbus_xfer_msg()
976 f7_msg->stop = true; in stm32f7_i2c_smbus_xfer_msg()
977 f7_msg->count = 2; in stm32f7_i2c_smbus_xfer_msg()
978 f7_msg->smbus_buf[1] = data->byte; in stm32f7_i2c_smbus_xfer_msg()
982 if (f7_msg->read_write) { in stm32f7_i2c_smbus_xfer_msg()
983 f7_msg->stop = false; in stm32f7_i2c_smbus_xfer_msg()
984 f7_msg->count = 1; in stm32f7_i2c_smbus_xfer_msg()
987 f7_msg->stop = true; in stm32f7_i2c_smbus_xfer_msg()
988 f7_msg->count = 3; in stm32f7_i2c_smbus_xfer_msg()
989 f7_msg->smbus_buf[1] = data->word & 0xff; in stm32f7_i2c_smbus_xfer_msg()
990 f7_msg->smbus_buf[2] = data->word >> 8; in stm32f7_i2c_smbus_xfer_msg()
994 if (f7_msg->read_write) { in stm32f7_i2c_smbus_xfer_msg()
995 f7_msg->stop = false; in stm32f7_i2c_smbus_xfer_msg()
996 f7_msg->count = 1; in stm32f7_i2c_smbus_xfer_msg()
999 f7_msg->stop = true; in stm32f7_i2c_smbus_xfer_msg()
1000 if (data->block[0] > I2C_SMBUS_BLOCK_MAX || in stm32f7_i2c_smbus_xfer_msg()
1001 !data->block[0]) { in stm32f7_i2c_smbus_xfer_msg()
1003 data->block[0]); in stm32f7_i2c_smbus_xfer_msg()
1004 return -EINVAL; in stm32f7_i2c_smbus_xfer_msg()
1006 f7_msg->count = data->block[0] + 2; in stm32f7_i2c_smbus_xfer_msg()
1007 for (i = 1; i < f7_msg->count; i++) in stm32f7_i2c_smbus_xfer_msg()
1008 f7_msg->smbus_buf[i] = data->block[i - 1]; in stm32f7_i2c_smbus_xfer_msg()
1012 f7_msg->stop = false; in stm32f7_i2c_smbus_xfer_msg()
1013 f7_msg->count = 3; in stm32f7_i2c_smbus_xfer_msg()
1014 f7_msg->smbus_buf[1] = data->word & 0xff; in stm32f7_i2c_smbus_xfer_msg()
1015 f7_msg->smbus_buf[2] = data->word >> 8; in stm32f7_i2c_smbus_xfer_msg()
1017 f7_msg->read_write = I2C_SMBUS_READ; in stm32f7_i2c_smbus_xfer_msg()
1020 f7_msg->stop = false; in stm32f7_i2c_smbus_xfer_msg()
1021 if (data->block[0] > I2C_SMBUS_BLOCK_MAX - 1) { in stm32f7_i2c_smbus_xfer_msg()
1023 data->block[0]); in stm32f7_i2c_smbus_xfer_msg()
1024 return -EINVAL; in stm32f7_i2c_smbus_xfer_msg()
1026 f7_msg->count = data->block[0] + 2; in stm32f7_i2c_smbus_xfer_msg()
1027 for (i = 1; i < f7_msg->count; i++) in stm32f7_i2c_smbus_xfer_msg()
1028 f7_msg->smbus_buf[i] = data->block[i - 1]; in stm32f7_i2c_smbus_xfer_msg()
1030 f7_msg->read_write = I2C_SMBUS_READ; in stm32f7_i2c_smbus_xfer_msg()
1033 /* Rely on emulated i2c transfer (through master_xfer) */ in stm32f7_i2c_smbus_xfer_msg()
1034 return -EOPNOTSUPP; in stm32f7_i2c_smbus_xfer_msg()
1036 dev_err(dev, "Unsupported smbus protocol %d\n", f7_msg->size); in stm32f7_i2c_smbus_xfer_msg()
1037 return -EOPNOTSUPP; in stm32f7_i2c_smbus_xfer_msg()
1040 f7_msg->buf = f7_msg->smbus_buf; in stm32f7_i2c_smbus_xfer_msg()
1043 if ((flags & I2C_CLIENT_PEC) && f7_msg->size != I2C_SMBUS_QUICK) { in stm32f7_i2c_smbus_xfer_msg()
1045 if (!f7_msg->read_write) { in stm32f7_i2c_smbus_xfer_msg()
1047 f7_msg->count++; in stm32f7_i2c_smbus_xfer_msg()
1056 cr2 |= STM32F7_I2C_CR2_NBYTES(f7_msg->count); in stm32f7_i2c_smbus_xfer_msg()
1067 i2c_dev->use_dma = false; in stm32f7_i2c_smbus_xfer_msg()
1068 if (i2c_dev->dma && f7_msg->count >= STM32F7_I2C_DMA_LEN_MIN) { in stm32f7_i2c_smbus_xfer_msg()
1069 ret = stm32_i2c_prep_dma_xfer(i2c_dev->dev, i2c_dev->dma, in stm32f7_i2c_smbus_xfer_msg()
1071 f7_msg->count, f7_msg->buf, in stm32f7_i2c_smbus_xfer_msg()
1075 i2c_dev->use_dma = true; in stm32f7_i2c_smbus_xfer_msg()
1077 dev_warn(i2c_dev->dev, "can't use DMA\n"); in stm32f7_i2c_smbus_xfer_msg()
1080 if (!i2c_dev->use_dma) { in stm32f7_i2c_smbus_xfer_msg()
1095 i2c_dev->master_mode = true; in stm32f7_i2c_smbus_xfer_msg()
1106 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_smbus_rep_start()
1107 void __iomem *base = i2c_dev->base; in stm32f7_i2c_smbus_rep_start()
1117 switch (f7_msg->size) { in stm32f7_i2c_smbus_rep_start()
1119 f7_msg->count = 1; in stm32f7_i2c_smbus_rep_start()
1123 f7_msg->count = 2; in stm32f7_i2c_smbus_rep_start()
1127 f7_msg->count = 1; in stm32f7_i2c_smbus_rep_start()
1132 f7_msg->buf = f7_msg->smbus_buf; in stm32f7_i2c_smbus_rep_start()
1133 f7_msg->stop = true; in stm32f7_i2c_smbus_rep_start()
1138 f7_msg->count++; in stm32f7_i2c_smbus_rep_start()
1143 cr2 |= STM32F7_I2C_CR2_NBYTES(f7_msg->count); in stm32f7_i2c_smbus_rep_start()
1159 i2c_dev->use_dma = false; in stm32f7_i2c_smbus_rep_start()
1160 if (i2c_dev->dma && f7_msg->count >= STM32F7_I2C_DMA_LEN_MIN && in stm32f7_i2c_smbus_rep_start()
1161 f7_msg->size != I2C_SMBUS_BLOCK_DATA && in stm32f7_i2c_smbus_rep_start()
1162 f7_msg->size != I2C_SMBUS_BLOCK_PROC_CALL) { in stm32f7_i2c_smbus_rep_start()
1163 ret = stm32_i2c_prep_dma_xfer(i2c_dev->dev, i2c_dev->dma, in stm32f7_i2c_smbus_rep_start()
1165 f7_msg->count, f7_msg->buf, in stm32f7_i2c_smbus_rep_start()
1170 i2c_dev->use_dma = true; in stm32f7_i2c_smbus_rep_start()
1172 dev_warn(i2c_dev->dev, "can't use DMA\n"); in stm32f7_i2c_smbus_rep_start()
1175 if (!i2c_dev->use_dma) in stm32f7_i2c_smbus_rep_start()
1190 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_smbus_check_pec()
1193 internal_pec = readl_relaxed(i2c_dev->base + STM32F7_I2C_PECR); in stm32f7_i2c_smbus_check_pec()
1195 switch (f7_msg->size) { in stm32f7_i2c_smbus_check_pec()
1198 received_pec = f7_msg->smbus_buf[1]; in stm32f7_i2c_smbus_check_pec()
1202 received_pec = f7_msg->smbus_buf[2]; in stm32f7_i2c_smbus_check_pec()
1206 count = f7_msg->smbus_buf[0]; in stm32f7_i2c_smbus_check_pec()
1207 received_pec = f7_msg->smbus_buf[count]; in stm32f7_i2c_smbus_check_pec()
1210 dev_err(i2c_dev->dev, "Unsupported smbus protocol for PEC\n"); in stm32f7_i2c_smbus_check_pec()
1211 return -EINVAL; in stm32f7_i2c_smbus_check_pec()
1215 dev_err(i2c_dev->dev, "Bad PEC 0x%02x vs. 0x%02x\n", in stm32f7_i2c_smbus_check_pec()
1217 return -EBADMSG; in stm32f7_i2c_smbus_check_pec()
1230 if (slave->flags & I2C_CLIENT_TEN) { in stm32f7_i2c_is_addr_match()
1232 * For 10-bit addr, addcode = 11110XY with in stm32f7_i2c_is_addr_match()
1236 addr = slave->addr >> 8; in stm32f7_i2c_is_addr_match()
1241 addr = slave->addr & 0x7f; in stm32f7_i2c_is_addr_match()
1251 struct i2c_client *slave = i2c_dev->slave_running; in stm32f7_i2c_slave_start()
1252 void __iomem *base = i2c_dev->base; in stm32f7_i2c_slave_start()
1256 if (i2c_dev->slave_dir) { in stm32f7_i2c_slave_start()
1257 /* Notify i2c slave that new read transfer is starting */ in stm32f7_i2c_slave_start()
1261 * Disable slave TX config in case of I2C combined message in stm32f7_i2c_slave_start()
1262 * (I2C Write followed by I2C Read) in stm32f7_i2c_slave_start()
1278 /* Notify i2c slave that new write transfer is starting */ in stm32f7_i2c_slave_start()
1299 void __iomem *base = i2c_dev->base; in stm32f7_i2c_slave_addr()
1303 isr = readl_relaxed(i2c_dev->base + STM32F7_I2C_ISR); in stm32f7_i2c_slave_addr()
1308 if (stm32f7_i2c_is_addr_match(i2c_dev->slave[i], addcode)) { in stm32f7_i2c_slave_addr()
1309 i2c_dev->slave_running = i2c_dev->slave[i]; in stm32f7_i2c_slave_addr()
1310 i2c_dev->slave_dir = dir; in stm32f7_i2c_slave_addr()
1312 /* Start I2C slave processing */ in stm32f7_i2c_slave_addr()
1329 if (i2c_dev->slave[i] == slave) { in stm32f7_i2c_get_slave_id()
1335 dev_err(i2c_dev->dev, "Slave 0x%x not registered\n", slave->addr); in stm32f7_i2c_get_slave_id()
1337 return -ENODEV; in stm32f7_i2c_get_slave_id()
1343 struct device *dev = i2c_dev->dev; in stm32f7_i2c_get_free_slave_id()
1348 * slave[STM32F7_SLAVE_7_10_BITS_ADDR] supports 7-bit and 10-bit slave address in stm32f7_i2c_get_free_slave_id()
1349 * slave[STM32F7_SLAVE_7_BITS_ADDR] supports 7-bit slave address only in stm32f7_i2c_get_free_slave_id()
1351 if (i2c_dev->smbus_mode && (slave->addr == 0x08)) { in stm32f7_i2c_get_free_slave_id()
1352 if (i2c_dev->slave[STM32F7_SLAVE_HOSTNOTIFY]) in stm32f7_i2c_get_free_slave_id()
1358 for (i = STM32F7_I2C_MAX_SLAVE - 1; i > STM32F7_SLAVE_HOSTNOTIFY; i--) { in stm32f7_i2c_get_free_slave_id()
1360 (slave->flags & I2C_CLIENT_TEN)) in stm32f7_i2c_get_free_slave_id()
1362 if (!i2c_dev->slave[i]) { in stm32f7_i2c_get_free_slave_id()
1369 dev_err(dev, "Slave 0x%x could not be registered\n", slave->addr); in stm32f7_i2c_get_free_slave_id()
1371 return -EINVAL; in stm32f7_i2c_get_free_slave_id()
1379 if (i2c_dev->slave[i]) in stm32f7_i2c_is_slave_registered()
1392 if (i2c_dev->slave[i]) in stm32f7_i2c_is_slave_busy()
1401 void __iomem *base = i2c_dev->base; in stm32f7_i2c_slave_isr_event()
1406 status = readl_relaxed(i2c_dev->base + STM32F7_I2C_ISR); in stm32f7_i2c_slave_isr_event()
1410 i2c_slave_event(i2c_dev->slave_running, in stm32f7_i2c_slave_isr_event()
1424 val = readb_relaxed(i2c_dev->base + STM32F7_I2C_RXDR); in stm32f7_i2c_slave_isr_event()
1425 ret = i2c_slave_event(i2c_dev->slave_running, in stm32f7_i2c_slave_isr_event()
1429 cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_slave_isr_event()
1431 writel_relaxed(cr2, i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_slave_isr_event()
1440 dev_dbg(i2c_dev->dev, "<%s>: Receive NACK\n", __func__); in stm32f7_i2c_slave_isr_event()
1449 if (i2c_dev->slave_dir) { in stm32f7_i2c_slave_isr_event()
1461 /* Notify i2c slave that a STOP flag has been detected */ in stm32f7_i2c_slave_isr_event()
1462 i2c_slave_event(i2c_dev->slave_running, I2C_SLAVE_STOP, &val); in stm32f7_i2c_slave_isr_event()
1464 i2c_dev->slave_running = NULL; in stm32f7_i2c_slave_isr_event()
1477 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_isr_event()
1478 struct stm32_i2c_dma *dma = i2c_dev->dma; in stm32f7_i2c_isr_event()
1479 void __iomem *base = i2c_dev->base; in stm32f7_i2c_isr_event()
1484 if (!i2c_dev->master_mode) { in stm32f7_i2c_isr_event()
1489 status = readl_relaxed(i2c_dev->base + STM32F7_I2C_ISR); in stm32f7_i2c_isr_event()
1501 dev_dbg(i2c_dev->dev, "<%s>: Receive NACK (addr %x)\n", in stm32f7_i2c_isr_event()
1502 __func__, f7_msg->addr); in stm32f7_i2c_isr_event()
1504 if (i2c_dev->use_dma) { in stm32f7_i2c_isr_event()
1506 dmaengine_terminate_all(dma->chan_using); in stm32f7_i2c_isr_event()
1508 f7_msg->result = -ENXIO; in stm32f7_i2c_isr_event()
1523 if (i2c_dev->use_dma && !f7_msg->result) { in stm32f7_i2c_isr_event()
1526 i2c_dev->master_mode = false; in stm32f7_i2c_isr_event()
1527 complete(&i2c_dev->complete); in stm32f7_i2c_isr_event()
1533 if (f7_msg->stop) { in stm32f7_i2c_isr_event()
1536 } else if (i2c_dev->use_dma && !f7_msg->result) { in stm32f7_i2c_isr_event()
1538 } else if (f7_msg->smbus) { in stm32f7_i2c_isr_event()
1541 i2c_dev->msg_id++; in stm32f7_i2c_isr_event()
1542 i2c_dev->msg++; in stm32f7_i2c_isr_event()
1543 stm32f7_i2c_xfer_msg(i2c_dev, i2c_dev->msg); in stm32f7_i2c_isr_event()
1548 if (f7_msg->smbus) in stm32f7_i2c_isr_event()
1560 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_isr_event_thread()
1561 struct stm32_i2c_dma *dma = i2c_dev->dma; in stm32f7_i2c_isr_event_thread()
1569 ret = wait_for_completion_timeout(&i2c_dev->dma->dma_complete, HZ); in stm32f7_i2c_isr_event_thread()
1571 dev_dbg(i2c_dev->dev, "<%s>: Timed out\n", __func__); in stm32f7_i2c_isr_event_thread()
1573 dmaengine_terminate_all(dma->chan_using); in stm32f7_i2c_isr_event_thread()
1574 f7_msg->result = -ETIMEDOUT; in stm32f7_i2c_isr_event_thread()
1577 status = readl_relaxed(i2c_dev->base + STM32F7_I2C_ISR); in stm32f7_i2c_isr_event_thread()
1580 if (f7_msg->smbus) { in stm32f7_i2c_isr_event_thread()
1583 i2c_dev->msg_id++; in stm32f7_i2c_isr_event_thread()
1584 i2c_dev->msg++; in stm32f7_i2c_isr_event_thread()
1585 stm32f7_i2c_xfer_msg(i2c_dev, i2c_dev->msg); in stm32f7_i2c_isr_event_thread()
1588 i2c_dev->master_mode = false; in stm32f7_i2c_isr_event_thread()
1589 complete(&i2c_dev->complete); in stm32f7_i2c_isr_event_thread()
1598 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_isr_error()
1599 void __iomem *base = i2c_dev->base; in stm32f7_i2c_isr_error()
1600 struct device *dev = i2c_dev->dev; in stm32f7_i2c_isr_error()
1601 struct stm32_i2c_dma *dma = i2c_dev->dma; in stm32f7_i2c_isr_error()
1604 status = readl_relaxed(i2c_dev->base + STM32F7_I2C_ISR); in stm32f7_i2c_isr_error()
1610 stm32f7_i2c_release_bus(&i2c_dev->adap); in stm32f7_i2c_isr_error()
1611 f7_msg->result = -EIO; in stm32f7_i2c_isr_error()
1618 f7_msg->result = -EAGAIN; in stm32f7_i2c_isr_error()
1624 f7_msg->result = -EINVAL; in stm32f7_i2c_isr_error()
1627 if (!i2c_dev->slave_running) { in stm32f7_i2c_isr_error()
1638 if (i2c_dev->use_dma) { in stm32f7_i2c_isr_error()
1640 dmaengine_terminate_all(dma->chan_using); in stm32f7_i2c_isr_error()
1643 i2c_dev->master_mode = false; in stm32f7_i2c_isr_error()
1644 complete(&i2c_dev->complete); in stm32f7_i2c_isr_error()
1653 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_xfer()
1654 struct stm32_i2c_dma *dma = i2c_dev->dma; in stm32f7_i2c_xfer()
1658 i2c_dev->msg = msgs; in stm32f7_i2c_xfer()
1659 i2c_dev->msg_num = num; in stm32f7_i2c_xfer()
1660 i2c_dev->msg_id = 0; in stm32f7_i2c_xfer()
1661 f7_msg->smbus = false; in stm32f7_i2c_xfer()
1663 ret = pm_runtime_resume_and_get(i2c_dev->dev); in stm32f7_i2c_xfer()
1673 time_left = wait_for_completion_timeout(&i2c_dev->complete, in stm32f7_i2c_xfer()
1674 i2c_dev->adap.timeout); in stm32f7_i2c_xfer()
1675 ret = f7_msg->result; in stm32f7_i2c_xfer()
1683 i2c_dev->base + STM32F7_I2C_ISR); in stm32f7_i2c_xfer()
1688 dev_dbg(i2c_dev->dev, "Access to slave 0x%x timed out\n", in stm32f7_i2c_xfer()
1689 i2c_dev->msg->addr); in stm32f7_i2c_xfer()
1690 if (i2c_dev->use_dma) in stm32f7_i2c_xfer()
1691 dmaengine_terminate_all(dma->chan_using); in stm32f7_i2c_xfer()
1693 ret = -ETIMEDOUT; in stm32f7_i2c_xfer()
1697 pm_runtime_mark_last_busy(i2c_dev->dev); in stm32f7_i2c_xfer()
1698 pm_runtime_put_autosuspend(i2c_dev->dev); in stm32f7_i2c_xfer()
1709 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_smbus_xfer()
1710 struct stm32_i2c_dma *dma = i2c_dev->dma; in stm32f7_i2c_smbus_xfer()
1711 struct device *dev = i2c_dev->dev; in stm32f7_i2c_smbus_xfer()
1715 f7_msg->addr = addr; in stm32f7_i2c_smbus_xfer()
1716 f7_msg->size = size; in stm32f7_i2c_smbus_xfer()
1717 f7_msg->read_write = read_write; in stm32f7_i2c_smbus_xfer()
1718 f7_msg->smbus = true; in stm32f7_i2c_smbus_xfer()
1732 timeout = wait_for_completion_timeout(&i2c_dev->complete, in stm32f7_i2c_smbus_xfer()
1733 i2c_dev->adap.timeout); in stm32f7_i2c_smbus_xfer()
1734 ret = f7_msg->result; in stm32f7_i2c_smbus_xfer()
1742 i2c_dev->base + STM32F7_I2C_ISR); in stm32f7_i2c_smbus_xfer()
1747 dev_dbg(dev, "Access to slave 0x%x timed out\n", f7_msg->addr); in stm32f7_i2c_smbus_xfer()
1748 if (i2c_dev->use_dma) in stm32f7_i2c_smbus_xfer()
1749 dmaengine_terminate_all(dma->chan_using); in stm32f7_i2c_smbus_xfer()
1751 ret = -ETIMEDOUT; in stm32f7_i2c_smbus_xfer()
1766 data->byte = f7_msg->smbus_buf[0]; in stm32f7_i2c_smbus_xfer()
1770 data->word = f7_msg->smbus_buf[0] | in stm32f7_i2c_smbus_xfer()
1771 (f7_msg->smbus_buf[1] << 8); in stm32f7_i2c_smbus_xfer()
1775 for (i = 0; i <= f7_msg->smbus_buf[0]; i++) in stm32f7_i2c_smbus_xfer()
1776 data->block[i] = f7_msg->smbus_buf[i]; in stm32f7_i2c_smbus_xfer()
1780 ret = -EINVAL; in stm32f7_i2c_smbus_xfer()
1793 void __iomem *base = i2c_dev->base; in stm32f7_i2c_enable_wakeup()
1796 if (!i2c_dev->wakeup_src) in stm32f7_i2c_enable_wakeup()
1800 device_set_wakeup_enable(i2c_dev->dev, true); in stm32f7_i2c_enable_wakeup()
1803 device_set_wakeup_enable(i2c_dev->dev, false); in stm32f7_i2c_enable_wakeup()
1810 struct stm32f7_i2c_dev *i2c_dev = i2c_get_adapdata(slave->adapter); in stm32f7_i2c_reg_slave()
1811 void __iomem *base = i2c_dev->base; in stm32f7_i2c_reg_slave()
1812 struct device *dev = i2c_dev->dev; in stm32f7_i2c_reg_slave()
1816 if (slave->flags & I2C_CLIENT_PEC) { in stm32f7_i2c_reg_slave()
1818 return -EINVAL; in stm32f7_i2c_reg_slave()
1823 return -EBUSY; in stm32f7_i2c_reg_slave()
1840 i2c_dev->slave[id] = slave; in stm32f7_i2c_reg_slave()
1845 oar1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR1); in stm32f7_i2c_reg_slave()
1847 if (slave->flags & I2C_CLIENT_TEN) { in stm32f7_i2c_reg_slave()
1848 oar1 |= STM32F7_I2C_OAR1_OA1_10(slave->addr); in stm32f7_i2c_reg_slave()
1851 oar1 |= STM32F7_I2C_OAR1_OA1_7(slave->addr); in stm32f7_i2c_reg_slave()
1854 i2c_dev->slave[id] = slave; in stm32f7_i2c_reg_slave()
1855 writel_relaxed(oar1, i2c_dev->base + STM32F7_I2C_OAR1); in stm32f7_i2c_reg_slave()
1860 oar2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR2); in stm32f7_i2c_reg_slave()
1862 if (slave->flags & I2C_CLIENT_TEN) { in stm32f7_i2c_reg_slave()
1863 ret = -EOPNOTSUPP; in stm32f7_i2c_reg_slave()
1867 oar2 |= STM32F7_I2C_OAR2_OA2_7(slave->addr); in stm32f7_i2c_reg_slave()
1869 i2c_dev->slave[id] = slave; in stm32f7_i2c_reg_slave()
1870 writel_relaxed(oar2, i2c_dev->base + STM32F7_I2C_OAR2); in stm32f7_i2c_reg_slave()
1874 dev_err(dev, "I2C slave id not supported\n"); in stm32f7_i2c_reg_slave()
1875 ret = -ENODEV; in stm32f7_i2c_reg_slave()
1882 /* Enable Address match interrupt, error interrupt and enable I2C */ in stm32f7_i2c_reg_slave()
1900 struct stm32f7_i2c_dev *i2c_dev = i2c_get_adapdata(slave->adapter); in stm32f7_i2c_unreg_slave()
1901 void __iomem *base = i2c_dev->base; in stm32f7_i2c_unreg_slave()
1909 WARN_ON(!i2c_dev->slave[id]); in stm32f7_i2c_unreg_slave()
1911 ret = pm_runtime_resume_and_get(i2c_dev->dev); in stm32f7_i2c_unreg_slave()
1923 i2c_dev->slave[id] = NULL; in stm32f7_i2c_unreg_slave()
1930 pm_runtime_mark_last_busy(i2c_dev->dev); in stm32f7_i2c_unreg_slave()
1931 pm_runtime_put_autosuspend(i2c_dev->dev); in stm32f7_i2c_unreg_slave()
1941 if (i2c_dev->bus_rate <= I2C_MAX_FAST_MODE_FREQ || in stm32f7_i2c_write_fm_plus_bits()
1942 IS_ERR_OR_NULL(i2c_dev->regmap)) in stm32f7_i2c_write_fm_plus_bits()
1946 if (i2c_dev->fmp_sreg == i2c_dev->fmp_creg) in stm32f7_i2c_write_fm_plus_bits()
1947 ret = regmap_update_bits(i2c_dev->regmap, in stm32f7_i2c_write_fm_plus_bits()
1948 i2c_dev->fmp_sreg, in stm32f7_i2c_write_fm_plus_bits()
1949 i2c_dev->fmp_mask, in stm32f7_i2c_write_fm_plus_bits()
1950 enable ? i2c_dev->fmp_mask : 0); in stm32f7_i2c_write_fm_plus_bits()
1952 ret = regmap_write(i2c_dev->regmap, in stm32f7_i2c_write_fm_plus_bits()
1953 enable ? i2c_dev->fmp_sreg : in stm32f7_i2c_write_fm_plus_bits()
1954 i2c_dev->fmp_creg, in stm32f7_i2c_write_fm_plus_bits()
1955 i2c_dev->fmp_mask); in stm32f7_i2c_write_fm_plus_bits()
1963 struct device_node *np = pdev->dev.of_node; in stm32f7_i2c_setup_fm_plus_bits()
1966 i2c_dev->regmap = syscon_regmap_lookup_by_phandle(np, "st,syscfg-fmp"); in stm32f7_i2c_setup_fm_plus_bits()
1967 if (IS_ERR(i2c_dev->regmap)) in stm32f7_i2c_setup_fm_plus_bits()
1971 ret = of_property_read_u32_index(np, "st,syscfg-fmp", 1, in stm32f7_i2c_setup_fm_plus_bits()
1972 &i2c_dev->fmp_sreg); in stm32f7_i2c_setup_fm_plus_bits()
1976 i2c_dev->fmp_creg = i2c_dev->fmp_sreg + in stm32f7_i2c_setup_fm_plus_bits()
1977 i2c_dev->setup.fmp_clr_offset; in stm32f7_i2c_setup_fm_plus_bits()
1979 return of_property_read_u32_index(np, "st,syscfg-fmp", 2, in stm32f7_i2c_setup_fm_plus_bits()
1980 &i2c_dev->fmp_mask); in stm32f7_i2c_setup_fm_plus_bits()
1985 struct i2c_adapter *adap = &i2c_dev->adap; in stm32f7_i2c_enable_smbus_host()
1986 void __iomem *base = i2c_dev->base; in stm32f7_i2c_enable_smbus_host()
1993 i2c_dev->host_notify_client = client; in stm32f7_i2c_enable_smbus_host()
2003 void __iomem *base = i2c_dev->base; in stm32f7_i2c_disable_smbus_host()
2005 if (i2c_dev->host_notify_client) { in stm32f7_i2c_disable_smbus_host()
2009 i2c_free_slave_host_notify_device(i2c_dev->host_notify_client); in stm32f7_i2c_disable_smbus_host()
2024 if (i2c_dev->smbus_mode) in stm32f7_i2c_func()
2048 i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL); in stm32f7_i2c_probe()
2050 return -ENOMEM; in stm32f7_i2c_probe()
2052 i2c_dev->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in stm32f7_i2c_probe()
2053 if (IS_ERR(i2c_dev->base)) in stm32f7_i2c_probe()
2054 return PTR_ERR(i2c_dev->base); in stm32f7_i2c_probe()
2055 phy_addr = (dma_addr_t)res->start; in stm32f7_i2c_probe()
2059 if (irq_event != -EPROBE_DEFER) in stm32f7_i2c_probe()
2060 dev_err(&pdev->dev, "Failed to get IRQ event: %d\n", in stm32f7_i2c_probe()
2062 return irq_event ? : -ENOENT; in stm32f7_i2c_probe()
2067 if (irq_error != -EPROBE_DEFER) in stm32f7_i2c_probe()
2068 dev_err(&pdev->dev, "Failed to get IRQ error: %d\n", in stm32f7_i2c_probe()
2070 return irq_error ? : -ENOENT; in stm32f7_i2c_probe()
2073 i2c_dev->wakeup_src = of_property_read_bool(pdev->dev.of_node, in stm32f7_i2c_probe()
2074 "wakeup-source"); in stm32f7_i2c_probe()
2076 i2c_dev->clk = devm_clk_get(&pdev->dev, NULL); in stm32f7_i2c_probe()
2077 if (IS_ERR(i2c_dev->clk)) in stm32f7_i2c_probe()
2078 return dev_err_probe(&pdev->dev, PTR_ERR(i2c_dev->clk), in stm32f7_i2c_probe()
2081 ret = clk_prepare_enable(i2c_dev->clk); in stm32f7_i2c_probe()
2083 dev_err(&pdev->dev, "Failed to prepare_enable clock\n"); in stm32f7_i2c_probe()
2087 rst = devm_reset_control_get(&pdev->dev, NULL); in stm32f7_i2c_probe()
2089 ret = dev_err_probe(&pdev->dev, PTR_ERR(rst), in stm32f7_i2c_probe()
2097 i2c_dev->dev = &pdev->dev; in stm32f7_i2c_probe()
2099 ret = devm_request_threaded_irq(&pdev->dev, irq_event, in stm32f7_i2c_probe()
2103 pdev->name, i2c_dev); in stm32f7_i2c_probe()
2105 dev_err(&pdev->dev, "Failed to request irq event %i\n", in stm32f7_i2c_probe()
2110 ret = devm_request_irq(&pdev->dev, irq_error, stm32f7_i2c_isr_error, 0, in stm32f7_i2c_probe()
2111 pdev->name, i2c_dev); in stm32f7_i2c_probe()
2113 dev_err(&pdev->dev, "Failed to request irq error %i\n", in stm32f7_i2c_probe()
2118 setup = of_device_get_match_data(&pdev->dev); in stm32f7_i2c_probe()
2120 dev_err(&pdev->dev, "Can't get device data\n"); in stm32f7_i2c_probe()
2121 ret = -ENODEV; in stm32f7_i2c_probe()
2124 i2c_dev->setup = *setup; in stm32f7_i2c_probe()
2126 ret = stm32f7_i2c_setup_timing(i2c_dev, &i2c_dev->setup); in stm32f7_i2c_probe()
2131 if (i2c_dev->bus_rate > I2C_MAX_FAST_MODE_FREQ) { in stm32f7_i2c_probe()
2140 adap = &i2c_dev->adap; in stm32f7_i2c_probe()
2142 snprintf(adap->name, sizeof(adap->name), "STM32F7 I2C(%pa)", in stm32f7_i2c_probe()
2143 &res->start); in stm32f7_i2c_probe()
2144 adap->owner = THIS_MODULE; in stm32f7_i2c_probe()
2145 adap->timeout = 2 * HZ; in stm32f7_i2c_probe()
2146 adap->retries = 3; in stm32f7_i2c_probe()
2147 adap->algo = &stm32f7_i2c_algo; in stm32f7_i2c_probe()
2148 adap->dev.parent = &pdev->dev; in stm32f7_i2c_probe()
2149 adap->dev.of_node = pdev->dev.of_node; in stm32f7_i2c_probe()
2151 init_completion(&i2c_dev->complete); in stm32f7_i2c_probe()
2154 i2c_dev->dma = stm32_i2c_dma_request(i2c_dev->dev, phy_addr, in stm32f7_i2c_probe()
2157 if (IS_ERR(i2c_dev->dma)) { in stm32f7_i2c_probe()
2158 ret = PTR_ERR(i2c_dev->dma); in stm32f7_i2c_probe()
2160 if (ret != -ENODEV) in stm32f7_i2c_probe()
2162 dev_dbg(i2c_dev->dev, "No DMA option: fallback using interrupts\n"); in stm32f7_i2c_probe()
2163 i2c_dev->dma = NULL; in stm32f7_i2c_probe()
2166 if (i2c_dev->wakeup_src) { in stm32f7_i2c_probe()
2167 device_set_wakeup_capable(i2c_dev->dev, true); in stm32f7_i2c_probe()
2169 ret = dev_pm_set_wake_irq(i2c_dev->dev, irq_event); in stm32f7_i2c_probe()
2171 dev_err(i2c_dev->dev, "Failed to set wake up irq\n"); in stm32f7_i2c_probe()
2178 pm_runtime_set_autosuspend_delay(i2c_dev->dev, in stm32f7_i2c_probe()
2180 pm_runtime_use_autosuspend(i2c_dev->dev); in stm32f7_i2c_probe()
2181 pm_runtime_set_active(i2c_dev->dev); in stm32f7_i2c_probe()
2182 pm_runtime_enable(i2c_dev->dev); in stm32f7_i2c_probe()
2184 pm_runtime_get_noresume(&pdev->dev); in stm32f7_i2c_probe()
2188 i2c_dev->smbus_mode = of_property_read_bool(pdev->dev.of_node, "smbus"); in stm32f7_i2c_probe()
2194 if (i2c_dev->smbus_mode) { in stm32f7_i2c_probe()
2197 dev_err(i2c_dev->dev, in stm32f7_i2c_probe()
2198 "failed to enable SMBus Host-Notify protocol (%d)\n", in stm32f7_i2c_probe()
2204 dev_info(i2c_dev->dev, "STM32F7 I2C-%d bus adapter\n", adap->nr); in stm32f7_i2c_probe()
2206 pm_runtime_mark_last_busy(i2c_dev->dev); in stm32f7_i2c_probe()
2207 pm_runtime_put_autosuspend(i2c_dev->dev); in stm32f7_i2c_probe()
2215 pm_runtime_put_noidle(i2c_dev->dev); in stm32f7_i2c_probe()
2216 pm_runtime_disable(i2c_dev->dev); in stm32f7_i2c_probe()
2217 pm_runtime_set_suspended(i2c_dev->dev); in stm32f7_i2c_probe()
2218 pm_runtime_dont_use_autosuspend(i2c_dev->dev); in stm32f7_i2c_probe()
2220 if (i2c_dev->wakeup_src) in stm32f7_i2c_probe()
2221 dev_pm_clear_wake_irq(i2c_dev->dev); in stm32f7_i2c_probe()
2224 if (i2c_dev->wakeup_src) in stm32f7_i2c_probe()
2225 device_set_wakeup_capable(i2c_dev->dev, false); in stm32f7_i2c_probe()
2227 if (i2c_dev->dma) { in stm32f7_i2c_probe()
2228 stm32_i2c_dma_free(i2c_dev->dma); in stm32f7_i2c_probe()
2229 i2c_dev->dma = NULL; in stm32f7_i2c_probe()
2236 clk_disable_unprepare(i2c_dev->clk); in stm32f7_i2c_probe()
2247 i2c_del_adapter(&i2c_dev->adap); in stm32f7_i2c_remove()
2248 pm_runtime_get_sync(i2c_dev->dev); in stm32f7_i2c_remove()
2250 if (i2c_dev->wakeup_src) { in stm32f7_i2c_remove()
2251 dev_pm_clear_wake_irq(i2c_dev->dev); in stm32f7_i2c_remove()
2256 device_init_wakeup(i2c_dev->dev, false); in stm32f7_i2c_remove()
2259 pm_runtime_put_noidle(i2c_dev->dev); in stm32f7_i2c_remove()
2260 pm_runtime_disable(i2c_dev->dev); in stm32f7_i2c_remove()
2261 pm_runtime_set_suspended(i2c_dev->dev); in stm32f7_i2c_remove()
2262 pm_runtime_dont_use_autosuspend(i2c_dev->dev); in stm32f7_i2c_remove()
2264 if (i2c_dev->dma) { in stm32f7_i2c_remove()
2265 stm32_i2c_dma_free(i2c_dev->dma); in stm32f7_i2c_remove()
2266 i2c_dev->dma = NULL; in stm32f7_i2c_remove()
2271 clk_disable_unprepare(i2c_dev->clk); in stm32f7_i2c_remove()
2281 clk_disable_unprepare(i2c_dev->clk); in stm32f7_i2c_runtime_suspend()
2292 ret = clk_prepare_enable(i2c_dev->clk); in stm32f7_i2c_runtime_resume()
2306 struct stm32f7_i2c_regs *backup_regs = &i2c_dev->backup_regs; in stm32f7_i2c_regs_backup()
2308 ret = pm_runtime_resume_and_get(i2c_dev->dev); in stm32f7_i2c_regs_backup()
2312 backup_regs->cr1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR1); in stm32f7_i2c_regs_backup()
2313 backup_regs->cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_regs_backup()
2314 backup_regs->oar1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR1); in stm32f7_i2c_regs_backup()
2315 backup_regs->oar2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR2); in stm32f7_i2c_regs_backup()
2316 backup_regs->tmgr = readl_relaxed(i2c_dev->base + STM32F7_I2C_TIMINGR); in stm32f7_i2c_regs_backup()
2319 pm_runtime_put_sync(i2c_dev->dev); in stm32f7_i2c_regs_backup()
2328 struct stm32f7_i2c_regs *backup_regs = &i2c_dev->backup_regs; in stm32f7_i2c_regs_restore()
2330 ret = pm_runtime_resume_and_get(i2c_dev->dev); in stm32f7_i2c_regs_restore()
2334 cr1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR1); in stm32f7_i2c_regs_restore()
2336 stm32f7_i2c_clr_bits(i2c_dev->base + STM32F7_I2C_CR1, in stm32f7_i2c_regs_restore()
2339 writel_relaxed(backup_regs->tmgr, i2c_dev->base + STM32F7_I2C_TIMINGR); in stm32f7_i2c_regs_restore()
2340 writel_relaxed(backup_regs->cr1 & ~STM32F7_I2C_CR1_PE, in stm32f7_i2c_regs_restore()
2341 i2c_dev->base + STM32F7_I2C_CR1); in stm32f7_i2c_regs_restore()
2342 if (backup_regs->cr1 & STM32F7_I2C_CR1_PE) in stm32f7_i2c_regs_restore()
2343 stm32f7_i2c_set_bits(i2c_dev->base + STM32F7_I2C_CR1, in stm32f7_i2c_regs_restore()
2345 writel_relaxed(backup_regs->cr2, i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_regs_restore()
2346 writel_relaxed(backup_regs->oar1, i2c_dev->base + STM32F7_I2C_OAR1); in stm32f7_i2c_regs_restore()
2347 writel_relaxed(backup_regs->oar2, i2c_dev->base + STM32F7_I2C_OAR2); in stm32f7_i2c_regs_restore()
2350 pm_runtime_put_sync(i2c_dev->dev); in stm32f7_i2c_regs_restore()
2360 i2c_mark_adapter_suspended(&i2c_dev->adap); in stm32f7_i2c_suspend()
2362 if (!device_may_wakeup(dev) && !dev->power.wakeup_path) { in stm32f7_i2c_suspend()
2365 i2c_mark_adapter_resumed(&i2c_dev->adap); in stm32f7_i2c_suspend()
2381 if (!device_may_wakeup(dev) && !dev->power.wakeup_path) { in stm32f7_i2c_resume()
2392 i2c_mark_adapter_resumed(&i2c_dev->adap); in stm32f7_i2c_resume()
2405 { .compatible = "st,stm32f7-i2c", .data = &stm32f7_setup},
2406 { .compatible = "st,stm32mp15-i2c", .data = &stm32mp15_setup},
2413 .name = "stm32f7-i2c",
2424 MODULE_DESCRIPTION("STMicroelectronics STM32F7 I2C driver");