Lines Matching +full:axi4 +full:- +full:lite
1 // SPDX-License-Identifier: GPL-2.0-only
3 * i2c-xiic.c
4 * Copyright (c) 2002-2007 Xilinx Inc.
5 * Copyright (c) 2009-2010 Intel Corporation
27 #include <linux/platform_data/i2c-xiic.h>
34 #define DRIVER_NAME "xiic-i2c"
48 * struct xiic_i2c - Internal representation of the XIIC I2C bus
59 * @endianness: big/little-endian byte order
60 * @clk: Pointer to AXI4-lite input clock
113 #define XIIC_SR_MSTR_RDING_SLAVE_MASK 0x08 /* 1=Dir: mstr <-- slave */
170 #define xiic_tx_space(i2c) ((i2c)->tx_msg->len - (i2c)->tx_pos)
171 #define xiic_rx_space(i2c) ((i2c)->rx_msg->len - (i2c)->rx_pos)
177 * For the register read and write functions, a little-endian and big-endian
181 * big-endian systems.
186 if (i2c->endianness == LITTLE) in xiic_setreg8()
187 iowrite8(value, i2c->base + reg); in xiic_setreg8()
189 iowrite8(value, i2c->base + reg + 3); in xiic_setreg8()
196 if (i2c->endianness == LITTLE) in xiic_getreg8()
197 ret = ioread8(i2c->base + reg); in xiic_getreg8()
199 ret = ioread8(i2c->base + reg + 3); in xiic_getreg8()
205 if (i2c->endianness == LITTLE) in xiic_setreg16()
206 iowrite16(value, i2c->base + reg); in xiic_setreg16()
208 iowrite16be(value, i2c->base + reg + 2); in xiic_setreg16()
213 if (i2c->endianness == LITTLE) in xiic_setreg32()
214 iowrite32(value, i2c->base + reg); in xiic_setreg32()
216 iowrite32be(value, i2c->base + reg); in xiic_setreg32()
223 if (i2c->endianness == LITTLE) in xiic_getreg32()
224 ret = ioread32(i2c->base + reg); in xiic_getreg32()
226 ret = ioread32be(i2c->base + reg); in xiic_getreg32()
265 dev_err(i2c->dev, "Failed to clear rx fifo\n"); in xiic_clear_rx_fifo()
266 return -ETIMEDOUT; in xiic_clear_rx_fifo()
280 xiic_setreg8(i2c, XIIC_RFD_REG_OFFSET, IIC_RX_FIFO_DEPTH - 1); in xiic_reinit()
319 dev_dbg(i2c->adap.dev.parent, in xiic_read_rx()
329 i2c->rx_msg->buf[i2c->rx_pos++] = in xiic_read_rx()
334 IIC_RX_FIFO_DEPTH - 1 : xiic_rx_space(i2c) - 1); in xiic_read_rx()
340 return IIC_TX_FIFO_DEPTH - xiic_getreg8(i2c, XIIC_TFO_REG_OFFSET) - 1; in xiic_tx_fifo_space()
350 dev_dbg(i2c->adap.dev.parent, "%s entry, len: %d, fifo space: %d\n", in xiic_fill_tx_fifo()
353 while (len--) { in xiic_fill_tx_fifo()
354 u16 data = i2c->tx_msg->buf[i2c->tx_pos++]; in xiic_fill_tx_fifo()
355 if ((xiic_tx_space(i2c) == 0) && (i2c->nmsgs == 1)) { in xiic_fill_tx_fifo()
356 /* last message in transfer -> STOP */ in xiic_fill_tx_fifo()
358 dev_dbg(i2c->adap.dev.parent, "%s TX STOP\n", __func__); in xiic_fill_tx_fifo()
366 i2c->tx_msg = NULL; in xiic_wakeup()
367 i2c->rx_msg = NULL; in xiic_wakeup()
368 i2c->nmsgs = 0; in xiic_wakeup()
369 i2c->state = code; in xiic_wakeup()
370 wake_up(&i2c->wait); in xiic_wakeup()
387 mutex_lock(&i2c->lock); in xiic_process()
392 dev_dbg(i2c->adap.dev.parent, "%s: IER: 0x%x, ISR: 0x%x, pend: 0x%x\n", in xiic_process()
394 dev_dbg(i2c->adap.dev.parent, "%s: SR: 0x%x, msg: %p, nmsgs: %d\n", in xiic_process()
396 i2c->tx_msg, i2c->nmsgs); in xiic_process()
409 dev_dbg(i2c->adap.dev.parent, "%s error\n", __func__); in xiic_process()
417 if (i2c->rx_msg) { in xiic_process()
421 if (i2c->tx_msg) { in xiic_process()
432 if (!i2c->rx_msg) { in xiic_process()
433 dev_dbg(i2c->adap.dev.parent, in xiic_process()
442 i2c->rx_msg = NULL; in xiic_process()
447 dev_dbg(i2c->adap.dev.parent, in xiic_process()
449 __func__, i2c->nmsgs); in xiic_process()
455 if (i2c->nmsgs > 1) { in xiic_process()
456 i2c->nmsgs--; in xiic_process()
457 i2c->tx_msg++; in xiic_process()
458 dev_dbg(i2c->adap.dev.parent, in xiic_process()
471 if (!i2c->tx_msg) in xiic_process()
476 if (i2c->nmsgs == 1 && !i2c->rx_msg && in xiic_process()
488 if (!i2c->tx_msg) { in xiic_process()
489 dev_dbg(i2c->adap.dev.parent, in xiic_process()
498 dev_dbg(i2c->adap.dev.parent, in xiic_process()
500 __func__, i2c->nmsgs); in xiic_process()
501 if (i2c->nmsgs > 1) { in xiic_process()
502 i2c->nmsgs--; in xiic_process()
503 i2c->tx_msg++; in xiic_process()
508 dev_dbg(i2c->adap.dev.parent, in xiic_process()
512 } else if (!xiic_tx_space(i2c) && (i2c->nmsgs == 1)) in xiic_process()
519 dev_dbg(i2c->adap.dev.parent, "%s clr: 0x%x\n", __func__, clr); in xiic_process()
529 mutex_unlock(&i2c->lock); in xiic_process()
537 return (sr & XIIC_SR_BUS_BUSY_MASK) ? -EBUSY : 0; in xiic_bus_busy()
545 if (i2c->tx_msg) in xiic_busy()
546 return -EBUSY; in xiic_busy()
553 if (i2c->singlemaster) { in xiic_busy()
562 while (err && tries--) { in xiic_busy()
573 struct i2c_msg *msg = i2c->rx_msg = i2c->tx_msg; in xiic_start_recv()
585 rx_watermark = msg->len; in xiic_start_recv()
588 xiic_setreg8(i2c, XIIC_RFD_REG_OFFSET, rx_watermark - 1); in xiic_start_recv()
591 if (!(msg->flags & I2C_M_NOSTART)) in xiic_start_recv()
599 msg->len | ((i2c->nmsgs == 1) ? XIIC_TX_DYN_STOP_MASK : 0)); in xiic_start_recv()
602 if (i2c->nmsgs == 1) in xiic_start_recv()
607 i2c->tx_pos = msg->len; in xiic_start_recv()
612 struct i2c_msg *msg = i2c->tx_msg; in xiic_start_send()
616 dev_dbg(i2c->adap.dev.parent, "%s entry, msg: %p, len: %d", in xiic_start_send()
617 __func__, msg, msg->len); in xiic_start_send()
618 dev_dbg(i2c->adap.dev.parent, "%s entry, ISR: 0x%x, CR: 0x%x\n", in xiic_start_send()
622 if (!(msg->flags & I2C_M_NOSTART)) { in xiic_start_send()
626 if ((i2c->nmsgs == 1) && msg->len == 0) in xiic_start_send()
627 /* no data and last message -> add STOP */ in xiic_start_send()
649 dev_dbg(i2c->adap.dev.parent, "%s entry\n", __func__); in xiic_isr()
664 dev_dbg(i2c->adap.dev.parent, "%s entry, msg: %p, fifos space: %d\n", in __xiic_start_xfer()
665 __func__, i2c->tx_msg, fifo_space); in __xiic_start_xfer()
667 if (!i2c->tx_msg) in __xiic_start_xfer()
670 i2c->rx_pos = 0; in __xiic_start_xfer()
671 i2c->tx_pos = 0; in __xiic_start_xfer()
672 i2c->state = STATE_START; in __xiic_start_xfer()
673 while ((fifo_space >= 2) && (first || (i2c->nmsgs > 1))) { in __xiic_start_xfer()
675 i2c->nmsgs--; in __xiic_start_xfer()
676 i2c->tx_msg++; in __xiic_start_xfer()
677 i2c->tx_pos = 0; in __xiic_start_xfer()
681 if (i2c->tx_msg->flags & I2C_M_RD) { in __xiic_start_xfer()
699 if (i2c->nmsgs > 1 || xiic_tx_space(i2c)) in __xiic_start_xfer()
707 mutex_lock(&i2c->lock); in xiic_start_xfer()
713 mutex_unlock(&i2c->lock); in xiic_start_xfer()
723 dev_dbg(adap->dev.parent, "%s entry SR: 0x%x\n", __func__, in xiic_xfer()
726 err = pm_runtime_resume_and_get(i2c->dev); in xiic_xfer()
734 i2c->tx_msg = msgs; in xiic_xfer()
735 i2c->nmsgs = num; in xiic_xfer()
739 dev_err(adap->dev.parent, "Error xiic_start_xfer\n"); in xiic_xfer()
743 if (wait_event_timeout(i2c->wait, (i2c->state == STATE_ERROR) || in xiic_xfer()
744 (i2c->state == STATE_DONE), HZ)) { in xiic_xfer()
745 err = (i2c->state == STATE_DONE) ? num : -EIO; in xiic_xfer()
748 i2c->tx_msg = NULL; in xiic_xfer()
749 i2c->rx_msg = NULL; in xiic_xfer()
750 i2c->nmsgs = 0; in xiic_xfer()
751 err = -ETIMEDOUT; in xiic_xfer()
755 pm_runtime_mark_last_busy(i2c->dev); in xiic_xfer()
756 pm_runtime_put_autosuspend(i2c->dev); in xiic_xfer()
791 i2c = devm_kzalloc(&pdev->dev, sizeof(*i2c), GFP_KERNEL); in xiic_i2c_probe()
793 return -ENOMEM; in xiic_i2c_probe()
796 i2c->base = devm_ioremap_resource(&pdev->dev, res); in xiic_i2c_probe()
797 if (IS_ERR(i2c->base)) in xiic_i2c_probe()
798 return PTR_ERR(i2c->base); in xiic_i2c_probe()
804 pdata = dev_get_platdata(&pdev->dev); in xiic_i2c_probe()
808 i2c->adap = xiic_adapter; in xiic_i2c_probe()
809 i2c_set_adapdata(&i2c->adap, i2c); in xiic_i2c_probe()
810 i2c->adap.dev.parent = &pdev->dev; in xiic_i2c_probe()
811 i2c->adap.dev.of_node = pdev->dev.of_node; in xiic_i2c_probe()
812 snprintf(i2c->adap.name, sizeof(i2c->adap.name), in xiic_i2c_probe()
813 DRIVER_NAME " %s", pdev->name); in xiic_i2c_probe()
815 mutex_init(&i2c->lock); in xiic_i2c_probe()
816 init_waitqueue_head(&i2c->wait); in xiic_i2c_probe()
818 i2c->clk = devm_clk_get(&pdev->dev, NULL); in xiic_i2c_probe()
819 if (IS_ERR(i2c->clk)) { in xiic_i2c_probe()
820 if (PTR_ERR(i2c->clk) != -EPROBE_DEFER) in xiic_i2c_probe()
821 dev_err(&pdev->dev, "input clock not found.\n"); in xiic_i2c_probe()
822 return PTR_ERR(i2c->clk); in xiic_i2c_probe()
824 ret = clk_prepare_enable(i2c->clk); in xiic_i2c_probe()
826 dev_err(&pdev->dev, "Unable to enable clock.\n"); in xiic_i2c_probe()
829 i2c->dev = &pdev->dev; in xiic_i2c_probe()
830 pm_runtime_set_autosuspend_delay(i2c->dev, XIIC_PM_TIMEOUT); in xiic_i2c_probe()
831 pm_runtime_use_autosuspend(i2c->dev); in xiic_i2c_probe()
832 pm_runtime_set_active(i2c->dev); in xiic_i2c_probe()
833 pm_runtime_enable(i2c->dev); in xiic_i2c_probe()
834 ret = devm_request_threaded_irq(&pdev->dev, irq, xiic_isr, in xiic_i2c_probe()
836 pdev->name, i2c); in xiic_i2c_probe()
839 dev_err(&pdev->dev, "Cannot claim IRQ\n"); in xiic_i2c_probe()
843 i2c->singlemaster = in xiic_i2c_probe()
844 of_property_read_bool(pdev->dev.of_node, "single-master"); in xiic_i2c_probe()
851 i2c->endianness = LITTLE; in xiic_i2c_probe()
856 i2c->endianness = BIG; in xiic_i2c_probe()
860 dev_err(&pdev->dev, "Cannot xiic_reinit\n"); in xiic_i2c_probe()
865 ret = i2c_add_adapter(&i2c->adap); in xiic_i2c_probe()
873 for (i = 0; i < pdata->num_devices; i++) in xiic_i2c_probe()
874 i2c_new_client_device(&i2c->adap, pdata->devices + i); in xiic_i2c_probe()
880 pm_runtime_set_suspended(&pdev->dev); in xiic_i2c_probe()
881 pm_runtime_disable(&pdev->dev); in xiic_i2c_probe()
882 clk_disable_unprepare(i2c->clk); in xiic_i2c_probe()
892 i2c_del_adapter(&i2c->adap); in xiic_i2c_remove()
894 ret = pm_runtime_resume_and_get(i2c->dev); in xiic_i2c_remove()
899 pm_runtime_put_sync(i2c->dev); in xiic_i2c_remove()
900 clk_disable_unprepare(i2c->clk); in xiic_i2c_remove()
901 pm_runtime_disable(&pdev->dev); in xiic_i2c_remove()
902 pm_runtime_set_suspended(&pdev->dev); in xiic_i2c_remove()
903 pm_runtime_dont_use_autosuspend(&pdev->dev); in xiic_i2c_remove()
910 { .compatible = "xlnx,xps-iic-2.00.a", },
920 clk_disable(i2c->clk); in xiic_i2c_runtime_suspend()
930 ret = clk_enable(i2c->clk); in xiic_i2c_runtime_resume()
956 MODULE_AUTHOR("info@mocean-labs.com");