Lines Matching +full:udma +full:- +full:c
2 * Copyright (C) 2000 Andre Hedrick <andre@linux-ide.org>
3 * Copyright (C) 2000 Mark Lord <mlord@pobox.com>
4 * Copyright (C) 2007 Bartlomiej Zolnierkiewicz
27 * Here are the standard PIO mode 0-4 timings for each "format".
28 * Format-0 uses fast data reg timings, with slower command reg timings.
29 * Format-1 uses fast timings for all registers, but won't work with all drives.
40 #define CS5530_BASEREG(hwif) (((hwif)->dma_base & ~0xf) + ((hwif)->channel ? 0x30 : 0x20))
43 * cs5530_set_pio_mode - set host controller for PIO mode
57 const u8 pio = drive->pio_mode - XFER_PIO_0; in cs5530_set_pio_mode()
59 outl(cs5530_pio_timings[format][pio], basereg + ((drive->dn & 1)<<3)); in cs5530_set_pio_mode()
63 * cs5530_udma_filter - UDMA filter
66 * cs5530_udma_filter() does UDMA mask filtering for the given drive
70 * UDMA/MDMA. It has to be one or the other, for the pair, though
77 * Note: This relies on the fact we never fail from UDMA to MWDMA2
83 ide_hwif_t *hwif = drive->hwif; in cs5530_udma_filter()
86 u8 mask = hwif->ultra_mask; in cs5530_udma_filter()
90 mateid = mate->id; in cs5530_udma_filter()
108 switch (drive->dma_mode) { in cs5530_set_dma_mode()
119 if ((drive-> dn & 1) == 0) { /* are we configuring drive0? */ in cs5530_set_dma_mode()
123 reg |= 0x00100000; /* enable UDMA timings for both drives */ in cs5530_set_dma_mode()
125 reg &= ~0x00100000; /* disable UDMA timings for both drives */ in cs5530_set_dma_mode()
132 * init_chipset_5530 - set up 5530 bridge
143 return -EFAULT; in init_chipset_cs5530()
147 switch (dev->device) { in init_chipset_cs5530()
167 * --> OR 0x14 into 16-bit PCI COMMAND reg of function 0 of the cs5530 in init_chipset_cs5530()
174 * Set PCI CacheLineSize to 16-bytes: in init_chipset_cs5530()
175 * --> Write 0x04 into 8-bit PCI CACHELINESIZE reg of function 0 of the cs5530 in init_chipset_cs5530()
181 * Disable trapping of UDMA register accesses (Win98 hack): in init_chipset_cs5530()
182 * --> Write 0x5006 into 16-bit reg at offset 0xd0 of function 0 of the cs5530 in init_chipset_cs5530()
188 * Bit-1 at 0x40 enables MemoryWriteAndInvalidate on internal X-bus: in init_chipset_cs5530()
196 * Set max PCI burst size (16-bytes seems to work best): in init_chipset_cs5530()
197 * 16bytes: set bit-1 at 0x41 (reg value of 0x16) in init_chipset_cs5530()
198 * all others: clear bit-1 at 0x41, and do: in init_chipset_cs5530()
222 * init_hwif_cs5530 - initialise an IDE channel
226 * performs channel-specific pre-initialization before drive probing.