Lines Matching +full:depth +full:-
1 // SPDX-License-Identifier: GPL-2.0-only
94 #define MAX1027_V_CHAN(index, depth) \ argument
104 .realbits = depth, \
106 .shift = (depth == 10) ? 2 : 0, \
126 #define MAX1X27_CHANNELS(depth) \ argument
128 MAX1027_V_CHAN(0, depth), \
129 MAX1027_V_CHAN(1, depth), \
130 MAX1027_V_CHAN(2, depth), \
131 MAX1027_V_CHAN(3, depth), \
132 MAX1027_V_CHAN(4, depth), \
133 MAX1027_V_CHAN(5, depth), \
134 MAX1027_V_CHAN(6, depth), \
135 MAX1027_V_CHAN(7, depth)
137 #define MAX1X29_CHANNELS(depth) \ argument
138 MAX1X27_CHANNELS(depth), \
139 MAX1027_V_CHAN(8, depth), \
140 MAX1027_V_CHAN(9, depth), \
141 MAX1027_V_CHAN(10, depth), \
142 MAX1027_V_CHAN(11, depth)
144 #define MAX1X31_CHANNELS(depth) \ argument
145 MAX1X29_CHANNELS(depth), \
146 MAX1027_V_CHAN(12, depth), \
147 MAX1027_V_CHAN(13, depth), \
148 MAX1027_V_CHAN(14, depth), \
149 MAX1027_V_CHAN(15, depth)
247 dev_warn(&indio_dev->dev, "trigger mode already enabled"); in max1027_read_single_value()
248 return -EBUSY; in max1027_read_single_value()
252 st->reg = MAX1027_SETUP_REG | MAX1027_REF_MODE2 | MAX1027_CKS_MODE2; in max1027_read_single_value()
253 ret = spi_write(st->spi, &st->reg, 1); in max1027_read_single_value()
255 dev_err(&indio_dev->dev, in max1027_read_single_value()
261 st->reg = MAX1027_CONV_REG | MAX1027_CHAN(chan->channel) | in max1027_read_single_value()
263 if (chan->type == IIO_TEMP) in max1027_read_single_value()
264 st->reg |= MAX1027_TEMP; in max1027_read_single_value()
265 ret = spi_write(st->spi, &st->reg, 1); in max1027_read_single_value()
267 dev_err(&indio_dev->dev, in max1027_read_single_value()
280 ret = spi_read(st->spi, st->buffer, (chan->type == IIO_TEMP) ? 4 : 2); in max1027_read_single_value()
284 *val = be16_to_cpu(st->buffer[0]); in max1027_read_single_value()
296 mutex_lock(&st->lock); in max1027_read_raw()
303 switch (chan->type) { in max1027_read_raw()
311 *val2 = chan->scan_type.realbits; in max1027_read_raw()
315 ret = -EINVAL; in max1027_read_raw()
320 ret = -EINVAL; in max1027_read_raw()
324 mutex_unlock(&st->lock); in max1027_read_raw()
334 u8 *val = (u8 *)st->buffer; in max1027_debugfs_reg_access()
337 int ret = spi_read(st->spi, val, 2); in max1027_debugfs_reg_access()
338 *readval = be16_to_cpu(st->buffer[0]); in max1027_debugfs_reg_access()
343 return spi_write(st->spi, val, 1); in max1027_debugfs_reg_access()
351 if (st->trig != trig) in max1027_validate_trigger()
352 return -EINVAL; in max1027_validate_trigger()
365 st->reg = MAX1027_SETUP_REG | MAX1027_CKS_MODE0 | in max1027_set_trigger_state()
367 ret = spi_write(st->spi, &st->reg, 1); in max1027_set_trigger_state()
372 st->reg = MAX1027_CONV_REG | MAX1027_CHAN(0) | in max1027_set_trigger_state()
374 ret = spi_write(st->spi, &st->reg, 1); in max1027_set_trigger_state()
379 st->reg = MAX1027_SETUP_REG | MAX1027_CKS_MODE2 | in max1027_set_trigger_state()
381 ret = spi_write(st->spi, &st->reg, 1); in max1027_set_trigger_state()
392 struct iio_dev *indio_dev = pf->indio_dev; in max1027_trigger_handler()
398 spi_read(st->spi, st->buffer, indio_dev->masklength * 2); in max1027_trigger_handler()
400 iio_push_to_buffers(indio_dev, st->buffer); in max1027_trigger_handler()
402 iio_trigger_notify_done(indio_dev->trig); in max1027_trigger_handler()
426 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); in max1027_probe()
429 return -ENOMEM; in max1027_probe()
435 st->spi = spi; in max1027_probe()
436 st->info = &max1027_chip_info_tbl[spi_get_device_id(spi)->driver_data]; in max1027_probe()
438 mutex_init(&st->lock); in max1027_probe()
440 indio_dev->name = spi_get_device_id(spi)->name; in max1027_probe()
441 indio_dev->info = &max1027_info; in max1027_probe()
442 indio_dev->modes = INDIO_DIRECT_MODE; in max1027_probe()
443 indio_dev->channels = st->info->channels; in max1027_probe()
444 indio_dev->num_channels = st->info->num_channels; in max1027_probe()
445 indio_dev->available_scan_masks = st->info->available_scan_masks; in max1027_probe()
447 st->buffer = devm_kmalloc_array(&indio_dev->dev, in max1027_probe()
448 indio_dev->num_channels, 2, in max1027_probe()
450 if (st->buffer == NULL) { in max1027_probe()
451 dev_err(&indio_dev->dev, "Can't allocate buffer\n"); in max1027_probe()
452 return -ENOMEM; in max1027_probe()
455 if (spi->irq) { in max1027_probe()
456 ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, in max1027_probe()
461 dev_err(&indio_dev->dev, "Failed to setup buffer\n"); in max1027_probe()
465 st->trig = devm_iio_trigger_alloc(&spi->dev, "%s-trigger", in max1027_probe()
466 indio_dev->name); in max1027_probe()
467 if (st->trig == NULL) { in max1027_probe()
468 ret = -ENOMEM; in max1027_probe()
469 dev_err(&indio_dev->dev, in max1027_probe()
474 st->trig->ops = &max1027_trigger_ops; in max1027_probe()
475 st->trig->dev.parent = &spi->dev; in max1027_probe()
476 iio_trigger_set_drvdata(st->trig, indio_dev); in max1027_probe()
477 ret = devm_iio_trigger_register(&indio_dev->dev, in max1027_probe()
478 st->trig); in max1027_probe()
480 dev_err(&indio_dev->dev, in max1027_probe()
485 ret = devm_request_threaded_irq(&spi->dev, spi->irq, in max1027_probe()
489 spi->dev.driver->name, in max1027_probe()
490 st->trig); in max1027_probe()
492 dev_err(&indio_dev->dev, "Failed to allocate IRQ.\n"); in max1027_probe()
498 st->reg = MAX1027_RST_REG; in max1027_probe()
499 ret = spi_write(st->spi, &st->reg, 1); in max1027_probe()
501 dev_err(&indio_dev->dev, "Failed to reset the ADC\n"); in max1027_probe()
506 st->reg = MAX1027_AVG_REG; in max1027_probe()
507 ret = spi_write(st->spi, &st->reg, 1); in max1027_probe()
509 dev_err(&indio_dev->dev, "Failed to configure averaging register\n"); in max1027_probe()
513 return devm_iio_device_register(&spi->dev, indio_dev); in max1027_probe()