1 // SPDX-License-Identifier: GPL-2.0
26 	struct regulator *vref;  member
30 /* ADC registers */
50 /* ADC General Definition */
80 	regtemp = ioread32(info->regs + NPCM_ADCCON);  in npcm_adc_isr()
82 		iowrite32(regtemp, info->regs + NPCM_ADCCON);  in npcm_adc_isr()
83 		wake_up_interruptible(&info->wq);  in npcm_adc_isr()
84 		info->int_status = true;  in npcm_adc_isr()
95 	/* Select ADC channel */  in npcm_adc_read()
96 	regtemp = ioread32(info->regs + NPCM_ADCCON);  in npcm_adc_read()
98 	info->int_status = false;  in npcm_adc_read()
100 		  NPCM_ADCCON_ADC_CONV, info->regs + NPCM_ADCCON);  in npcm_adc_read()
102 	ret = wait_event_interruptible_timeout(info->wq, info->int_status,  in npcm_adc_read()
105 		regtemp = ioread32(info->regs + NPCM_ADCCON);  in npcm_adc_read()
107 			/* if conversion failed - reset ADC module */  in npcm_adc_read()
108 			reset_control_assert(info->reset);  in npcm_adc_read()
110 			reset_control_deassert(info->reset);  in npcm_adc_read()
113 			/* Enable ADC and start conversion module */  in npcm_adc_read()
115 				  info->regs + NPCM_ADCCON);  in npcm_adc_read()
116 			dev_err(info->dev, "RESET ADC Complete\n");  in npcm_adc_read()
118 		return -ETIMEDOUT;  in npcm_adc_read()
123 	*val = NPCM_ADC_DATA_MASK(ioread32(info->regs + NPCM_ADCDATA));  in npcm_adc_read()
138 		mutex_lock(&indio_dev->mlock);  in npcm_adc_read_raw()
139 		ret = npcm_adc_read(info, val, chan->channel);  in npcm_adc_read_raw()
140 		mutex_unlock(&indio_dev->mlock);  in npcm_adc_read_raw()
142 			dev_err(info->dev, "NPCM ADC read failed\n");  in npcm_adc_read_raw()
147 		if (!IS_ERR(info->vref)) {  in npcm_adc_read_raw()
148 			vref_uv = regulator_get_voltage(info->vref);  in npcm_adc_read_raw()
156 		*val = info->adc_sample_hz;  in npcm_adc_read_raw()
159 		return -EINVAL;  in npcm_adc_read_raw()
170 	{ .compatible = "nuvoton,npcm750-adc", },
183 	struct device *dev = &pdev->dev;  in npcm_adc_probe()
185 	indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info));  in npcm_adc_probe()
187 		return -ENOMEM;  in npcm_adc_probe()
190 	info->dev = &pdev->dev;  in npcm_adc_probe()
192 	info->regs = devm_platform_ioremap_resource(pdev, 0);  in npcm_adc_probe()
193 	if (IS_ERR(info->regs))  in npcm_adc_probe()
194 		return PTR_ERR(info->regs);  in npcm_adc_probe()
196 	info->reset = devm_reset_control_get(&pdev->dev, NULL);  in npcm_adc_probe()
197 	if (IS_ERR(info->reset))  in npcm_adc_probe()
198 		return PTR_ERR(info->reset);  in npcm_adc_probe()
200 	info->adc_clk = devm_clk_get(&pdev->dev, NULL);  in npcm_adc_probe()
201 	if (IS_ERR(info->adc_clk)) {  in npcm_adc_probe()
202 		dev_warn(&pdev->dev, "ADC clock failed: can't read clk\n");  in npcm_adc_probe()
203 		return PTR_ERR(info->adc_clk);  in npcm_adc_probe()
206 	/* calculate ADC clock sample rate */  in npcm_adc_probe()
207 	reg_con = ioread32(info->regs + NPCM_ADCCON);  in npcm_adc_probe()
210 	info->adc_sample_hz = clk_get_rate(info->adc_clk) / ((div + 1) * 2);  in npcm_adc_probe()
214 		ret = -EINVAL;  in npcm_adc_probe()
218 	ret = devm_request_irq(&pdev->dev, irq, npcm_adc_isr, 0,  in npcm_adc_probe()
225 	reg_con = ioread32(info->regs + NPCM_ADCCON);  in npcm_adc_probe()
226 	info->vref = devm_regulator_get_optional(&pdev->dev, "vref");  in npcm_adc_probe()
227 	if (!IS_ERR(info->vref)) {  in npcm_adc_probe()
228 		ret = regulator_enable(info->vref);  in npcm_adc_probe()
230 			dev_err(&pdev->dev, "Can't enable ADC reference voltage\n");  in npcm_adc_probe()
235 			  info->regs + NPCM_ADCCON);  in npcm_adc_probe()
241 		if (PTR_ERR(info->vref) != -ENODEV) {  in npcm_adc_probe()
242 			ret = PTR_ERR(info->vref);  in npcm_adc_probe()
248 			  info->regs + NPCM_ADCCON);  in npcm_adc_probe()
251 	init_waitqueue_head(&info->wq);  in npcm_adc_probe()
253 	reg_con = ioread32(info->regs + NPCM_ADCCON);  in npcm_adc_probe()
256 	/* Enable the ADC Module */  in npcm_adc_probe()
257 	iowrite32(reg_con, info->regs + NPCM_ADCCON);  in npcm_adc_probe()
259 	/* Start ADC conversion */  in npcm_adc_probe()
260 	iowrite32(reg_con | NPCM_ADCCON_ADC_CONV, info->regs + NPCM_ADCCON);  in npcm_adc_probe()
263 	indio_dev->name = dev_name(&pdev->dev);  in npcm_adc_probe()
264 	indio_dev->info = &npcm_adc_iio_info;  in npcm_adc_probe()
265 	indio_dev->modes = INDIO_DIRECT_MODE;  in npcm_adc_probe()
266 	indio_dev->channels = npcm_adc_iio_channels;  in npcm_adc_probe()
267 	indio_dev->num_channels = ARRAY_SIZE(npcm_adc_iio_channels);  in npcm_adc_probe()
271 		dev_err(&pdev->dev, "Couldn't register the device.\n");  in npcm_adc_probe()
275 	pr_info("NPCM ADC driver probed\n");  in npcm_adc_probe()
280 	iowrite32(reg_con & ~NPCM_ADCCON_ADC_EN, info->regs + NPCM_ADCCON);  in npcm_adc_probe()
281 	if (!IS_ERR(info->vref))  in npcm_adc_probe()
282 		regulator_disable(info->vref);  in npcm_adc_probe()
284 	clk_disable_unprepare(info->adc_clk);  in npcm_adc_probe()
297 	regtemp = ioread32(info->regs + NPCM_ADCCON);  in npcm_adc_remove()
298 	iowrite32(regtemp & ~NPCM_ADCCON_ADC_EN, info->regs + NPCM_ADCCON);  in npcm_adc_remove()
299 	if (!IS_ERR(info->vref))  in npcm_adc_remove()
300 		regulator_disable(info->vref);  in npcm_adc_remove()
301 	clk_disable_unprepare(info->adc_clk);  in npcm_adc_remove()
317 MODULE_DESCRIPTION("Nuvoton NPCM ADC Driver");