Lines Matching +full:iommu +full:- +full:addresses
1 /* SPDX-License-Identifier: GPL-2.0 */
3 * pasid.h - PASID idr, table and entry header
24 #define is_pasid_enabled(entry) (((entry)->lo >> 3) & 0x1)
25 #define get_pasid_dir_size(entry) (1 << ((((entry)->lo >> 9) & 0x7) + 7))
38 * Domain ID reserved for pasid entries programmed for first-level
39 * only and pass-through transfer modes.
45 * can be used for access to kernel addresses. It is valid only for
54 * The PASID_FLAG_FL5LP flag Indicates using 5-level paging for first-
55 * level translation, otherwise, 4-level paging will be used.
83 return READ_ONCE(pde->val) & PASID_PTE_PRESENT; in pasid_pde_is_present()
93 return phys_to_virt(READ_ONCE(pde->val) & PDE_PFN_MASK); in get_pasid_table_from_pde()
99 return READ_ONCE(pte->val[0]) & PASID_PTE_PRESENT; in pasid_pte_is_present()
105 return (u16)((READ_ONCE(pte->val[0]) >> 6) & 0x7); in pasid_pte_get_pgtt()
117 int intel_pasid_setup_first_level(struct intel_iommu *iommu,
120 int intel_pasid_setup_second_level(struct intel_iommu *iommu,
123 int intel_pasid_setup_pass_through(struct intel_iommu *iommu,
126 int intel_pasid_setup_nested(struct intel_iommu *iommu,
130 void intel_pasid_tear_down_entry(struct intel_iommu *iommu,
133 int vcmd_alloc_pasid(struct intel_iommu *iommu, u32 *pasid);
134 void vcmd_free_pasid(struct intel_iommu *iommu, u32 pasid);