Lines Matching +full:lpddr2 +full:- +full:s4
1 // SPDX-License-Identifier: GPL-2.0-only
32 * struct emif_data - Per device static data for driver's use
36 * @temperature_level: Maximum temperature of LPDDR2 devices attached
37 * to this EMIF - read from MR4 register. If there
42 * @base: base address of memory-mapped IO registers.
47 * frequencies, to avoid re-calculating them on
82 u32 type = emif->plat_data->device_info->type; in do_emif_regdump_show()
83 u32 ip_rev = emif->plat_data->ip_rev; in do_emif_regdump_show()
86 regs->freq/1000000); in do_emif_regdump_show()
88 seq_printf(s, "ref_ctrl_shdw\t: 0x%08x\n", regs->ref_ctrl_shdw); in do_emif_regdump_show()
89 seq_printf(s, "sdram_tim1_shdw\t: 0x%08x\n", regs->sdram_tim1_shdw); in do_emif_regdump_show()
90 seq_printf(s, "sdram_tim2_shdw\t: 0x%08x\n", regs->sdram_tim2_shdw); in do_emif_regdump_show()
91 seq_printf(s, "sdram_tim3_shdw\t: 0x%08x\n", regs->sdram_tim3_shdw); in do_emif_regdump_show()
95 regs->read_idle_ctrl_shdw_normal); in do_emif_regdump_show()
97 regs->read_idle_ctrl_shdw_volt_ramp); in do_emif_regdump_show()
100 regs->dll_calib_ctrl_shdw_normal); in do_emif_regdump_show()
102 regs->dll_calib_ctrl_shdw_volt_ramp); in do_emif_regdump_show()
107 regs->ref_ctrl_shdw_derated); in do_emif_regdump_show()
109 regs->sdram_tim1_shdw_derated); in do_emif_regdump_show()
111 regs->sdram_tim3_shdw_derated); in do_emif_regdump_show()
117 struct emif_data *emif = s->private; in emif_regdump_show()
121 if (emif->duplicate) in emif_regdump_show()
122 regs_cache = emif1->regs_cache; in emif_regdump_show()
124 regs_cache = emif->regs_cache; in emif_regdump_show()
138 struct emif_data *emif = s->private; in emif_mr4_show()
140 seq_printf(s, "MR4=%d\n", emif->temperature_level); in emif_mr4_show()
148 emif->debugfs_root = debugfs_create_dir(dev_name(emif->dev), NULL); in emif_debugfs_init()
149 debugfs_create_file("regcache_dump", S_IRUGO, emif->debugfs_root, emif, in emif_debugfs_init()
151 debugfs_create_file("mr4", S_IRUGO, emif->debugfs_root, emif, in emif_debugfs_init()
158 debugfs_remove_recursive(emif->debugfs_root); in emif_debugfs_exit()
159 emif->debugfs_root = NULL; in emif_debugfs_exit()
183 * bus width of the DDR devices used. For instance two 16-bit DDR devices
190 void __iomem *base = emif->base; in get_emif_bus_width()
205 void __iomem *base = emif->base; in get_cl()
215 void __iomem *base = emif->base; in set_lpmode()
218 * Workaround for errata i743 - LPDDR2 Power-Down State is Not in set_lpmode()
222 * The EMIF supports power-down state for low power. The EMIF in set_lpmode()
223 * automatically puts the SDRAM into power-down after the memory is in set_lpmode()
228 * power-down and precharge power-down modes. The EMIF waits and in set_lpmode()
231 * exit of power-down mode. Due to very short periods of power-down in set_lpmode()
234 * issuing ZQ calibration long commands when exiting self-refresh is in set_lpmode()
238 * Because there is no power consumption benefit of the power-down due in set_lpmode()
240 * is to not allow power-down state and, therefore, to not have set in set_lpmode()
243 if ((emif->plat_data->ip_rev == EMIF_4D) && in set_lpmode()
247 /* rollback LP_MODE to Self-refresh mode */ in set_lpmode()
265 * The EMIF automatically puts the SDRAM into self-refresh mode in do_freq_update()
271 * - The SR_TIMING counter expires in do_freq_update()
272 * - And frequency change is requested in do_freq_update()
273 * - And OCP access is requested in do_freq_update()
278 * is to disable the self-refresh when requesting a frequency in do_freq_update()
285 if (emif->lpmode == EMIF_LP_MODE_SELF_REFRESH) in do_freq_update()
296 if (emif->lpmode == EMIF_LP_MODE_SELF_REFRESH) in do_freq_update()
307 type = device_info->type; in get_addressing_table()
308 density = device_info->density; in get_addressing_table()
312 index = density - 1; in get_addressing_table()
321 index = density - 1; in get_addressing_table()
340 const struct lpddr2_timings *timings_arr = emif->plat_data->timings; in get_timings_table()
341 struct device *dev = emif->dev; in get_timings_table()
343 /* Start with a very high frequency - 1GHz */ in get_timings_table()
351 for (i = 0; i < emif->plat_data->timings_arr_size; i++) { in get_timings_table()
361 dev_err(dev, "%s: couldn't find timings for - %dHz\n", in get_timings_table()
377 t_refi = addressing->tREFI_ns / 100; in get_sdram_ref_ctrl_shdw()
395 val = max(min_tck->tWTR, DIV_ROUND_UP(timings->tWTR, t_ck)) - 1; in get_sdram_tim_1_shdw()
398 if (addressing->num_banks == B8) in get_sdram_tim_1_shdw()
399 val = DIV_ROUND_UP(timings->tFAW, t_ck*4); in get_sdram_tim_1_shdw()
401 val = max(min_tck->tRRD, DIV_ROUND_UP(timings->tRRD, t_ck)); in get_sdram_tim_1_shdw()
402 tim1 |= (val - 1) << T_RRD_SHIFT; in get_sdram_tim_1_shdw()
404 val = DIV_ROUND_UP(timings->tRAS_min + timings->tRPab, t_ck) - 1; in get_sdram_tim_1_shdw()
407 val = max(min_tck->tRASmin, DIV_ROUND_UP(timings->tRAS_min, t_ck)); in get_sdram_tim_1_shdw()
408 tim1 |= (val - 1) << T_RAS_SHIFT; in get_sdram_tim_1_shdw()
410 val = max(min_tck->tWR, DIV_ROUND_UP(timings->tWR, t_ck)) - 1; in get_sdram_tim_1_shdw()
413 val = max(min_tck->tRCD, DIV_ROUND_UP(timings->tRCD, t_ck)) - 1; in get_sdram_tim_1_shdw()
416 val = max(min_tck->tRPab, DIV_ROUND_UP(timings->tRPab, t_ck)) - 1; in get_sdram_tim_1_shdw()
428 val = max(min_tck->tWTR, DIV_ROUND_UP(timings->tWTR, t_ck)) - 1; in get_sdram_tim_1_shdw_derated()
433 * to tFAW for de-rating in get_sdram_tim_1_shdw_derated()
435 if (addressing->num_banks == B8) { in get_sdram_tim_1_shdw_derated()
436 val = DIV_ROUND_UP(timings->tFAW + 7500, 4 * t_ck) - 1; in get_sdram_tim_1_shdw_derated()
438 val = DIV_ROUND_UP(timings->tRRD + 1875, t_ck); in get_sdram_tim_1_shdw_derated()
439 val = max(min_tck->tRRD, val) - 1; in get_sdram_tim_1_shdw_derated()
443 val = DIV_ROUND_UP(timings->tRAS_min + timings->tRPab + 1875, t_ck); in get_sdram_tim_1_shdw_derated()
444 tim1 |= (val - 1) << T_RC_SHIFT; in get_sdram_tim_1_shdw_derated()
446 val = DIV_ROUND_UP(timings->tRAS_min + 1875, t_ck); in get_sdram_tim_1_shdw_derated()
447 val = max(min_tck->tRASmin, val) - 1; in get_sdram_tim_1_shdw_derated()
450 val = max(min_tck->tWR, DIV_ROUND_UP(timings->tWR, t_ck)) - 1; in get_sdram_tim_1_shdw_derated()
453 val = max(min_tck->tRCD, DIV_ROUND_UP(timings->tRCD + 1875, t_ck)); in get_sdram_tim_1_shdw_derated()
454 tim1 |= (val - 1) << T_RCD_SHIFT; in get_sdram_tim_1_shdw_derated()
456 val = max(min_tck->tRPab, DIV_ROUND_UP(timings->tRPab + 1875, t_ck)); in get_sdram_tim_1_shdw_derated()
457 tim1 |= (val - 1) << T_RP_SHIFT; in get_sdram_tim_1_shdw_derated()
469 val = min_tck->tCKE - 1; in get_sdram_tim_2_shdw()
472 val = max(min_tck->tRTP, DIV_ROUND_UP(timings->tRTP, t_ck)) - 1; in get_sdram_tim_2_shdw()
475 /* tXSNR = tRFCab_ps + 10 ns(tRFCab_ps for LPDDR2). */ in get_sdram_tim_2_shdw()
476 val = DIV_ROUND_UP(addressing->tRFCab_ps + 10000, t_ck) - 1; in get_sdram_tim_2_shdw()
479 /* XSRD same as XSNR for LPDDR2 */ in get_sdram_tim_2_shdw()
482 val = max(min_tck->tXP, DIV_ROUND_UP(timings->tXP, t_ck)) - 1; in get_sdram_tim_2_shdw()
495 val = timings->tRAS_max_ns / addressing->tREFI_ns - 1; in get_sdram_tim_3_shdw()
499 val = DIV_ROUND_UP(addressing->tRFCab_ps, t_ck) - 1; in get_sdram_tim_3_shdw()
503 timings->tDQSCK_max_derated : timings->tDQSCK_max; in get_sdram_tim_3_shdw()
505 val = DIV_ROUND_UP(t_dqsck + 1000, t_ck) - 1; in get_sdram_tim_3_shdw()
507 val = DIV_ROUND_UP(t_dqsck, t_ck) - 1; in get_sdram_tim_3_shdw()
511 val = DIV_ROUND_UP(timings->tZQCS, t_ck) - 1; in get_sdram_tim_3_shdw()
514 val = DIV_ROUND_UP(timings->tCKESR, t_ck); in get_sdram_tim_3_shdw()
515 val = max(min_tck->tCKESR, val) - 1; in get_sdram_tim_3_shdw()
519 tim3 |= (EMIF_T_CSTA - 1) << T_CSTA_SHIFT; in get_sdram_tim_3_shdw()
521 val = DIV_ROUND_UP(EMIF_T_PDLL_UL, 128) - 1; in get_sdram_tim_3_shdw()
533 val = EMIF_ZQCS_INTERVAL_US * 1000 / addressing->tREFI_ns; in get_zq_config_reg()
536 val = DIV_ROUND_UP(T_ZQCL_DEFAULT_NS, T_ZQCS_DEFAULT_NS) - 1; in get_zq_config_reg()
539 val = DIV_ROUND_UP(T_ZQINIT_DEFAULT_NS, T_ZQCL_DEFAULT_NS) - 1; in get_zq_config_reg()
563 if (custom_configs && (custom_configs->mask & in get_temp_alert_config()
565 interval = custom_configs->temp_alert_poll_interval_ms; in get_temp_alert_config()
570 interval /= addressing->tREFI_ns; /* Convert to refresh cycles */ in get_temp_alert_config()
574 * sdram_io_width is in 'log2(x) - 1' form. Convert emif_bus_width in get_temp_alert_config()
578 emif_bus_width = __fls(emif_bus_width) - 1; in get_temp_alert_config()
579 devcnt = emif_bus_width - sdram_io_width; in get_temp_alert_config()
582 /* DEVWDT is in 'log2(x) - 3' form */ in get_temp_alert_config()
583 alert |= (sdram_io_width - 2) << TA_DEVWDT_SHIFT; in get_temp_alert_config()
601 val = READ_IDLE_INTERVAL_DVFS / t_ck / 64 - 1; in get_read_idle_ctrl_shdw()
620 val = DLL_CALIB_INTERVAL_DVFS / t_ck / 16 - 1; in get_dll_calib_ctrl_shdw()
635 val = RL + DIV_ROUND_UP(timings->tDQSCK_max, t_ck) - 1; in get_ddr_phy_ctrl_1_attilaphy_4d()
656 * half-delay is not needed else set half-delay in get_phy_ctrl_1_intelliphy_4d5()
665 t_ck) - 1) << READ_LATENCY_SHIFT_4D5); in get_phy_ctrl_1_intelliphy_4d5()
713 struct emif_custom_configs *cust_cfgs = emif->plat_data->custom_configs; in get_pwr_mgmt_ctrl()
715 if (cust_cfgs && (cust_cfgs->mask & EMIF_CUSTOM_CONFIG_LPMODE)) { in get_pwr_mgmt_ctrl()
716 lpmode = cust_cfgs->lpmode; in get_pwr_mgmt_ctrl()
717 timeout_perf = cust_cfgs->lpmode_timeout_performance; in get_pwr_mgmt_ctrl()
718 timeout_pwr = cust_cfgs->lpmode_timeout_power; in get_pwr_mgmt_ctrl()
719 freq_threshold = cust_cfgs->lpmode_freq_threshold; in get_pwr_mgmt_ctrl()
726 * The value to be set in register is "log2(timeout) - 3" in get_pwr_mgmt_ctrl()
733 if (timeout & (timeout - 1)) in get_pwr_mgmt_ctrl()
735 timeout = __fls(timeout) - 3; in get_pwr_mgmt_ctrl()
763 pr_err("TIMEOUT Overflow - lpmode=%d perf=%d pwr=%d freq=%d\n", in get_pwr_mgmt_ctrl()
799 base = emif->base; in get_temperature_level()
807 if (emif->plat_data->device_info->cs1_used) { in get_temperature_level()
821 emif->temperature_level = temperature_level; in get_temperature_level()
830 void __iomem *base = emif->base; in setup_registers()
832 writel(regs->sdram_tim2_shdw, base + EMIF_SDRAM_TIMING_2_SHDW); in setup_registers()
833 writel(regs->phy_ctrl_1_shdw, base + EMIF_DDR_PHY_CTRL_1_SHDW); in setup_registers()
834 writel(regs->pwr_mgmt_ctrl_shdw, in setup_registers()
838 if (emif->plat_data->ip_rev != EMIF_4D5) in setup_registers()
840 writel(regs->ext_phy_ctrl_2_shdw, base + EMIF_EXT_PHY_CTRL_2_SHDW); in setup_registers()
841 writel(regs->ext_phy_ctrl_3_shdw, base + EMIF_EXT_PHY_CTRL_3_SHDW); in setup_registers()
842 writel(regs->ext_phy_ctrl_4_shdw, base + EMIF_EXT_PHY_CTRL_4_SHDW); in setup_registers()
853 void __iomem *base = emif->base; in setup_volt_sensitive_regs()
862 calib_ctrl = regs->dll_calib_ctrl_shdw_volt_ramp; in setup_volt_sensitive_regs()
864 calib_ctrl = regs->dll_calib_ctrl_shdw_normal; in setup_volt_sensitive_regs()
870 * setup_temperature_sensitive_regs() - set the timings for temperature
881 void __iomem *base = emif->base; in setup_temperature_sensitive_regs()
884 type = emif->plat_data->device_info->type; in setup_temperature_sensitive_regs()
886 tim1 = regs->sdram_tim1_shdw; in setup_temperature_sensitive_regs()
887 tim3 = regs->sdram_tim3_shdw; in setup_temperature_sensitive_regs()
888 ref_ctrl = regs->ref_ctrl_shdw; in setup_temperature_sensitive_regs()
890 /* No de-rating for non-lpddr2 devices */ in setup_temperature_sensitive_regs()
894 temperature = emif->temperature_level; in setup_temperature_sensitive_regs()
896 ref_ctrl = regs->ref_ctrl_shdw_derated; in setup_temperature_sensitive_regs()
898 tim1 = regs->sdram_tim1_shdw_derated; in setup_temperature_sensitive_regs()
899 tim3 = regs->sdram_tim3_shdw_derated; in setup_temperature_sensitive_regs()
900 ref_ctrl = regs->ref_ctrl_shdw_derated; in setup_temperature_sensitive_regs()
916 old_temp_level = emif->temperature_level; in handle_temp_alert()
919 if (unlikely(emif->temperature_level == old_temp_level)) { in handle_temp_alert()
921 } else if (!emif->curr_regs) { in handle_temp_alert()
922 dev_err(emif->dev, "temperature alert before registers are calculated, not de-rating timings\n"); in handle_temp_alert()
926 custom_configs = emif->plat_data->custom_configs; in handle_temp_alert()
932 if (custom_configs && !(custom_configs->mask & in handle_temp_alert()
934 if (emif->temperature_level >= SDRAM_TEMP_HIGH_DERATE_REFRESH) { in handle_temp_alert()
935 dev_err(emif->dev, in handle_temp_alert()
937 __func__, emif->temperature_level); in handle_temp_alert()
939 * Temperature far too high - do kernel_power_off() in handle_temp_alert()
942 emif->temperature_level = SDRAM_TEMP_VERY_HIGH_SHUTDOWN; in handle_temp_alert()
948 if (emif->temperature_level < old_temp_level || in handle_temp_alert()
949 emif->temperature_level == SDRAM_TEMP_VERY_HIGH_SHUTDOWN) { in handle_temp_alert()
951 * Temperature coming down - defer handling to thread OR in handle_temp_alert()
952 * Temperature far too high - do kernel_power_off() from in handle_temp_alert()
957 /* Temperature is going up - handle immediately */ in handle_temp_alert()
958 setup_temperature_sensitive_regs(emif, emif->curr_regs); in handle_temp_alert()
971 void __iomem *base = emif->base; in emif_interrupt_handler()
972 struct device *dev = emif->dev; in emif_interrupt_handler()
988 dev_err(dev, "Access error from SYS port - %x\n", interrupts); in emif_interrupt_handler()
990 if (emif->plat_data->hw_caps & EMIF_HW_CAPS_LL_INTERFACE) { in emif_interrupt_handler()
996 dev_err(dev, "Access error from LL port - %x\n", in emif_interrupt_handler()
1007 if (emif->temperature_level == SDRAM_TEMP_VERY_HIGH_SHUTDOWN) { in emif_threaded_isr()
1008 dev_emerg(emif->dev, "SDRAM temperature exceeds operating limit.. Needs shut down!!!\n"); in emif_threaded_isr()
1015 kernel_restart("SDRAM Over-temp Emergency restart"); in emif_threaded_isr()
1022 if (emif->curr_regs) { in emif_threaded_isr()
1023 setup_temperature_sensitive_regs(emif, emif->curr_regs); in emif_threaded_isr()
1026 dev_err(emif->dev, "temperature alert before registers are calculated, not de-rating timings\n"); in emif_threaded_isr()
1036 void __iomem *base = emif->base; in clear_all_interrupts()
1040 if (emif->plat_data->hw_caps & EMIF_HW_CAPS_LL_INTERFACE) in clear_all_interrupts()
1047 void __iomem *base = emif->base; in disable_and_clear_all_interrupts()
1052 if (emif->plat_data->hw_caps & EMIF_HW_CAPS_LL_INTERFACE) in disable_and_clear_all_interrupts()
1063 void __iomem *base = emif->base; in setup_interrupts()
1065 type = emif->plat_data->device_info->type; in setup_interrupts()
1076 if (emif->plat_data->hw_caps & EMIF_HW_CAPS_LL_INTERFACE) { in setup_interrupts()
1083 return devm_request_threaded_irq(emif->dev, irq, in setup_interrupts()
1086 0, dev_name(emif->dev), in setup_interrupts()
1094 void __iomem *base = emif->base; in emif_onetime_settings()
1098 device_info = emif->plat_data->device_info; in emif_onetime_settings()
1107 emif->plat_data->ip_rev); in emif_onetime_settings()
1108 emif->lpmode = (pwr_mgmt_ctrl & LP_MODE_MASK) >> LP_MODE_SHIFT; in emif_onetime_settings()
1112 zq = get_zq_config_reg(addressing, device_info->cs1_used, in emif_onetime_settings()
1113 device_info->cal_resistors_per_cs); in emif_onetime_settings()
1118 if (emif->temperature_level == SDRAM_TEMP_VERY_HIGH_SHUTDOWN) in emif_onetime_settings()
1119 dev_emerg(emif->dev, "SDRAM temperature exceeds operating limit.. Needs shut down!!!\n"); in emif_onetime_settings()
1123 emif->plat_data->custom_configs, device_info->cs1_used, in emif_onetime_settings()
1124 device_info->io_width, get_emif_bus_width(emif)); in emif_onetime_settings()
1131 if (emif->plat_data->phy_type != EMIF_PHY_TYPE_INTELLIPHY) in emif_onetime_settings()
1158 struct emif_platform_data *pd = emif->plat_data; in get_default_timings()
1160 pd->timings = lpddr2_jedec_timings; in get_default_timings()
1161 pd->timings_arr_size = ARRAY_SIZE(lpddr2_jedec_timings); in get_default_timings()
1163 dev_warn(emif->dev, "%s: using default timings\n", __func__); in get_default_timings()
1200 if ((cust_cfgs->mask & EMIF_CUSTOM_CONFIG_LPMODE) && in is_custom_config_valid()
1201 (cust_cfgs->lpmode != EMIF_LP_MODE_DISABLE)) in is_custom_config_valid()
1202 valid = cust_cfgs->lpmode_freq_threshold && in is_custom_config_valid()
1203 cust_cfgs->lpmode_timeout_performance && in is_custom_config_valid()
1204 cust_cfgs->lpmode_timeout_power; in is_custom_config_valid()
1206 if (cust_cfgs->mask & EMIF_CUSTOM_CONFIG_TEMP_ALERT_POLL_INTERVAL) in is_custom_config_valid()
1207 valid = valid && cust_cfgs->temp_alert_poll_interval_ms; in is_custom_config_valid()
1223 lpmode = of_get_property(np_emif, "low-power-mode", &len); in of_get_custom_configs()
1224 poll_intvl = of_get_property(np_emif, "temp-alert-poll-interval", &len); in of_get_custom_configs()
1227 cust_cfgs = devm_kzalloc(emif->dev, sizeof(*cust_cfgs), in of_get_custom_configs()
1234 cust_cfgs->mask |= EMIF_CUSTOM_CONFIG_LPMODE; in of_get_custom_configs()
1235 cust_cfgs->lpmode = be32_to_cpup(lpmode); in of_get_custom_configs()
1237 "low-power-mode-timeout-performance", in of_get_custom_configs()
1238 &cust_cfgs->lpmode_timeout_performance); in of_get_custom_configs()
1240 "low-power-mode-timeout-power", in of_get_custom_configs()
1241 &cust_cfgs->lpmode_timeout_power); in of_get_custom_configs()
1243 "low-power-mode-freq-threshold", in of_get_custom_configs()
1244 &cust_cfgs->lpmode_freq_threshold); in of_get_custom_configs()
1248 cust_cfgs->mask |= in of_get_custom_configs()
1250 cust_cfgs->temp_alert_poll_interval_ms = in of_get_custom_configs()
1254 if (of_find_property(np_emif, "extended-temp-part", &len)) in of_get_custom_configs()
1255 cust_cfgs->mask |= EMIF_CUSTOM_CONFIG_EXTENDED_TEMP_PART; in of_get_custom_configs()
1257 if (!is_custom_config_valid(cust_cfgs, emif->dev)) { in of_get_custom_configs()
1258 devm_kfree(emif->dev, cust_cfgs); in of_get_custom_configs()
1262 emif->plat_data->custom_configs = cust_cfgs; in of_get_custom_configs()
1272 if (of_find_property(np_emif, "cs1-used", &len)) in of_get_ddr_info()
1273 dev_info->cs1_used = true; in of_get_ddr_info()
1275 if (of_find_property(np_emif, "cal-resistor-per-cs", &len)) in of_get_ddr_info()
1276 dev_info->cal_resistors_per_cs = true; in of_get_ddr_info()
1278 if (of_device_is_compatible(np_ddr, "jedec,lpddr2-s4")) in of_get_ddr_info()
1279 dev_info->type = DDR_TYPE_LPDDR2_S4; in of_get_ddr_info()
1280 else if (of_device_is_compatible(np_ddr, "jedec,lpddr2-s2")) in of_get_ddr_info()
1281 dev_info->type = DDR_TYPE_LPDDR2_S2; in of_get_ddr_info()
1284 of_property_read_u32(np_ddr, "io-width", &io_width); in of_get_ddr_info()
1287 if (density & (density - 1)) in of_get_ddr_info()
1288 dev_info->density = 0; in of_get_ddr_info()
1290 dev_info->density = __fls(density) - 5; in of_get_ddr_info()
1293 if (io_width & (io_width - 1)) in of_get_ddr_info()
1294 dev_info->io_width = 0; in of_get_ddr_info()
1296 dev_info->io_width = __fls(io_width) - 1; in of_get_ddr_info()
1308 np_ddr = of_parse_phandle(np_emif, "device-handle", 0); in of_get_memory_device_details()
1321 emif->plat_data = pd; in of_get_memory_device_details()
1322 pd->device_info = dev_info; in of_get_memory_device_details()
1323 emif->dev = dev; in of_get_memory_device_details()
1324 emif->np_ddr = np_ddr; in of_get_memory_device_details()
1325 emif->temperature_level = SDRAM_TEMP_NOMINAL; in of_get_memory_device_details()
1327 if (of_device_is_compatible(np_emif, "ti,emif-4d")) in of_get_memory_device_details()
1328 emif->plat_data->ip_rev = EMIF_4D; in of_get_memory_device_details()
1329 else if (of_device_is_compatible(np_emif, "ti,emif-4d5")) in of_get_memory_device_details()
1330 emif->plat_data->ip_rev = EMIF_4D5; in of_get_memory_device_details()
1332 of_property_read_u32(np_emif, "phy-type", &pd->phy_type); in of_get_memory_device_details()
1334 if (of_find_property(np_emif, "hw-caps-ll-interface", &len)) in of_get_memory_device_details()
1335 pd->hw_caps |= EMIF_HW_CAPS_LL_INTERFACE; in of_get_memory_device_details()
1338 if (!is_dev_data_valid(pd->device_info->type, pd->device_info->density, in of_get_memory_device_details()
1339 pd->device_info->io_width, pd->phy_type, pd->ip_rev, in of_get_memory_device_details()
1340 emif->dev)) { in of_get_memory_device_details()
1350 if (emif1 && emif1->np_ddr == np_ddr) { in of_get_memory_device_details()
1351 emif->duplicate = true; in of_get_memory_device_details()
1354 dev_warn(emif->dev, "%s: Non-symmetric DDR geometry\n", in of_get_memory_device_details()
1359 emif->plat_data->timings = of_get_ddr_timings(np_ddr, emif->dev, in of_get_memory_device_details()
1360 emif->plat_data->device_info->type, in of_get_memory_device_details()
1361 &emif->plat_data->timings_arr_size); in of_get_memory_device_details()
1363 emif->plat_data->min_tck = of_get_min_tck(np_ddr, emif->dev); in of_get_memory_device_details()
1392 pd = pdev->dev.platform_data; in get_device_details()
1393 dev = &pdev->dev; in get_device_details()
1395 if (!(pd && pd->device_info && is_dev_data_valid(pd->device_info->type, in get_device_details()
1396 pd->device_info->density, pd->device_info->io_width, in get_device_details()
1397 pd->phy_type, pd->ip_rev, dev))) { in get_device_details()
1413 memcpy(dev_info, pd->device_info, sizeof(*dev_info)); in get_device_details()
1415 pd->device_info = dev_info; in get_device_details()
1416 emif->plat_data = pd; in get_device_details()
1417 emif->dev = dev; in get_device_details()
1418 emif->temperature_level = SDRAM_TEMP_NOMINAL; in get_device_details()
1426 emif->duplicate = emif1 && (memcmp(dev_info, in get_device_details()
1427 emif1->plat_data->device_info, in get_device_details()
1430 if (emif->duplicate) { in get_device_details()
1431 pd->timings = NULL; in get_device_details()
1432 pd->min_tck = NULL; in get_device_details()
1435 dev_warn(emif->dev, "%s: Non-symmetric DDR geometry\n", in get_device_details()
1440 * Copy custom configs - ignore allocation error, if any, as in get_device_details()
1443 cust_cfgs = pd->custom_configs; in get_device_details()
1451 pd->custom_configs = temp; in get_device_details()
1455 * Copy timings and min-tck values from platform data. If it is not in get_device_details()
1458 size = sizeof(struct lpddr2_timings) * pd->timings_arr_size; in get_device_details()
1459 if (pd->timings) { in get_device_details()
1462 memcpy(temp, pd->timings, size); in get_device_details()
1463 pd->timings = temp; in get_device_details()
1473 if (pd->min_tck) { in get_device_details()
1474 temp = devm_kzalloc(dev, sizeof(*pd->min_tck), GFP_KERNEL); in get_device_details()
1476 memcpy(temp, pd->min_tck, sizeof(*pd->min_tck)); in get_device_details()
1477 pd->min_tck = temp; in get_device_details()
1481 pd->min_tck = &lpddr2_jedec_min_tck; in get_device_details()
1484 pd->min_tck = &lpddr2_jedec_min_tck; in get_device_details()
1500 if (pdev->dev.of_node) in emif_probe()
1501 emif = of_get_memory_device_details(pdev->dev.of_node, &pdev->dev); in emif_probe()
1510 list_add(&emif->node, &device_list); in emif_probe()
1511 emif->addressing = get_addressing_table(emif->plat_data->device_info); in emif_probe()
1514 emif->dev = &pdev->dev; in emif_probe()
1518 emif->base = devm_ioremap_resource(emif->dev, res); in emif_probe()
1519 if (IS_ERR(emif->base)) in emif_probe()
1533 /* One-time actions taken on probing the first device */ in emif_probe()
1545 dev_info(&pdev->dev, "%s: device configured with addr = %p and IRQ%d\n", in emif_probe()
1546 __func__, emif->base, irq); in emif_probe()
1550 return -ENODEV; in emif_probe()
1581 dev = emif->dev; in get_emif_reg_values()
1586 emif_for_calc = emif->duplicate ? emif1 : emif; in get_emif_reg_values()
1588 addressing = emif_for_calc->addressing; in get_emif_reg_values()
1592 return -1; in get_emif_reg_values()
1595 device_info = emif_for_calc->plat_data->device_info; in get_emif_reg_values()
1596 type = device_info->type; in get_emif_reg_values()
1597 ip_rev = emif_for_calc->plat_data->ip_rev; in get_emif_reg_values()
1598 phy_type = emif_for_calc->plat_data->phy_type; in get_emif_reg_values()
1600 min_tck = emif_for_calc->plat_data->min_tck; in get_emif_reg_values()
1604 regs->ref_ctrl_shdw = get_sdram_ref_ctrl_shdw(freq, addressing); in get_emif_reg_values()
1605 regs->sdram_tim1_shdw = get_sdram_tim_1_shdw(timings, min_tck, in get_emif_reg_values()
1607 regs->sdram_tim2_shdw = get_sdram_tim_2_shdw(timings, min_tck, in get_emif_reg_values()
1609 regs->sdram_tim3_shdw = get_sdram_tim_3_shdw(timings, min_tck, in get_emif_reg_values()
1615 regs->phy_ctrl_1_shdw = get_ddr_phy_ctrl_1_attilaphy_4d( in get_emif_reg_values()
1618 regs->phy_ctrl_1_shdw = get_phy_ctrl_1_intelliphy_4d5(freq, cl); in get_emif_reg_values()
1619 regs->ext_phy_ctrl_2_shdw = get_ext_phy_ctrl_2_intelliphy_4d5(); in get_emif_reg_values()
1620 regs->ext_phy_ctrl_3_shdw = get_ext_phy_ctrl_3_intelliphy_4d5(); in get_emif_reg_values()
1621 regs->ext_phy_ctrl_4_shdw = get_ext_phy_ctrl_4_intelliphy_4d5(); in get_emif_reg_values()
1623 return -1; in get_emif_reg_values()
1627 regs->pwr_mgmt_ctrl_shdw = in get_emif_reg_values()
1632 regs->read_idle_ctrl_shdw_normal = in get_emif_reg_values()
1635 regs->read_idle_ctrl_shdw_volt_ramp = in get_emif_reg_values()
1638 regs->dll_calib_ctrl_shdw_normal = in get_emif_reg_values()
1641 regs->dll_calib_ctrl_shdw_volt_ramp = in get_emif_reg_values()
1646 regs->ref_ctrl_shdw_derated = get_sdram_ref_ctrl_shdw(freq / 4, in get_emif_reg_values()
1649 regs->sdram_tim1_shdw_derated = in get_emif_reg_values()
1653 regs->sdram_tim3_shdw_derated = get_sdram_tim_3_shdw(timings, in get_emif_reg_values()
1658 regs->freq = freq; in get_emif_reg_values()
1664 * get_regs() - gets the cached emif_regs structure for a given EMIF instance
1675 * directly used for thermal de-rating and voltage ramping changes.
1684 dev = emif->dev; in get_regs()
1685 if (emif->curr_regs && emif->curr_regs->freq == freq) { in get_regs()
1686 dev_dbg(dev, "%s: using curr_regs - %u Hz", __func__, freq); in get_regs()
1687 return emif->curr_regs; in get_regs()
1690 if (emif->duplicate) in get_regs()
1691 regs_cache = emif1->regs_cache; in get_regs()
1693 regs_cache = emif->regs_cache; in get_regs()
1696 if (regs_cache[i]->freq == freq) { in get_regs()
1710 regs = devm_kzalloc(emif->dev, sizeof(*regs), GFP_ATOMIC); in get_regs()
1715 devm_kfree(emif->dev, regs); in get_regs()
1720 * Now look for an un-used entry in the cache and save the in get_regs()
1722 * over-write the last entry in get_regs()
1728 dev_warn(dev, "%s: regs_cache full - reusing a slot!!\n", in get_regs()
1730 i = EMIF_MAX_NUM_FREQUENCIES - 1; in get_regs()
1731 devm_kfree(emif->dev, regs_cache[i]); in get_regs()
1741 dev_dbg(emif->dev, "%s: voltage notification : %d", __func__, in do_volt_notify_handling()
1744 if (!emif->curr_regs) { in do_volt_notify_handling()
1745 dev_err(emif->dev, in do_volt_notify_handling()
1746 "%s: volt-notify before registers are ready: %d\n", in do_volt_notify_handling()
1751 setup_volt_sensitive_regs(emif, emif->curr_regs, volt_state); in do_volt_notify_handling()
1757 * is available in mainline kernel. This function is un-used
1781 emif->curr_regs = regs; in do_freq_pre_notify_handling()
1785 * Temperature and voltage-ramp sensitive settings are also configured in do_freq_pre_notify_handling()
1789 dev_dbg(emif->dev, "%s: setting up shadow registers for %uHz", in do_freq_pre_notify_handling()
1799 if (emif->lpmode == EMIF_LP_MODE_SELF_REFRESH) in do_freq_pre_notify_handling()
1806 * available in mainline kernel. This function is un-used
1814 * NOTE: we are taking the spin-lock here and releases it in freq_pre_notify_handling()
1815 * only in post-notifier. This doesn't look good and in freq_pre_notify_handling()
1817 * un-avoidable. We need to lock a sequence of events in freq_pre_notify_handling()
1821 * frequency pre-notify callback from clock framework in freq_pre_notify_handling()
1823 * 3. clock framework initiates a hw-sequence that updates in freq_pre_notify_handling()
1827 * vis-a-vis similar sequence in the EMIF interrupt handler in freq_pre_notify_handling()
1844 if (emif->lpmode == EMIF_LP_MODE_SELF_REFRESH) in do_freq_post_notify_handling()
1851 * available in mainline kernel. This function is un-used
1862 * Lock is done in pre-notify handler. See freq_pre_notify_handling() in freq_post_notify_handling()
1870 { .compatible = "ti,emif-4d" },
1871 { .compatible = "ti,emif-4d5" },