31 #define IRQ_TYPE_LEGACY				0
35 #define PCI_ENDPOINT_TEST_MAGIC			0x0
37 #define PCI_ENDPOINT_TEST_COMMAND		0x4
38 #define COMMAND_RAISE_LEGACY_IRQ		BIT(0)
45 #define PCI_ENDPOINT_TEST_STATUS		0x8
46 #define STATUS_READ_SUCCESS			BIT(0)
56 #define PCI_ENDPOINT_TEST_LOWER_SRC_ADDR	0x0c
57 #define PCI_ENDPOINT_TEST_UPPER_SRC_ADDR	0x10
59 #define PCI_ENDPOINT_TEST_LOWER_DST_ADDR	0x14
60 #define PCI_ENDPOINT_TEST_UPPER_DST_ADDR	0x18
62 #define PCI_ENDPOINT_TEST_SIZE			0x1c
63 #define PCI_ENDPOINT_TEST_CHECKSUM		0x20
65 #define PCI_ENDPOINT_TEST_IRQ_TYPE		0x24
66 #define PCI_ENDPOINT_TEST_IRQ_NUMBER		0x28
68 #define PCI_ENDPOINT_TEST_FLAGS			0x2c
69 #define FLAG_USE_DMA				BIT(0)
71 #define PCI_DEVICE_ID_TI_J721E			0xb00d
72 #define PCI_DEVICE_ID_TI_AM654			0xb00c
73 #define PCI_DEVICE_ID_TI_J7200			0xb00f
74 #define PCI_DEVICE_ID_TI_AM64			0xb010
75 #define PCI_DEVICE_ID_TI_J721S2		0xb013
76 #define PCI_DEVICE_ID_LS1088A			0x80c0
81 #define PCI_DEVICE_ID_RENESAS_R8A774A1		0x0028
82 #define PCI_DEVICE_ID_RENESAS_R8A774B1		0x002b
83 #define PCI_DEVICE_ID_RENESAS_R8A774C0		0x002d
84 #define PCI_DEVICE_ID_RENESAS_R8A774E1		0x0025
85 #define PCI_DEVICE_ID_RENESAS_R8A779F0		0x0031
98 MODULE_PARM_DESC(irq_type, "IRQ mode selection in pci_endpoint_test (0 - Legacy, 1 - MSI, 2 - MSI-X…
191 		if (irq < 0)  in pci_endpoint_test_alloc_irq_vectors()
196 		if (irq < 0)  in pci_endpoint_test_alloc_irq_vectors()
201 		if (irq < 0)  in pci_endpoint_test_alloc_irq_vectors()
208 	if (irq < 0) {  in pci_endpoint_test_alloc_irq_vectors()
209 		irq = 0;  in pci_endpoint_test_alloc_irq_vectors()
225 	for (i = 0; i < test->num_irqs; i++)  in pci_endpoint_test_release_irq()
228 	test->num_irqs = 0;  in pci_endpoint_test_release_irq()
238 	for (i = 0; i < test->num_irqs; i++) {  in pci_endpoint_test_request_irq()
283 		size = 0x4;  in pci_endpoint_test_bar()
285 	for (j = 0; j < size; j += 4)  in pci_endpoint_test_bar()
286 		pci_endpoint_test_bar_writel(test, barno, j, 0xA0A0A0A0);  in pci_endpoint_test_bar()
288 	for (j = 0; j < size; j += 4) {  in pci_endpoint_test_bar()
290 		if (val != 0xA0A0A0A0)  in pci_endpoint_test_bar()
303 	pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, 0);  in pci_endpoint_test_legacy_irq()
351 	return 0;  in pci_endpoint_test_validate_xfer_params()
361 	u32 flags = 0;  in pci_endpoint_test_copy()
431 	src_crc32 = crc32_le(~0, src_addr, size);  in pci_endpoint_test_copy()
476 	dst_crc32 = crc32_le(~0, dst_addr, size);  in pci_endpoint_test_copy()
499 	u32 flags = 0;  in pci_endpoint_test_write()
516 	if (err != 0) {  in pci_endpoint_test_write()
562 	crc32 = crc32_le(~0, addr, size);  in pci_endpoint_test_write()
600 	u32 flags = 0;  in pci_endpoint_test_read()
678 	crc32 = crc32_le(~0, addr, size);  in pci_endpoint_test_read()
741 		if (bar < 0 || bar > 5)  in pci_endpoint_test_ioctl()
805 	test->test_reg_bar = 0;  in pci_endpoint_test_probe()
806 	test->alignment = 0;  in pci_endpoint_test_probe()
824 	if ((dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48)) != 0) &&  in pci_endpoint_test_probe()
825 	    dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)) != 0) {  in pci_endpoint_test_probe()
849 	for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {  in pci_endpoint_test_probe()
870 	id = ida_simple_get(&pci_endpoint_test_ida, 0, 0, GFP_KERNEL);  in pci_endpoint_test_probe()
871 	if (id < 0) {  in pci_endpoint_test_probe()
904 	return 0;  in pci_endpoint_test_probe()
919 	for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {  in pci_endpoint_test_probe()
943 	if (id < 0)  in pci_endpoint_test_remove()
953 	for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {  in pci_endpoint_test_remove()
986 	{ PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, 0x81c0),