Lines Matching full:host
29 #include <linux/mmc/host.h>
116 spin_lock_bh(&slot->host->lock); in dw_mci_req_show()
142 spin_unlock_bh(&slot->host->lock); in dw_mci_req_show()
150 struct dw_mci *host = s->private; in dw_mci_regs_show() local
152 pm_runtime_get_sync(host->dev); in dw_mci_regs_show()
154 seq_printf(s, "STATUS:\t0x%08x\n", mci_readl(host, STATUS)); in dw_mci_regs_show()
155 seq_printf(s, "RINTSTS:\t0x%08x\n", mci_readl(host, RINTSTS)); in dw_mci_regs_show()
156 seq_printf(s, "CMD:\t0x%08x\n", mci_readl(host, CMD)); in dw_mci_regs_show()
157 seq_printf(s, "CTRL:\t0x%08x\n", mci_readl(host, CTRL)); in dw_mci_regs_show()
158 seq_printf(s, "INTMASK:\t0x%08x\n", mci_readl(host, INTMASK)); in dw_mci_regs_show()
159 seq_printf(s, "CLKENA:\t0x%08x\n", mci_readl(host, CLKENA)); in dw_mci_regs_show()
161 pm_runtime_put_autosuspend(host->dev); in dw_mci_regs_show()
170 struct dw_mci *host = slot->host; in dw_mci_init_debugfs() local
177 debugfs_create_file("regs", S_IRUSR, root, host, &dw_mci_regs_fops); in dw_mci_init_debugfs()
179 debugfs_create_u32("state", S_IRUSR, root, &host->state); in dw_mci_init_debugfs()
181 &host->pending_events); in dw_mci_init_debugfs()
183 &host->completed_events); in dw_mci_init_debugfs()
187 static bool dw_mci_ctrl_reset(struct dw_mci *host, u32 reset) in dw_mci_ctrl_reset() argument
191 ctrl = mci_readl(host, CTRL); in dw_mci_ctrl_reset()
193 mci_writel(host, CTRL, ctrl); in dw_mci_ctrl_reset()
196 if (readl_poll_timeout_atomic(host->regs + SDMMC_CTRL, ctrl, in dw_mci_ctrl_reset()
199 dev_err(host->dev, in dw_mci_ctrl_reset()
208 static void dw_mci_wait_while_busy(struct dw_mci *host, u32 cmd_flags) in dw_mci_wait_while_busy() argument
222 if (readl_poll_timeout_atomic(host->regs + SDMMC_STATUS, in dw_mci_wait_while_busy()
226 dev_err(host->dev, "Busy; trying anyway\n"); in dw_mci_wait_while_busy()
232 struct dw_mci *host = slot->host; in mci_send_cmd() local
235 mci_writel(host, CMDARG, arg); in mci_send_cmd()
237 dw_mci_wait_while_busy(host, cmd); in mci_send_cmd()
238 mci_writel(host, CMD, SDMMC_CMD_START | cmd); in mci_send_cmd()
240 if (readl_poll_timeout_atomic(host->regs + SDMMC_CMD, cmd_status, in mci_send_cmd()
251 struct dw_mci *host = slot->host; in dw_mci_prepare_command() local
273 WARN_ON(slot->host->state != STATE_SENDING_CMD); in dw_mci_prepare_command()
274 slot->host->state = STATE_SENDING_CMD11; in dw_mci_prepare_command()
287 clk_en_a = mci_readl(host, CLKENA); in dw_mci_prepare_command()
289 mci_writel(host, CLKENA, clk_en_a); in dw_mci_prepare_command()
316 static u32 dw_mci_prep_stop_abort(struct dw_mci *host, struct mmc_command *cmd) in dw_mci_prep_stop_abort() argument
324 stop = &host->stop_abort; in dw_mci_prep_stop_abort()
349 if (!test_bit(DW_MMC_CARD_NO_USE_HOLD, &host->slot->flags)) in dw_mci_prep_stop_abort()
355 static inline void dw_mci_set_cto(struct dw_mci *host) in dw_mci_set_cto() argument
362 cto_clks = mci_readl(host, TMOUT) & 0xff; in dw_mci_set_cto()
363 cto_div = (mci_readl(host, CLKDIV) & 0xff) * 2; in dw_mci_set_cto()
368 host->bus_hz); in dw_mci_set_cto()
386 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_set_cto()
387 if (!test_bit(EVENT_CMD_COMPLETE, &host->pending_events)) in dw_mci_set_cto()
388 mod_timer(&host->cto_timer, in dw_mci_set_cto()
390 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_set_cto()
393 static void dw_mci_start_command(struct dw_mci *host, in dw_mci_start_command() argument
396 host->cmd = cmd; in dw_mci_start_command()
397 dev_vdbg(host->dev, in dw_mci_start_command()
401 mci_writel(host, CMDARG, cmd->arg); in dw_mci_start_command()
403 dw_mci_wait_while_busy(host, cmd_flags); in dw_mci_start_command()
405 mci_writel(host, CMD, cmd_flags | SDMMC_CMD_START); in dw_mci_start_command()
409 dw_mci_set_cto(host); in dw_mci_start_command()
412 static inline void send_stop_abort(struct dw_mci *host, struct mmc_data *data) in send_stop_abort() argument
414 struct mmc_command *stop = &host->stop_abort; in send_stop_abort()
416 dw_mci_start_command(host, stop, host->stop_cmdr); in send_stop_abort()
420 static void dw_mci_stop_dma(struct dw_mci *host) in dw_mci_stop_dma() argument
422 if (host->using_dma) { in dw_mci_stop_dma()
423 host->dma_ops->stop(host); in dw_mci_stop_dma()
424 host->dma_ops->cleanup(host); in dw_mci_stop_dma()
428 set_bit(EVENT_XFER_COMPLETE, &host->pending_events); in dw_mci_stop_dma()
431 static void dw_mci_dma_cleanup(struct dw_mci *host) in dw_mci_dma_cleanup() argument
433 struct mmc_data *data = host->data; in dw_mci_dma_cleanup()
436 dma_unmap_sg(host->dev, in dw_mci_dma_cleanup()
444 static void dw_mci_idmac_reset(struct dw_mci *host) in dw_mci_idmac_reset() argument
446 u32 bmod = mci_readl(host, BMOD); in dw_mci_idmac_reset()
449 mci_writel(host, BMOD, bmod); in dw_mci_idmac_reset()
452 static void dw_mci_idmac_stop_dma(struct dw_mci *host) in dw_mci_idmac_stop_dma() argument
457 temp = mci_readl(host, CTRL); in dw_mci_idmac_stop_dma()
460 mci_writel(host, CTRL, temp); in dw_mci_idmac_stop_dma()
463 temp = mci_readl(host, BMOD); in dw_mci_idmac_stop_dma()
466 mci_writel(host, BMOD, temp); in dw_mci_idmac_stop_dma()
471 struct dw_mci *host = arg; in dw_mci_dmac_complete_dma() local
472 struct mmc_data *data = host->data; in dw_mci_dmac_complete_dma()
474 dev_vdbg(host->dev, "DMA complete\n"); in dw_mci_dmac_complete_dma()
476 if ((host->use_dma == TRANS_MODE_EDMAC) && in dw_mci_dmac_complete_dma()
479 dma_sync_sg_for_cpu(mmc_dev(host->slot->mmc), in dw_mci_dmac_complete_dma()
484 host->dma_ops->cleanup(host); in dw_mci_dmac_complete_dma()
491 set_bit(EVENT_XFER_COMPLETE, &host->pending_events); in dw_mci_dmac_complete_dma()
492 tasklet_schedule(&host->tasklet); in dw_mci_dmac_complete_dma()
496 static int dw_mci_idmac_init(struct dw_mci *host) in dw_mci_idmac_init() argument
500 if (host->dma_64bit_address == 1) { in dw_mci_idmac_init()
503 host->ring_size = in dw_mci_idmac_init()
507 for (i = 0, p = host->sg_cpu; i < host->ring_size - 1; in dw_mci_idmac_init()
509 p->des6 = (host->sg_dma + in dw_mci_idmac_init()
513 p->des7 = (u64)(host->sg_dma + in dw_mci_idmac_init()
524 p->des6 = host->sg_dma & 0xffffffff; in dw_mci_idmac_init()
525 p->des7 = (u64)host->sg_dma >> 32; in dw_mci_idmac_init()
531 host->ring_size = in dw_mci_idmac_init()
535 for (i = 0, p = host->sg_cpu; in dw_mci_idmac_init()
536 i < host->ring_size - 1; in dw_mci_idmac_init()
538 p->des3 = cpu_to_le32(host->sg_dma + in dw_mci_idmac_init()
545 p->des3 = cpu_to_le32(host->sg_dma); in dw_mci_idmac_init()
549 dw_mci_idmac_reset(host); in dw_mci_idmac_init()
551 if (host->dma_64bit_address == 1) { in dw_mci_idmac_init()
553 mci_writel(host, IDSTS64, IDMAC_INT_CLR); in dw_mci_idmac_init()
554 mci_writel(host, IDINTEN64, SDMMC_IDMAC_INT_NI | in dw_mci_idmac_init()
558 mci_writel(host, DBADDRL, host->sg_dma & 0xffffffff); in dw_mci_idmac_init()
559 mci_writel(host, DBADDRU, (u64)host->sg_dma >> 32); in dw_mci_idmac_init()
563 mci_writel(host, IDSTS, IDMAC_INT_CLR); in dw_mci_idmac_init()
564 mci_writel(host, IDINTEN, SDMMC_IDMAC_INT_NI | in dw_mci_idmac_init()
568 mci_writel(host, DBADDR, host->sg_dma); in dw_mci_idmac_init()
574 static inline int dw_mci_prepare_desc64(struct dw_mci *host, in dw_mci_prepare_desc64() argument
583 desc_first = desc_last = desc = host->sg_cpu; in dw_mci_prepare_desc64()
639 dev_dbg(host->dev, "descriptor is still owned by IDMAC.\n"); in dw_mci_prepare_desc64()
640 memset(host->sg_cpu, 0, DESC_RING_BUF_SZ); in dw_mci_prepare_desc64()
641 dw_mci_idmac_init(host); in dw_mci_prepare_desc64()
646 static inline int dw_mci_prepare_desc32(struct dw_mci *host, in dw_mci_prepare_desc32() argument
655 desc_first = desc_last = desc = host->sg_cpu; in dw_mci_prepare_desc32()
713 dev_dbg(host->dev, "descriptor is still owned by IDMAC.\n"); in dw_mci_prepare_desc32()
714 memset(host->sg_cpu, 0, DESC_RING_BUF_SZ); in dw_mci_prepare_desc32()
715 dw_mci_idmac_init(host); in dw_mci_prepare_desc32()
719 static int dw_mci_idmac_start_dma(struct dw_mci *host, unsigned int sg_len) in dw_mci_idmac_start_dma() argument
724 if (host->dma_64bit_address == 1) in dw_mci_idmac_start_dma()
725 ret = dw_mci_prepare_desc64(host, host->data, sg_len); in dw_mci_idmac_start_dma()
727 ret = dw_mci_prepare_desc32(host, host->data, sg_len); in dw_mci_idmac_start_dma()
736 dw_mci_ctrl_reset(host, SDMMC_CTRL_DMA_RESET); in dw_mci_idmac_start_dma()
737 dw_mci_idmac_reset(host); in dw_mci_idmac_start_dma()
740 temp = mci_readl(host, CTRL); in dw_mci_idmac_start_dma()
742 mci_writel(host, CTRL, temp); in dw_mci_idmac_start_dma()
748 temp = mci_readl(host, BMOD); in dw_mci_idmac_start_dma()
750 mci_writel(host, BMOD, temp); in dw_mci_idmac_start_dma()
753 mci_writel(host, PLDMND, 1); in dw_mci_idmac_start_dma()
767 static void dw_mci_edmac_stop_dma(struct dw_mci *host) in dw_mci_edmac_stop_dma() argument
769 dmaengine_terminate_async(host->dms->ch); in dw_mci_edmac_stop_dma()
772 static int dw_mci_edmac_start_dma(struct dw_mci *host, in dw_mci_edmac_start_dma() argument
777 struct scatterlist *sgl = host->data->sg; in dw_mci_edmac_start_dma()
779 u32 sg_elems = host->data->sg_len; in dw_mci_edmac_start_dma()
781 u32 fifo_offset = host->fifo_reg - host->regs; in dw_mci_edmac_start_dma()
786 cfg.dst_addr = host->phy_regs + fifo_offset; in dw_mci_edmac_start_dma()
792 fifoth_val = mci_readl(host, FIFOTH); in dw_mci_edmac_start_dma()
796 if (host->data->flags & MMC_DATA_WRITE) in dw_mci_edmac_start_dma()
801 ret = dmaengine_slave_config(host->dms->ch, &cfg); in dw_mci_edmac_start_dma()
803 dev_err(host->dev, "Failed to config edmac.\n"); in dw_mci_edmac_start_dma()
807 desc = dmaengine_prep_slave_sg(host->dms->ch, sgl, in dw_mci_edmac_start_dma()
811 dev_err(host->dev, "Can't prepare slave sg.\n"); in dw_mci_edmac_start_dma()
817 desc->callback_param = (void *)host; in dw_mci_edmac_start_dma()
821 if (host->data->flags & MMC_DATA_WRITE) in dw_mci_edmac_start_dma()
822 dma_sync_sg_for_device(mmc_dev(host->slot->mmc), sgl, in dw_mci_edmac_start_dma()
825 dma_async_issue_pending(host->dms->ch); in dw_mci_edmac_start_dma()
830 static int dw_mci_edmac_init(struct dw_mci *host) in dw_mci_edmac_init() argument
833 host->dms = kzalloc(sizeof(struct dw_mci_dma_slave), GFP_KERNEL); in dw_mci_edmac_init()
834 if (!host->dms) in dw_mci_edmac_init()
837 host->dms->ch = dma_request_chan(host->dev, "rx-tx"); in dw_mci_edmac_init()
838 if (IS_ERR(host->dms->ch)) { in dw_mci_edmac_init()
839 int ret = PTR_ERR(host->dms->ch); in dw_mci_edmac_init()
841 dev_err(host->dev, "Failed to get external DMA channel.\n"); in dw_mci_edmac_init()
842 kfree(host->dms); in dw_mci_edmac_init()
843 host->dms = NULL; in dw_mci_edmac_init()
850 static void dw_mci_edmac_exit(struct dw_mci *host) in dw_mci_edmac_exit() argument
852 if (host->dms) { in dw_mci_edmac_exit()
853 if (host->dms->ch) { in dw_mci_edmac_exit()
854 dma_release_channel(host->dms->ch); in dw_mci_edmac_exit()
855 host->dms->ch = NULL; in dw_mci_edmac_exit()
857 kfree(host->dms); in dw_mci_edmac_exit()
858 host->dms = NULL; in dw_mci_edmac_exit()
871 static int dw_mci_pre_dma_transfer(struct dw_mci *host, in dw_mci_pre_dma_transfer() argument
897 sg_len = dma_map_sg(host->dev, in dw_mci_pre_dma_transfer()
915 if (!slot->host->use_dma || !data) in dw_mci_pre_req()
921 if (dw_mci_pre_dma_transfer(slot->host, mrq->data, in dw_mci_pre_req()
933 if (!slot->host->use_dma || !data) in dw_mci_post_req()
937 dma_unmap_sg(slot->host->dev, in dw_mci_post_req()
948 struct dw_mci *host = slot->host; in dw_mci_get_cd() local
971 present = (mci_readl(slot->host, CDETECT) & (1 << slot->id)) in dw_mci_get_cd()
974 spin_lock_bh(&host->lock); in dw_mci_get_cd()
980 spin_unlock_bh(&host->lock); in dw_mci_get_cd()
985 static void dw_mci_adjust_fifoth(struct dw_mci *host, struct mmc_data *data) in dw_mci_adjust_fifoth() argument
989 u32 fifo_width = 1 << host->data_shift; in dw_mci_adjust_fifoth()
995 if (!host->use_dma) in dw_mci_adjust_fifoth()
998 tx_wmark = (host->fifo_depth) / 2; in dw_mci_adjust_fifoth()
999 tx_wmark_invers = host->fifo_depth - tx_wmark; in dw_mci_adjust_fifoth()
1022 mci_writel(host, FIFOTH, fifoth_val); in dw_mci_adjust_fifoth()
1025 static void dw_mci_ctrl_thld(struct dw_mci *host, struct mmc_data *data) in dw_mci_ctrl_thld() argument
1036 if (host->verid < DW_MMC_240A || in dw_mci_ctrl_thld()
1037 (host->verid < DW_MMC_280A && data->flags & MMC_DATA_WRITE)) in dw_mci_ctrl_thld()
1045 host->timing != MMC_TIMING_MMC_HS400) in dw_mci_ctrl_thld()
1053 if (host->timing != MMC_TIMING_MMC_HS200 && in dw_mci_ctrl_thld()
1054 host->timing != MMC_TIMING_UHS_SDR104 && in dw_mci_ctrl_thld()
1055 host->timing != MMC_TIMING_MMC_HS400) in dw_mci_ctrl_thld()
1058 blksz_depth = blksz / (1 << host->data_shift); in dw_mci_ctrl_thld()
1059 fifo_depth = host->fifo_depth; in dw_mci_ctrl_thld()
1070 mci_writel(host, CDTHRCTL, SDMMC_SET_THLD(thld_size, enable)); in dw_mci_ctrl_thld()
1074 mci_writel(host, CDTHRCTL, 0); in dw_mci_ctrl_thld()
1077 static int dw_mci_submit_data_dma(struct dw_mci *host, struct mmc_data *data) in dw_mci_submit_data_dma() argument
1083 host->using_dma = 0; in dw_mci_submit_data_dma()
1086 if (!host->use_dma) in dw_mci_submit_data_dma()
1089 sg_len = dw_mci_pre_dma_transfer(host, data, COOKIE_MAPPED); in dw_mci_submit_data_dma()
1091 host->dma_ops->stop(host); in dw_mci_submit_data_dma()
1095 host->using_dma = 1; in dw_mci_submit_data_dma()
1097 if (host->use_dma == TRANS_MODE_IDMAC) in dw_mci_submit_data_dma()
1098 dev_vdbg(host->dev, in dw_mci_submit_data_dma()
1100 (unsigned long)host->sg_cpu, in dw_mci_submit_data_dma()
1101 (unsigned long)host->sg_dma, in dw_mci_submit_data_dma()
1109 if (host->prev_blksz != data->blksz) in dw_mci_submit_data_dma()
1110 dw_mci_adjust_fifoth(host, data); in dw_mci_submit_data_dma()
1113 temp = mci_readl(host, CTRL); in dw_mci_submit_data_dma()
1115 mci_writel(host, CTRL, temp); in dw_mci_submit_data_dma()
1118 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_submit_data_dma()
1119 temp = mci_readl(host, INTMASK); in dw_mci_submit_data_dma()
1121 mci_writel(host, INTMASK, temp); in dw_mci_submit_data_dma()
1122 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_submit_data_dma()
1124 if (host->dma_ops->start(host, sg_len)) { in dw_mci_submit_data_dma()
1125 host->dma_ops->stop(host); in dw_mci_submit_data_dma()
1127 dev_dbg(host->dev, in dw_mci_submit_data_dma()
1136 static void dw_mci_submit_data(struct dw_mci *host, struct mmc_data *data) in dw_mci_submit_data() argument
1144 WARN_ON(host->data); in dw_mci_submit_data()
1145 host->sg = NULL; in dw_mci_submit_data()
1146 host->data = data; in dw_mci_submit_data()
1149 host->dir_status = DW_MCI_RECV_STATUS; in dw_mci_submit_data()
1151 host->dir_status = DW_MCI_SEND_STATUS; in dw_mci_submit_data()
1153 dw_mci_ctrl_thld(host, data); in dw_mci_submit_data()
1155 if (dw_mci_submit_data_dma(host, data)) { in dw_mci_submit_data()
1156 if (host->data->flags & MMC_DATA_READ) in dw_mci_submit_data()
1161 sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); in dw_mci_submit_data()
1162 host->sg = data->sg; in dw_mci_submit_data()
1163 host->part_buf_start = 0; in dw_mci_submit_data()
1164 host->part_buf_count = 0; in dw_mci_submit_data()
1166 mci_writel(host, RINTSTS, SDMMC_INT_TXDR | SDMMC_INT_RXDR); in dw_mci_submit_data()
1168 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_submit_data()
1169 temp = mci_readl(host, INTMASK); in dw_mci_submit_data()
1171 mci_writel(host, INTMASK, temp); in dw_mci_submit_data()
1172 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_submit_data()
1174 temp = mci_readl(host, CTRL); in dw_mci_submit_data()
1176 mci_writel(host, CTRL, temp); in dw_mci_submit_data()
1184 if (host->wm_aligned) in dw_mci_submit_data()
1185 dw_mci_adjust_fifoth(host, data); in dw_mci_submit_data()
1187 mci_writel(host, FIFOTH, host->fifoth_val); in dw_mci_submit_data()
1188 host->prev_blksz = 0; in dw_mci_submit_data()
1195 host->prev_blksz = data->blksz; in dw_mci_submit_data()
1201 struct dw_mci *host = slot->host; in dw_mci_setup_bus() local
1208 if (host->state == STATE_WAITING_CMD11_DONE) in dw_mci_setup_bus()
1214 mci_writel(host, CLKENA, 0); in dw_mci_setup_bus()
1216 } else if (clock != host->current_speed || force_clkinit) { in dw_mci_setup_bus()
1217 div = host->bus_hz / clock; in dw_mci_setup_bus()
1218 if (host->bus_hz % clock && host->bus_hz > clock) in dw_mci_setup_bus()
1225 div = (host->bus_hz != clock) ? DIV_ROUND_UP(div, 2) : 0; in dw_mci_setup_bus()
1234 slot->id, host->bus_hz, clock, in dw_mci_setup_bus()
1235 div ? ((host->bus_hz / div) >> 1) : in dw_mci_setup_bus()
1236 host->bus_hz, div); in dw_mci_setup_bus()
1248 mci_writel(host, CLKENA, 0); in dw_mci_setup_bus()
1249 mci_writel(host, CLKSRC, 0); in dw_mci_setup_bus()
1255 mci_writel(host, CLKDIV, div); in dw_mci_setup_bus()
1264 mci_writel(host, CLKENA, clk_en_a); in dw_mci_setup_bus()
1271 slot->mmc->actual_clock = div ? ((host->bus_hz / div) >> 1) : in dw_mci_setup_bus()
1272 host->bus_hz; in dw_mci_setup_bus()
1275 host->current_speed = clock; in dw_mci_setup_bus()
1278 mci_writel(host, CTYPE, (slot->ctype << slot->id)); in dw_mci_setup_bus()
1281 static void __dw_mci_start_request(struct dw_mci *host, in __dw_mci_start_request() argument
1291 host->mrq = mrq; in __dw_mci_start_request()
1293 host->pending_events = 0; in __dw_mci_start_request()
1294 host->completed_events = 0; in __dw_mci_start_request()
1295 host->cmd_status = 0; in __dw_mci_start_request()
1296 host->data_status = 0; in __dw_mci_start_request()
1297 host->dir_status = 0; in __dw_mci_start_request()
1301 mci_writel(host, TMOUT, 0xFFFFFFFF); in __dw_mci_start_request()
1302 mci_writel(host, BYTCNT, data->blksz*data->blocks); in __dw_mci_start_request()
1303 mci_writel(host, BLKSIZ, data->blksz); in __dw_mci_start_request()
1313 dw_mci_submit_data(host, data); in __dw_mci_start_request()
1317 dw_mci_start_command(host, cmd, cmdflags); in __dw_mci_start_request()
1332 spin_lock_irqsave(&host->irq_lock, irqflags); in __dw_mci_start_request()
1333 if (!test_bit(EVENT_CMD_COMPLETE, &host->pending_events)) in __dw_mci_start_request()
1334 mod_timer(&host->cmd11_timer, in __dw_mci_start_request()
1336 spin_unlock_irqrestore(&host->irq_lock, irqflags); in __dw_mci_start_request()
1339 host->stop_cmdr = dw_mci_prep_stop_abort(host, cmd); in __dw_mci_start_request()
1342 static void dw_mci_start_request(struct dw_mci *host, in dw_mci_start_request() argument
1349 __dw_mci_start_request(host, slot, cmd); in dw_mci_start_request()
1352 /* must be called with host->lock held */
1353 static void dw_mci_queue_request(struct dw_mci *host, struct dw_mci_slot *slot, in dw_mci_queue_request() argument
1357 host->state); in dw_mci_queue_request()
1361 if (host->state == STATE_WAITING_CMD11_DONE) { in dw_mci_queue_request()
1369 host->state = STATE_IDLE; in dw_mci_queue_request()
1372 if (host->state == STATE_IDLE) { in dw_mci_queue_request()
1373 host->state = STATE_SENDING_CMD; in dw_mci_queue_request()
1374 dw_mci_start_request(host, slot); in dw_mci_queue_request()
1376 list_add_tail(&slot->queue_node, &host->queue); in dw_mci_queue_request()
1383 struct dw_mci *host = slot->host; in dw_mci_request() local
1399 spin_lock_bh(&host->lock); in dw_mci_request()
1401 dw_mci_queue_request(host, slot, mrq); in dw_mci_request()
1403 spin_unlock_bh(&host->lock); in dw_mci_request()
1409 const struct dw_mci_drv_data *drv_data = slot->host->drv_data; in dw_mci_set_ios()
1425 regs = mci_readl(slot->host, UHS_REG); in dw_mci_set_ios()
1435 mci_writel(slot->host, UHS_REG, regs); in dw_mci_set_ios()
1436 slot->host->timing = ios->timing; in dw_mci_set_ios()
1445 drv_data->set_ios(slot->host, ios); in dw_mci_set_ios()
1453 dev_err(slot->host->dev, in dw_mci_set_ios()
1460 regs = mci_readl(slot->host, PWREN); in dw_mci_set_ios()
1462 mci_writel(slot->host, PWREN, regs); in dw_mci_set_ios()
1465 if (!slot->host->vqmmc_enabled) { in dw_mci_set_ios()
1469 dev_err(slot->host->dev, in dw_mci_set_ios()
1472 slot->host->vqmmc_enabled = true; in dw_mci_set_ios()
1476 slot->host->vqmmc_enabled = true; in dw_mci_set_ios()
1480 dw_mci_ctrl_reset(slot->host, in dw_mci_set_ios()
1495 if (!IS_ERR(mmc->supply.vqmmc) && slot->host->vqmmc_enabled) in dw_mci_set_ios()
1497 slot->host->vqmmc_enabled = false; in dw_mci_set_ios()
1499 regs = mci_readl(slot->host, PWREN); in dw_mci_set_ios()
1501 mci_writel(slot->host, PWREN, regs); in dw_mci_set_ios()
1507 if (slot->host->state == STATE_WAITING_CMD11_DONE && ios->clock != 0) in dw_mci_set_ios()
1508 slot->host->state = STATE_IDLE; in dw_mci_set_ios()
1520 status = mci_readl(slot->host, STATUS); in dw_mci_card_busy()
1528 struct dw_mci *host = slot->host; in dw_mci_switch_voltage() local
1529 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_switch_voltage()
1542 uhs = mci_readl(host, UHS_REG); in dw_mci_switch_voltage()
1557 mci_writel(host, UHS_REG, uhs); in dw_mci_switch_voltage()
1573 mci_readl(slot->host, WRTPRT) & (1 << slot->id) ? 1 : 0; in dw_mci_get_ro()
1584 struct dw_mci *host = slot->host; in dw_mci_hw_reset() local
1587 if (host->use_dma == TRANS_MODE_IDMAC) in dw_mci_hw_reset()
1588 dw_mci_idmac_reset(host); in dw_mci_hw_reset()
1590 if (!dw_mci_ctrl_reset(host, SDMMC_CTRL_DMA_RESET | in dw_mci_hw_reset()
1600 reset = mci_readl(host, RST_N); in dw_mci_hw_reset()
1602 mci_writel(host, RST_N, reset); in dw_mci_hw_reset()
1605 mci_writel(host, RST_N, reset); in dw_mci_hw_reset()
1612 struct dw_mci *host = slot->host; in dw_mci_init_card() local
1624 clk_en_a_old = mci_readl(host, CLKENA); in dw_mci_init_card()
1636 mci_writel(host, CLKENA, clk_en_a); in dw_mci_init_card()
1645 struct dw_mci *host = slot->host; in __dw_mci_enable_sdio_irq() local
1649 spin_lock_irqsave(&host->irq_lock, irqflags); in __dw_mci_enable_sdio_irq()
1652 int_mask = mci_readl(host, INTMASK); in __dw_mci_enable_sdio_irq()
1657 mci_writel(host, INTMASK, int_mask); in __dw_mci_enable_sdio_irq()
1659 spin_unlock_irqrestore(&host->irq_lock, irqflags); in __dw_mci_enable_sdio_irq()
1665 struct dw_mci *host = slot->host; in dw_mci_enable_sdio_irq() local
1671 pm_runtime_get_noresume(host->dev); in dw_mci_enable_sdio_irq()
1673 pm_runtime_put_noidle(host->dev); in dw_mci_enable_sdio_irq()
1686 struct dw_mci *host = slot->host; in dw_mci_execute_tuning() local
1687 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_execute_tuning()
1699 struct dw_mci *host = slot->host; in dw_mci_prepare_hs400_tuning() local
1700 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_prepare_hs400_tuning()
1703 return drv_data->prepare_hs400_tuning(host, ios); in dw_mci_prepare_hs400_tuning()
1708 static bool dw_mci_reset(struct dw_mci *host) in dw_mci_reset() argument
1718 if (host->sg) { in dw_mci_reset()
1719 sg_miter_stop(&host->sg_miter); in dw_mci_reset()
1720 host->sg = NULL; in dw_mci_reset()
1723 if (host->use_dma) in dw_mci_reset()
1726 if (dw_mci_ctrl_reset(host, flags)) { in dw_mci_reset()
1731 mci_writel(host, RINTSTS, 0xFFFFFFFF); in dw_mci_reset()
1733 if (!host->use_dma) { in dw_mci_reset()
1739 if (readl_poll_timeout_atomic(host->regs + SDMMC_STATUS, in dw_mci_reset()
1743 dev_err(host->dev, in dw_mci_reset()
1750 if (!dw_mci_ctrl_reset(host, SDMMC_CTRL_FIFO_RESET)) in dw_mci_reset()
1754 if (!(mci_readl(host, CTRL) & SDMMC_CTRL_RESET)) { in dw_mci_reset()
1755 dev_err(host->dev, in dw_mci_reset()
1762 if (host->use_dma == TRANS_MODE_IDMAC) in dw_mci_reset()
1764 dw_mci_idmac_init(host); in dw_mci_reset()
1770 mci_send_cmd(host->slot, SDMMC_CMD_UPD_CLK, 0); in dw_mci_reset()
1792 static void dw_mci_request_end(struct dw_mci *host, struct mmc_request *mrq) in dw_mci_request_end() argument
1793 __releases(&host->lock) in dw_mci_request_end()
1794 __acquires(&host->lock) in dw_mci_request_end()
1797 struct mmc_host *prev_mmc = host->slot->mmc; in dw_mci_request_end()
1799 WARN_ON(host->cmd || host->data); in dw_mci_request_end()
1801 host->slot->mrq = NULL; in dw_mci_request_end()
1802 host->mrq = NULL; in dw_mci_request_end()
1803 if (!list_empty(&host->queue)) { in dw_mci_request_end()
1804 slot = list_entry(host->queue.next, in dw_mci_request_end()
1807 dev_vdbg(host->dev, "list not empty: %s is next\n", in dw_mci_request_end()
1809 host->state = STATE_SENDING_CMD; in dw_mci_request_end()
1810 dw_mci_start_request(host, slot); in dw_mci_request_end()
1812 dev_vdbg(host->dev, "list empty\n"); in dw_mci_request_end()
1814 if (host->state == STATE_SENDING_CMD11) in dw_mci_request_end()
1815 host->state = STATE_WAITING_CMD11_DONE; in dw_mci_request_end()
1817 host->state = STATE_IDLE; in dw_mci_request_end()
1820 spin_unlock(&host->lock); in dw_mci_request_end()
1822 spin_lock(&host->lock); in dw_mci_request_end()
1825 static int dw_mci_command_complete(struct dw_mci *host, struct mmc_command *cmd) in dw_mci_command_complete() argument
1827 u32 status = host->cmd_status; in dw_mci_command_complete()
1829 host->cmd_status = 0; in dw_mci_command_complete()
1834 cmd->resp[3] = mci_readl(host, RESP0); in dw_mci_command_complete()
1835 cmd->resp[2] = mci_readl(host, RESP1); in dw_mci_command_complete()
1836 cmd->resp[1] = mci_readl(host, RESP2); in dw_mci_command_complete()
1837 cmd->resp[0] = mci_readl(host, RESP3); in dw_mci_command_complete()
1839 cmd->resp[0] = mci_readl(host, RESP0); in dw_mci_command_complete()
1858 static int dw_mci_data_complete(struct dw_mci *host, struct mmc_data *data) in dw_mci_data_complete() argument
1860 u32 status = host->data_status; in dw_mci_data_complete()
1868 if (host->dir_status == in dw_mci_data_complete()
1877 } else if (host->dir_status == in dw_mci_data_complete()
1886 dev_dbg(host->dev, "data error, status 0x%08x\n", status); in dw_mci_data_complete()
1892 dw_mci_reset(host); in dw_mci_data_complete()
1901 static void dw_mci_set_drto(struct dw_mci *host) in dw_mci_set_drto() argument
1908 drto_clks = mci_readl(host, TMOUT) >> 8; in dw_mci_set_drto()
1909 drto_div = (mci_readl(host, CLKDIV) & 0xff) * 2; in dw_mci_set_drto()
1914 host->bus_hz); in dw_mci_set_drto()
1919 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_set_drto()
1920 if (!test_bit(EVENT_DATA_COMPLETE, &host->pending_events)) in dw_mci_set_drto()
1921 mod_timer(&host->dto_timer, in dw_mci_set_drto()
1923 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_set_drto()
1926 static bool dw_mci_clear_pending_cmd_complete(struct dw_mci *host) in dw_mci_clear_pending_cmd_complete() argument
1928 if (!test_bit(EVENT_CMD_COMPLETE, &host->pending_events)) in dw_mci_clear_pending_cmd_complete()
1938 WARN_ON(del_timer_sync(&host->cto_timer)); in dw_mci_clear_pending_cmd_complete()
1939 clear_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_clear_pending_cmd_complete()
1944 static bool dw_mci_clear_pending_data_complete(struct dw_mci *host) in dw_mci_clear_pending_data_complete() argument
1946 if (!test_bit(EVENT_DATA_COMPLETE, &host->pending_events)) in dw_mci_clear_pending_data_complete()
1950 WARN_ON(del_timer_sync(&host->dto_timer)); in dw_mci_clear_pending_data_complete()
1951 clear_bit(EVENT_DATA_COMPLETE, &host->pending_events); in dw_mci_clear_pending_data_complete()
1958 struct dw_mci *host = (struct dw_mci *)priv; in dw_mci_tasklet_func() local
1966 spin_lock(&host->lock); in dw_mci_tasklet_func()
1968 state = host->state; in dw_mci_tasklet_func()
1969 data = host->data; in dw_mci_tasklet_func()
1970 mrq = host->mrq; in dw_mci_tasklet_func()
1982 if (!dw_mci_clear_pending_cmd_complete(host)) in dw_mci_tasklet_func()
1985 cmd = host->cmd; in dw_mci_tasklet_func()
1986 host->cmd = NULL; in dw_mci_tasklet_func()
1987 set_bit(EVENT_CMD_COMPLETE, &host->completed_events); in dw_mci_tasklet_func()
1988 err = dw_mci_command_complete(host, cmd); in dw_mci_tasklet_func()
1990 __dw_mci_start_request(host, host->slot, in dw_mci_tasklet_func()
2018 host->dir_status == DW_MCI_RECV_STATUS) { in dw_mci_tasklet_func()
2023 send_stop_abort(host, data); in dw_mci_tasklet_func()
2024 dw_mci_stop_dma(host); in dw_mci_tasklet_func()
2030 dw_mci_request_end(host, mrq); in dw_mci_tasklet_func()
2047 &host->pending_events)) { in dw_mci_tasklet_func()
2048 if (!(host->data_status & (SDMMC_INT_DRTO | in dw_mci_tasklet_func()
2050 send_stop_abort(host, data); in dw_mci_tasklet_func()
2051 dw_mci_stop_dma(host); in dw_mci_tasklet_func()
2057 &host->pending_events)) { in dw_mci_tasklet_func()
2062 if (host->dir_status == DW_MCI_RECV_STATUS) in dw_mci_tasklet_func()
2063 dw_mci_set_drto(host); in dw_mci_tasklet_func()
2067 set_bit(EVENT_XFER_COMPLETE, &host->completed_events); in dw_mci_tasklet_func()
2083 &host->pending_events)) { in dw_mci_tasklet_func()
2084 if (!(host->data_status & (SDMMC_INT_DRTO | in dw_mci_tasklet_func()
2086 send_stop_abort(host, data); in dw_mci_tasklet_func()
2087 dw_mci_stop_dma(host); in dw_mci_tasklet_func()
2096 if (!dw_mci_clear_pending_data_complete(host)) { in dw_mci_tasklet_func()
2102 if (host->dir_status == DW_MCI_RECV_STATUS) in dw_mci_tasklet_func()
2103 dw_mci_set_drto(host); in dw_mci_tasklet_func()
2107 host->data = NULL; in dw_mci_tasklet_func()
2108 set_bit(EVENT_DATA_COMPLETE, &host->completed_events); in dw_mci_tasklet_func()
2109 err = dw_mci_data_complete(host, data); in dw_mci_tasklet_func()
2115 dw_mci_request_end(host, mrq); in dw_mci_tasklet_func()
2121 send_stop_abort(host, data); in dw_mci_tasklet_func()
2133 &host->pending_events)) { in dw_mci_tasklet_func()
2134 host->cmd = NULL; in dw_mci_tasklet_func()
2135 dw_mci_request_end(host, mrq); in dw_mci_tasklet_func()
2149 if (!dw_mci_clear_pending_cmd_complete(host)) in dw_mci_tasklet_func()
2154 dw_mci_reset(host); in dw_mci_tasklet_func()
2156 host->cmd = NULL; in dw_mci_tasklet_func()
2157 host->data = NULL; in dw_mci_tasklet_func()
2160 dw_mci_command_complete(host, mrq->stop); in dw_mci_tasklet_func()
2162 host->cmd_status = 0; in dw_mci_tasklet_func()
2164 dw_mci_request_end(host, mrq); in dw_mci_tasklet_func()
2169 &host->pending_events)) in dw_mci_tasklet_func()
2177 host->state = state; in dw_mci_tasklet_func()
2179 spin_unlock(&host->lock); in dw_mci_tasklet_func()
2184 static void dw_mci_set_part_bytes(struct dw_mci *host, void *buf, int cnt) in dw_mci_set_part_bytes() argument
2186 memcpy((void *)&host->part_buf, buf, cnt); in dw_mci_set_part_bytes()
2187 host->part_buf_count = cnt; in dw_mci_set_part_bytes()
2191 static int dw_mci_push_part_bytes(struct dw_mci *host, void *buf, int cnt) in dw_mci_push_part_bytes() argument
2193 cnt = min(cnt, (1 << host->data_shift) - host->part_buf_count); in dw_mci_push_part_bytes()
2194 memcpy((void *)&host->part_buf + host->part_buf_count, buf, cnt); in dw_mci_push_part_bytes()
2195 host->part_buf_count += cnt; in dw_mci_push_part_bytes()
2200 static int dw_mci_pull_part_bytes(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_part_bytes() argument
2202 cnt = min_t(int, cnt, host->part_buf_count); in dw_mci_pull_part_bytes()
2204 memcpy(buf, (void *)&host->part_buf + host->part_buf_start, in dw_mci_pull_part_bytes()
2206 host->part_buf_count -= cnt; in dw_mci_pull_part_bytes()
2207 host->part_buf_start += cnt; in dw_mci_pull_part_bytes()
2213 static void dw_mci_pull_final_bytes(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_final_bytes() argument
2215 memcpy(buf, &host->part_buf, cnt); in dw_mci_pull_final_bytes()
2216 host->part_buf_start = cnt; in dw_mci_pull_final_bytes()
2217 host->part_buf_count = (1 << host->data_shift) - cnt; in dw_mci_pull_final_bytes()
2220 static void dw_mci_push_data16(struct dw_mci *host, void *buf, int cnt) in dw_mci_push_data16() argument
2222 struct mmc_data *data = host->data; in dw_mci_push_data16()
2226 if (unlikely(host->part_buf_count)) { in dw_mci_push_data16()
2227 int len = dw_mci_push_part_bytes(host, buf, cnt); in dw_mci_push_data16()
2231 if (host->part_buf_count == 2) { in dw_mci_push_data16()
2232 mci_fifo_writew(host->fifo_reg, host->part_buf16); in dw_mci_push_data16()
2233 host->part_buf_count = 0; in dw_mci_push_data16()
2249 mci_fifo_writew(host->fifo_reg, aligned_buf[i]); in dw_mci_push_data16()
2257 mci_fifo_writew(host->fifo_reg, *pdata++); in dw_mci_push_data16()
2262 dw_mci_set_part_bytes(host, buf, cnt); in dw_mci_push_data16()
2266 mci_fifo_writew(host->fifo_reg, host->part_buf16); in dw_mci_push_data16()
2270 static void dw_mci_pull_data16(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_data16() argument
2282 aligned_buf[i] = mci_fifo_readw(host->fifo_reg); in dw_mci_pull_data16()
2294 *pdata++ = mci_fifo_readw(host->fifo_reg); in dw_mci_pull_data16()
2298 host->part_buf16 = mci_fifo_readw(host->fifo_reg); in dw_mci_pull_data16()
2299 dw_mci_pull_final_bytes(host, buf, cnt); in dw_mci_pull_data16()
2303 static void dw_mci_push_data32(struct dw_mci *host, void *buf, int cnt) in dw_mci_push_data32() argument
2305 struct mmc_data *data = host->data; in dw_mci_push_data32()
2309 if (unlikely(host->part_buf_count)) { in dw_mci_push_data32()
2310 int len = dw_mci_push_part_bytes(host, buf, cnt); in dw_mci_push_data32()
2314 if (host->part_buf_count == 4) { in dw_mci_push_data32()
2315 mci_fifo_writel(host->fifo_reg, host->part_buf32); in dw_mci_push_data32()
2316 host->part_buf_count = 0; in dw_mci_push_data32()
2332 mci_fifo_writel(host->fifo_reg, aligned_buf[i]); in dw_mci_push_data32()
2340 mci_fifo_writel(host->fifo_reg, *pdata++); in dw_mci_push_data32()
2345 dw_mci_set_part_bytes(host, buf, cnt); in dw_mci_push_data32()
2349 mci_fifo_writel(host->fifo_reg, host->part_buf32); in dw_mci_push_data32()
2353 static void dw_mci_pull_data32(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_data32() argument
2365 aligned_buf[i] = mci_fifo_readl(host->fifo_reg); in dw_mci_pull_data32()
2377 *pdata++ = mci_fifo_readl(host->fifo_reg); in dw_mci_pull_data32()
2381 host->part_buf32 = mci_fifo_readl(host->fifo_reg); in dw_mci_pull_data32()
2382 dw_mci_pull_final_bytes(host, buf, cnt); in dw_mci_pull_data32()
2386 static void dw_mci_push_data64(struct dw_mci *host, void *buf, int cnt) in dw_mci_push_data64() argument
2388 struct mmc_data *data = host->data; in dw_mci_push_data64()
2392 if (unlikely(host->part_buf_count)) { in dw_mci_push_data64()
2393 int len = dw_mci_push_part_bytes(host, buf, cnt); in dw_mci_push_data64()
2398 if (host->part_buf_count == 8) { in dw_mci_push_data64()
2399 mci_fifo_writeq(host->fifo_reg, host->part_buf); in dw_mci_push_data64()
2400 host->part_buf_count = 0; in dw_mci_push_data64()
2416 mci_fifo_writeq(host->fifo_reg, aligned_buf[i]); in dw_mci_push_data64()
2424 mci_fifo_writeq(host->fifo_reg, *pdata++); in dw_mci_push_data64()
2429 dw_mci_set_part_bytes(host, buf, cnt); in dw_mci_push_data64()
2433 mci_fifo_writeq(host->fifo_reg, host->part_buf); in dw_mci_push_data64()
2437 static void dw_mci_pull_data64(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_data64() argument
2449 aligned_buf[i] = mci_fifo_readq(host->fifo_reg); in dw_mci_pull_data64()
2462 *pdata++ = mci_fifo_readq(host->fifo_reg); in dw_mci_pull_data64()
2466 host->part_buf = mci_fifo_readq(host->fifo_reg); in dw_mci_pull_data64()
2467 dw_mci_pull_final_bytes(host, buf, cnt); in dw_mci_pull_data64()
2471 static void dw_mci_pull_data(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_data() argument
2476 len = dw_mci_pull_part_bytes(host, buf, cnt); in dw_mci_pull_data()
2483 host->pull_data(host, buf, cnt); in dw_mci_pull_data()
2486 static void dw_mci_read_data_pio(struct dw_mci *host, bool dto) in dw_mci_read_data_pio() argument
2488 struct sg_mapping_iter *sg_miter = &host->sg_miter; in dw_mci_read_data_pio()
2491 struct mmc_data *data = host->data; in dw_mci_read_data_pio()
2492 int shift = host->data_shift; in dw_mci_read_data_pio()
2501 host->sg = sg_miter->piter.sg; in dw_mci_read_data_pio()
2507 fcnt = (SDMMC_GET_FCNT(mci_readl(host, STATUS)) in dw_mci_read_data_pio()
2508 << shift) + host->part_buf_count; in dw_mci_read_data_pio()
2512 dw_mci_pull_data(host, (void *)(buf + offset), len); in dw_mci_read_data_pio()
2519 status = mci_readl(host, MINTSTS); in dw_mci_read_data_pio()
2520 mci_writel(host, RINTSTS, SDMMC_INT_RXDR); in dw_mci_read_data_pio()
2523 (dto && SDMMC_GET_FCNT(mci_readl(host, STATUS)))); in dw_mci_read_data_pio()
2535 host->sg = NULL; in dw_mci_read_data_pio()
2537 set_bit(EVENT_XFER_COMPLETE, &host->pending_events); in dw_mci_read_data_pio()
2540 static void dw_mci_write_data_pio(struct dw_mci *host) in dw_mci_write_data_pio() argument
2542 struct sg_mapping_iter *sg_miter = &host->sg_miter; in dw_mci_write_data_pio()
2545 struct mmc_data *data = host->data; in dw_mci_write_data_pio()
2546 int shift = host->data_shift; in dw_mci_write_data_pio()
2549 unsigned int fifo_depth = host->fifo_depth; in dw_mci_write_data_pio()
2556 host->sg = sg_miter->piter.sg; in dw_mci_write_data_pio()
2563 SDMMC_GET_FCNT(mci_readl(host, STATUS))) in dw_mci_write_data_pio()
2564 << shift) - host->part_buf_count; in dw_mci_write_data_pio()
2568 host->push_data(host, (void *)(buf + offset), len); in dw_mci_write_data_pio()
2575 status = mci_readl(host, MINTSTS); in dw_mci_write_data_pio()
2576 mci_writel(host, RINTSTS, SDMMC_INT_TXDR); in dw_mci_write_data_pio()
2589 host->sg = NULL; in dw_mci_write_data_pio()
2591 set_bit(EVENT_XFER_COMPLETE, &host->pending_events); in dw_mci_write_data_pio()
2594 static void dw_mci_cmd_interrupt(struct dw_mci *host, u32 status) in dw_mci_cmd_interrupt() argument
2596 del_timer(&host->cto_timer); in dw_mci_cmd_interrupt()
2598 if (!host->cmd_status) in dw_mci_cmd_interrupt()
2599 host->cmd_status = status; in dw_mci_cmd_interrupt()
2603 set_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_cmd_interrupt()
2604 tasklet_schedule(&host->tasklet); in dw_mci_cmd_interrupt()
2607 static void dw_mci_handle_cd(struct dw_mci *host) in dw_mci_handle_cd() argument
2609 struct dw_mci_slot *slot = host->slot; in dw_mci_handle_cd()
2614 msecs_to_jiffies(host->pdata->detect_delay_ms)); in dw_mci_handle_cd()
2619 struct dw_mci *host = dev_id; in dw_mci_interrupt() local
2621 struct dw_mci_slot *slot = host->slot; in dw_mci_interrupt()
2624 pending = mci_readl(host, MINTSTS); /* read-only mask reg */ in dw_mci_interrupt()
2628 if ((host->state == STATE_SENDING_CMD11) && in dw_mci_interrupt()
2630 mci_writel(host, RINTSTS, SDMMC_INT_VOLT_SWITCH); in dw_mci_interrupt()
2637 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_interrupt()
2638 dw_mci_cmd_interrupt(host, pending); in dw_mci_interrupt()
2639 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_interrupt()
2641 del_timer(&host->cmd11_timer); in dw_mci_interrupt()
2645 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_interrupt()
2647 del_timer(&host->cto_timer); in dw_mci_interrupt()
2648 mci_writel(host, RINTSTS, DW_MCI_CMD_ERROR_FLAGS); in dw_mci_interrupt()
2649 host->cmd_status = pending; in dw_mci_interrupt()
2651 set_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_interrupt()
2653 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_interrupt()
2658 mci_writel(host, RINTSTS, DW_MCI_DATA_ERROR_FLAGS); in dw_mci_interrupt()
2659 host->data_status = pending; in dw_mci_interrupt()
2661 set_bit(EVENT_DATA_ERROR, &host->pending_events); in dw_mci_interrupt()
2662 tasklet_schedule(&host->tasklet); in dw_mci_interrupt()
2666 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_interrupt()
2668 del_timer(&host->dto_timer); in dw_mci_interrupt()
2670 mci_writel(host, RINTSTS, SDMMC_INT_DATA_OVER); in dw_mci_interrupt()
2671 if (!host->data_status) in dw_mci_interrupt()
2672 host->data_status = pending; in dw_mci_interrupt()
2674 if (host->dir_status == DW_MCI_RECV_STATUS) { in dw_mci_interrupt()
2675 if (host->sg != NULL) in dw_mci_interrupt()
2676 dw_mci_read_data_pio(host, true); in dw_mci_interrupt()
2678 set_bit(EVENT_DATA_COMPLETE, &host->pending_events); in dw_mci_interrupt()
2679 tasklet_schedule(&host->tasklet); in dw_mci_interrupt()
2681 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_interrupt()
2685 mci_writel(host, RINTSTS, SDMMC_INT_RXDR); in dw_mci_interrupt()
2686 if (host->dir_status == DW_MCI_RECV_STATUS && host->sg) in dw_mci_interrupt()
2687 dw_mci_read_data_pio(host, false); in dw_mci_interrupt()
2691 mci_writel(host, RINTSTS, SDMMC_INT_TXDR); in dw_mci_interrupt()
2692 if (host->dir_status == DW_MCI_SEND_STATUS && host->sg) in dw_mci_interrupt()
2693 dw_mci_write_data_pio(host); in dw_mci_interrupt()
2697 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_interrupt()
2699 mci_writel(host, RINTSTS, SDMMC_INT_CMD_DONE); in dw_mci_interrupt()
2700 dw_mci_cmd_interrupt(host, pending); in dw_mci_interrupt()
2702 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_interrupt()
2706 mci_writel(host, RINTSTS, SDMMC_INT_CD); in dw_mci_interrupt()
2707 dw_mci_handle_cd(host); in dw_mci_interrupt()
2711 mci_writel(host, RINTSTS, in dw_mci_interrupt()
2719 if (host->use_dma != TRANS_MODE_IDMAC) in dw_mci_interrupt()
2723 if (host->dma_64bit_address == 1) { in dw_mci_interrupt()
2724 pending = mci_readl(host, IDSTS64); in dw_mci_interrupt()
2726 mci_writel(host, IDSTS64, SDMMC_IDMAC_INT_TI | in dw_mci_interrupt()
2728 mci_writel(host, IDSTS64, SDMMC_IDMAC_INT_NI); in dw_mci_interrupt()
2729 if (!test_bit(EVENT_DATA_ERROR, &host->pending_events)) in dw_mci_interrupt()
2730 host->dma_ops->complete((void *)host); in dw_mci_interrupt()
2733 pending = mci_readl(host, IDSTS); in dw_mci_interrupt()
2735 mci_writel(host, IDSTS, SDMMC_IDMAC_INT_TI | in dw_mci_interrupt()
2737 mci_writel(host, IDSTS, SDMMC_IDMAC_INT_NI); in dw_mci_interrupt()
2738 if (!test_bit(EVENT_DATA_ERROR, &host->pending_events)) in dw_mci_interrupt()
2739 host->dma_ops->complete((void *)host); in dw_mci_interrupt()
2748 struct dw_mci *host = slot->host; in dw_mci_init_slot_caps() local
2749 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_init_slot_caps()
2753 if (host->pdata->caps) in dw_mci_init_slot_caps()
2754 mmc->caps = host->pdata->caps; in dw_mci_init_slot_caps()
2756 if (host->pdata->pm_caps) in dw_mci_init_slot_caps()
2757 mmc->pm_caps = host->pdata->pm_caps; in dw_mci_init_slot_caps()
2759 if (host->dev->of_node) { in dw_mci_init_slot_caps()
2760 ctrl_id = of_alias_get_id(host->dev->of_node, "mshc"); in dw_mci_init_slot_caps()
2764 ctrl_id = to_platform_device(host->dev)->id; in dw_mci_init_slot_caps()
2769 dev_err(host->dev, "invalid controller id %d\n", in dw_mci_init_slot_caps()
2776 if (host->pdata->caps2) in dw_mci_init_slot_caps()
2777 mmc->caps2 = host->pdata->caps2; in dw_mci_init_slot_caps()
2790 static int dw_mci_init_slot(struct dw_mci *host) in dw_mci_init_slot() argument
2796 mmc = mmc_alloc_host(sizeof(struct dw_mci_slot), host->dev); in dw_mci_init_slot()
2802 slot->sdio_id = host->sdio_id0 + slot->id; in dw_mci_init_slot()
2804 slot->host = host; in dw_mci_init_slot()
2805 host->slot = slot; in dw_mci_init_slot()
2826 if (host->use_dma == TRANS_MODE_IDMAC) { in dw_mci_init_slot()
2827 mmc->max_segs = host->ring_size; in dw_mci_init_slot()
2830 mmc->max_req_size = mmc->max_seg_size * host->ring_size; in dw_mci_init_slot()
2832 } else if (host->use_dma == TRANS_MODE_EDMAC) { in dw_mci_init_slot()
2870 slot->host->slot = NULL; in dw_mci_cleanup_slot()
2874 static void dw_mci_init_dma(struct dw_mci *host) in dw_mci_init_dma() argument
2877 struct device *dev = host->dev; in dw_mci_init_dma()
2890 host->use_dma = SDMMC_GET_TRANS_MODE(mci_readl(host, HCON)); in dw_mci_init_dma()
2891 if (host->use_dma == DMA_INTERFACE_IDMA) { in dw_mci_init_dma()
2892 host->use_dma = TRANS_MODE_IDMAC; in dw_mci_init_dma()
2893 } else if (host->use_dma == DMA_INTERFACE_DWDMA || in dw_mci_init_dma()
2894 host->use_dma == DMA_INTERFACE_GDMA) { in dw_mci_init_dma()
2895 host->use_dma = TRANS_MODE_EDMAC; in dw_mci_init_dma()
2901 if (host->use_dma == TRANS_MODE_IDMAC) { in dw_mci_init_dma()
2906 addr_config = SDMMC_GET_ADDR_CONFIG(mci_readl(host, HCON)); in dw_mci_init_dma()
2909 /* host supports IDMAC in 64-bit address mode */ in dw_mci_init_dma()
2910 host->dma_64bit_address = 1; in dw_mci_init_dma()
2911 dev_info(host->dev, in dw_mci_init_dma()
2913 if (!dma_set_mask(host->dev, DMA_BIT_MASK(64))) in dw_mci_init_dma()
2914 dma_set_coherent_mask(host->dev, in dw_mci_init_dma()
2917 /* host supports IDMAC in 32-bit address mode */ in dw_mci_init_dma()
2918 host->dma_64bit_address = 0; in dw_mci_init_dma()
2919 dev_info(host->dev, in dw_mci_init_dma()
2924 host->sg_cpu = dmam_alloc_coherent(host->dev, in dw_mci_init_dma()
2926 &host->sg_dma, GFP_KERNEL); in dw_mci_init_dma()
2927 if (!host->sg_cpu) { in dw_mci_init_dma()
2928 dev_err(host->dev, in dw_mci_init_dma()
2934 host->dma_ops = &dw_mci_idmac_ops; in dw_mci_init_dma()
2935 dev_info(host->dev, "Using internal DMA controller.\n"); in dw_mci_init_dma()
2943 host->dma_ops = &dw_mci_edmac_ops; in dw_mci_init_dma()
2944 dev_info(host->dev, "Using external DMA controller.\n"); in dw_mci_init_dma()
2947 if (host->dma_ops->init && host->dma_ops->start && in dw_mci_init_dma()
2948 host->dma_ops->stop && host->dma_ops->cleanup) { in dw_mci_init_dma()
2949 if (host->dma_ops->init(host)) { in dw_mci_init_dma()
2950 dev_err(host->dev, "%s: Unable to initialize DMA Controller.\n", in dw_mci_init_dma()
2955 dev_err(host->dev, "DMA initialization not found.\n"); in dw_mci_init_dma()
2962 dev_info(host->dev, "Using PIO mode.\n"); in dw_mci_init_dma()
2963 host->use_dma = TRANS_MODE_PIO; in dw_mci_init_dma()
2968 struct dw_mci *host = from_timer(host, t, cmd11_timer); in dw_mci_cmd11_timer() local
2970 if (host->state != STATE_SENDING_CMD11) { in dw_mci_cmd11_timer()
2971 dev_warn(host->dev, "Unexpected CMD11 timeout\n"); in dw_mci_cmd11_timer()
2975 host->cmd_status = SDMMC_INT_RTO; in dw_mci_cmd11_timer()
2976 set_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_cmd11_timer()
2977 tasklet_schedule(&host->tasklet); in dw_mci_cmd11_timer()
2982 struct dw_mci *host = from_timer(host, t, cto_timer); in dw_mci_cto_timer() local
2986 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_cto_timer()
2996 pending = mci_readl(host, MINTSTS); /* read-only mask reg */ in dw_mci_cto_timer()
2999 dev_warn(host->dev, "Unexpected interrupt latency\n"); in dw_mci_cto_timer()
3002 if (test_bit(EVENT_CMD_COMPLETE, &host->pending_events)) { in dw_mci_cto_timer()
3004 dev_warn(host->dev, "CTO timeout when already completed\n"); in dw_mci_cto_timer()
3012 switch (host->state) { in dw_mci_cto_timer()
3021 host->cmd_status = SDMMC_INT_RTO; in dw_mci_cto_timer()
3022 set_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_cto_timer()
3023 tasklet_schedule(&host->tasklet); in dw_mci_cto_timer()
3026 dev_warn(host->dev, "Unexpected command timeout, state %d\n", in dw_mci_cto_timer()
3027 host->state); in dw_mci_cto_timer()
3032 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_cto_timer()
3037 struct dw_mci *host = from_timer(host, t, dto_timer); in dw_mci_dto_timer() local
3041 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_dto_timer()
3047 pending = mci_readl(host, MINTSTS); /* read-only mask reg */ in dw_mci_dto_timer()
3050 dev_warn(host->dev, "Unexpected data interrupt latency\n"); in dw_mci_dto_timer()
3053 if (test_bit(EVENT_DATA_COMPLETE, &host->pending_events)) { in dw_mci_dto_timer()
3055 dev_warn(host->dev, "DTO timeout when already completed\n"); in dw_mci_dto_timer()
3063 switch (host->state) { in dw_mci_dto_timer()
3071 host->data_status = SDMMC_INT_DRTO; in dw_mci_dto_timer()
3072 set_bit(EVENT_DATA_ERROR, &host->pending_events); in dw_mci_dto_timer()
3073 set_bit(EVENT_DATA_COMPLETE, &host->pending_events); in dw_mci_dto_timer()
3074 tasklet_schedule(&host->tasklet); in dw_mci_dto_timer()
3077 dev_warn(host->dev, "Unexpected data timeout, state %d\n", in dw_mci_dto_timer()
3078 host->state); in dw_mci_dto_timer()
3083 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_dto_timer()
3087 static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host) in dw_mci_parse_dt() argument
3090 struct device *dev = host->dev; in dw_mci_parse_dt()
3091 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_parse_dt()
3113 device_property_read_u32(dev, "data-addr", &host->data_addr_override); in dw_mci_parse_dt()
3116 host->wm_aligned = true; in dw_mci_parse_dt()
3122 ret = drv_data->parse_dt(host); in dw_mci_parse_dt()
3131 static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host) in dw_mci_parse_dt() argument
3137 static void dw_mci_enable_cd(struct dw_mci *host) in dw_mci_enable_cd() argument
3146 if (host->slot->mmc->caps & MMC_CAP_NEEDS_POLL) in dw_mci_enable_cd()
3149 if (mmc_gpio_get_cd(host->slot->mmc) < 0) { in dw_mci_enable_cd()
3150 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_enable_cd()
3151 temp = mci_readl(host, INTMASK); in dw_mci_enable_cd()
3153 mci_writel(host, INTMASK, temp); in dw_mci_enable_cd()
3154 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_enable_cd()
3158 int dw_mci_probe(struct dw_mci *host) in dw_mci_probe() argument
3160 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_probe()
3164 if (!host->pdata) { in dw_mci_probe()
3165 host->pdata = dw_mci_parse_dt(host); in dw_mci_probe()
3166 if (IS_ERR(host->pdata)) in dw_mci_probe()
3167 return dev_err_probe(host->dev, PTR_ERR(host->pdata), in dw_mci_probe()
3171 host->biu_clk = devm_clk_get(host->dev, "biu"); in dw_mci_probe()
3172 if (IS_ERR(host->biu_clk)) { in dw_mci_probe()
3173 dev_dbg(host->dev, "biu clock not available\n"); in dw_mci_probe()
3175 ret = clk_prepare_enable(host->biu_clk); in dw_mci_probe()
3177 dev_err(host->dev, "failed to enable biu clock\n"); in dw_mci_probe()
3182 host->ciu_clk = devm_clk_get(host->dev, "ciu"); in dw_mci_probe()
3183 if (IS_ERR(host->ciu_clk)) { in dw_mci_probe()
3184 dev_dbg(host->dev, "ciu clock not available\n"); in dw_mci_probe()
3185 host->bus_hz = host->pdata->bus_hz; in dw_mci_probe()
3187 ret = clk_prepare_enable(host->ciu_clk); in dw_mci_probe()
3189 dev_err(host->dev, "failed to enable ciu clock\n"); in dw_mci_probe()
3193 if (host->pdata->bus_hz) { in dw_mci_probe()
3194 ret = clk_set_rate(host->ciu_clk, host->pdata->bus_hz); in dw_mci_probe()
3196 dev_warn(host->dev, in dw_mci_probe()
3198 host->pdata->bus_hz); in dw_mci_probe()
3200 host->bus_hz = clk_get_rate(host->ciu_clk); in dw_mci_probe()
3203 if (!host->bus_hz) { in dw_mci_probe()
3204 dev_err(host->dev, in dw_mci_probe()
3210 if (!IS_ERR(host->pdata->rstc)) { in dw_mci_probe()
3211 reset_control_assert(host->pdata->rstc); in dw_mci_probe()
3213 reset_control_deassert(host->pdata->rstc); in dw_mci_probe()
3217 ret = drv_data->init(host); in dw_mci_probe()
3219 dev_err(host->dev, in dw_mci_probe()
3225 timer_setup(&host->cmd11_timer, dw_mci_cmd11_timer, 0); in dw_mci_probe()
3226 timer_setup(&host->cto_timer, dw_mci_cto_timer, 0); in dw_mci_probe()
3227 timer_setup(&host->dto_timer, dw_mci_dto_timer, 0); in dw_mci_probe()
3229 spin_lock_init(&host->lock); in dw_mci_probe()
3230 spin_lock_init(&host->irq_lock); in dw_mci_probe()
3231 INIT_LIST_HEAD(&host->queue); in dw_mci_probe()
3234 * Get the host data width - this assumes that HCON has been set with in dw_mci_probe()
3237 i = SDMMC_GET_HDATA_WIDTH(mci_readl(host, HCON)); in dw_mci_probe()
3239 host->push_data = dw_mci_push_data16; in dw_mci_probe()
3240 host->pull_data = dw_mci_pull_data16; in dw_mci_probe()
3242 host->data_shift = 1; in dw_mci_probe()
3244 host->push_data = dw_mci_push_data64; in dw_mci_probe()
3245 host->pull_data = dw_mci_pull_data64; in dw_mci_probe()
3247 host->data_shift = 3; in dw_mci_probe()
3251 "HCON reports a reserved host data width!\n" in dw_mci_probe()
3253 host->push_data = dw_mci_push_data32; in dw_mci_probe()
3254 host->pull_data = dw_mci_pull_data32; in dw_mci_probe()
3256 host->data_shift = 2; in dw_mci_probe()
3260 if (!dw_mci_ctrl_reset(host, SDMMC_CTRL_ALL_RESET_FLAGS)) { in dw_mci_probe()
3265 host->dma_ops = host->pdata->dma_ops; in dw_mci_probe()
3266 dw_mci_init_dma(host); in dw_mci_probe()
3268 /* Clear the interrupts for the host controller */ in dw_mci_probe()
3269 mci_writel(host, RINTSTS, 0xFFFFFFFF); in dw_mci_probe()
3270 mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ in dw_mci_probe()
3273 mci_writel(host, TMOUT, 0xFFFFFFFF); in dw_mci_probe()
3279 if (!host->pdata->fifo_depth) { in dw_mci_probe()
3286 fifo_size = mci_readl(host, FIFOTH); in dw_mci_probe()
3289 fifo_size = host->pdata->fifo_depth; in dw_mci_probe()
3291 host->fifo_depth = fifo_size; in dw_mci_probe()
3292 host->fifoth_val = in dw_mci_probe()
3294 mci_writel(host, FIFOTH, host->fifoth_val); in dw_mci_probe()
3297 mci_writel(host, CLKENA, 0); in dw_mci_probe()
3298 mci_writel(host, CLKSRC, 0); in dw_mci_probe()
3304 host->verid = SDMMC_GET_VERID(mci_readl(host, VERID)); in dw_mci_probe()
3305 dev_info(host->dev, "Version ID is %04x\n", host->verid); in dw_mci_probe()
3307 if (host->data_addr_override) in dw_mci_probe()
3308 host->fifo_reg = host->regs + host->data_addr_override; in dw_mci_probe()
3309 else if (host->verid < DW_MMC_240A) in dw_mci_probe()
3310 host->fifo_reg = host->regs + DATA_OFFSET; in dw_mci_probe()
3312 host->fifo_reg = host->regs + DATA_240A_OFFSET; in dw_mci_probe()
3314 tasklet_init(&host->tasklet, dw_mci_tasklet_func, (unsigned long)host); in dw_mci_probe()
3315 ret = devm_request_irq(host->dev, host->irq, dw_mci_interrupt, in dw_mci_probe()
3316 host->irq_flags, "dw-mci", host); in dw_mci_probe()
3324 mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | in dw_mci_probe()
3328 mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); in dw_mci_probe()
3330 dev_info(host->dev, in dw_mci_probe()
3331 "DW MMC controller at irq %d,%d bit host data width,%u deep fifo\n", in dw_mci_probe()
3332 host->irq, width, fifo_size); in dw_mci_probe()
3335 ret = dw_mci_init_slot(host); in dw_mci_probe()
3337 dev_dbg(host->dev, "slot %d init failed\n", i); in dw_mci_probe()
3342 dw_mci_enable_cd(host); in dw_mci_probe()
3347 if (host->use_dma && host->dma_ops->exit) in dw_mci_probe()
3348 host->dma_ops->exit(host); in dw_mci_probe()
3350 if (!IS_ERR(host->pdata->rstc)) in dw_mci_probe()
3351 reset_control_assert(host->pdata->rstc); in dw_mci_probe()
3354 clk_disable_unprepare(host->ciu_clk); in dw_mci_probe()
3357 clk_disable_unprepare(host->biu_clk); in dw_mci_probe()
3363 void dw_mci_remove(struct dw_mci *host) in dw_mci_remove() argument
3365 dev_dbg(host->dev, "remove slot\n"); in dw_mci_remove()
3366 if (host->slot) in dw_mci_remove()
3367 dw_mci_cleanup_slot(host->slot); in dw_mci_remove()
3369 mci_writel(host, RINTSTS, 0xFFFFFFFF); in dw_mci_remove()
3370 mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ in dw_mci_remove()
3373 mci_writel(host, CLKENA, 0); in dw_mci_remove()
3374 mci_writel(host, CLKSRC, 0); in dw_mci_remove()
3376 if (host->use_dma && host->dma_ops->exit) in dw_mci_remove()
3377 host->dma_ops->exit(host); in dw_mci_remove()
3379 if (!IS_ERR(host->pdata->rstc)) in dw_mci_remove()
3380 reset_control_assert(host->pdata->rstc); in dw_mci_remove()
3382 clk_disable_unprepare(host->ciu_clk); in dw_mci_remove()
3383 clk_disable_unprepare(host->biu_clk); in dw_mci_remove()
3392 struct dw_mci *host = dev_get_drvdata(dev); in dw_mci_runtime_suspend() local
3394 if (host->use_dma && host->dma_ops->exit) in dw_mci_runtime_suspend()
3395 host->dma_ops->exit(host); in dw_mci_runtime_suspend()
3397 clk_disable_unprepare(host->ciu_clk); in dw_mci_runtime_suspend()
3399 if (host->slot && in dw_mci_runtime_suspend()
3400 (mmc_can_gpio_cd(host->slot->mmc) || in dw_mci_runtime_suspend()
3401 !mmc_card_is_removable(host->slot->mmc))) in dw_mci_runtime_suspend()
3402 clk_disable_unprepare(host->biu_clk); in dw_mci_runtime_suspend()
3411 struct dw_mci *host = dev_get_drvdata(dev); in dw_mci_runtime_resume() local
3413 if (host->slot && in dw_mci_runtime_resume()
3414 (mmc_can_gpio_cd(host->slot->mmc) || in dw_mci_runtime_resume()
3415 !mmc_card_is_removable(host->slot->mmc))) { in dw_mci_runtime_resume()
3416 ret = clk_prepare_enable(host->biu_clk); in dw_mci_runtime_resume()
3421 ret = clk_prepare_enable(host->ciu_clk); in dw_mci_runtime_resume()
3425 if (!dw_mci_ctrl_reset(host, SDMMC_CTRL_ALL_RESET_FLAGS)) { in dw_mci_runtime_resume()
3426 clk_disable_unprepare(host->ciu_clk); in dw_mci_runtime_resume()
3431 if (host->use_dma && host->dma_ops->init) in dw_mci_runtime_resume()
3432 host->dma_ops->init(host); in dw_mci_runtime_resume()
3438 mci_writel(host, FIFOTH, host->fifoth_val); in dw_mci_runtime_resume()
3439 host->prev_blksz = 0; in dw_mci_runtime_resume()
3442 mci_writel(host, TMOUT, 0xFFFFFFFF); in dw_mci_runtime_resume()
3444 mci_writel(host, RINTSTS, 0xFFFFFFFF); in dw_mci_runtime_resume()
3445 mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | in dw_mci_runtime_resume()
3448 mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); in dw_mci_runtime_resume()
3451 if (host->slot->mmc->pm_flags & MMC_PM_KEEP_POWER) in dw_mci_runtime_resume()
3452 dw_mci_set_ios(host->slot->mmc, &host->slot->mmc->ios); in dw_mci_runtime_resume()
3455 dw_mci_setup_bus(host->slot, true); in dw_mci_runtime_resume()
3458 if (sdio_irq_claimed(host->slot->mmc)) in dw_mci_runtime_resume()
3459 __dw_mci_enable_sdio_irq(host->slot, 1); in dw_mci_runtime_resume()
3462 dw_mci_enable_cd(host); in dw_mci_runtime_resume()
3467 if (host->slot && in dw_mci_runtime_resume()
3468 (mmc_can_gpio_cd(host->slot->mmc) || in dw_mci_runtime_resume()
3469 !mmc_card_is_removable(host->slot->mmc))) in dw_mci_runtime_resume()
3470 clk_disable_unprepare(host->biu_clk); in dw_mci_runtime_resume()