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Lines Matching +full:coexist +full:- +full:support

1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Marvell 88E6xxx System Management Interface (SMI) support
16 * When ADDR is all zero, the chip uses Single-chip Addressing Mode, assuming it
20 * When ADDR is non-zero, the chip uses Multi-chip Addressing Mode, allowing
26 * addresses, allowing two to coexist on the same SMI interface.
34 ret = mdiobus_read_nested(chip->bus, dev, reg); in mv88e6xxx_smi_direct_read()
48 ret = mdiobus_write_nested(chip->bus, dev, reg, data); in mv88e6xxx_smi_direct_write()
73 return -ETIMEDOUT; in mv88e6xxx_smi_direct_wait()
84 return mv88e6xxx_smi_direct_read(chip, chip->sw_addr + dev, reg, data); in mv88e6xxx_smi_dual_direct_read()
90 return mv88e6xxx_smi_direct_write(chip, chip->sw_addr + dev, reg, data); in mv88e6xxx_smi_dual_direct_write()
107 err = mv88e6xxx_smi_direct_wait(chip, chip->sw_addr, in mv88e6xxx_smi_indirect_read()
112 err = mv88e6xxx_smi_direct_write(chip, chip->sw_addr, in mv88e6xxx_smi_indirect_read()
121 err = mv88e6xxx_smi_direct_wait(chip, chip->sw_addr, in mv88e6xxx_smi_indirect_read()
126 return mv88e6xxx_smi_direct_read(chip, chip->sw_addr, in mv88e6xxx_smi_indirect_read()
135 err = mv88e6xxx_smi_direct_wait(chip, chip->sw_addr, in mv88e6xxx_smi_indirect_write()
140 err = mv88e6xxx_smi_direct_write(chip, chip->sw_addr, in mv88e6xxx_smi_indirect_write()
145 err = mv88e6xxx_smi_direct_write(chip, chip->sw_addr, in mv88e6xxx_smi_indirect_write()
154 return mv88e6xxx_smi_direct_wait(chip, chip->sw_addr, in mv88e6xxx_smi_indirect_write()
166 if (chip->info->dual_chip) in mv88e6xxx_smi_init()
167 chip->smi_ops = &mv88e6xxx_smi_dual_direct_ops; in mv88e6xxx_smi_init()
169 chip->smi_ops = &mv88e6xxx_smi_direct_ops; in mv88e6xxx_smi_init()
170 else if (chip->info->multi_chip) in mv88e6xxx_smi_init()
171 chip->smi_ops = &mv88e6xxx_smi_indirect_ops; in mv88e6xxx_smi_init()
173 return -EINVAL; in mv88e6xxx_smi_init()
175 chip->bus = bus; in mv88e6xxx_smi_init()
176 chip->sw_addr = sw_addr; in mv88e6xxx_smi_init()