1 // SPDX-License-Identifier: GPL-2.0+
3  * Marvell 10G 88x3310 PHY driver
10  * via observation and experimentation for a setup using single-lane Serdes:
12  *       SGMII PHYXS -- BASE-T PCS -- 10G PMA -- AN -- Copper (for <= 1G)
13  *  10GBASE-KR PHYXS -- BASE-T PCS -- 10G PMA -- AN -- Copper (for 10G)
14  *  10GBASE-KR PHYXS -- BASE-R PCS -- Fiber
18  *        XAUI PHYXS -- <appropriate PCS as above>
72 	/* These registers appear at 0x800X and 0xa00X - the 0xa00X control
76 	MV_AN_CTRL1000		= 0x8000, /* 1000base-T control register */
77 	MV_AN_STAT1000		= 0x8001, /* 1000base-T status register */
126 	if (phydev->drv->phy_id == MARVELL_PHY_ID_88X3310)  in mv10g_hwmon_read_temp_reg()
148 		*value = ((temp & 0xff) - 75) * 1000;  in mv3310_hwmon_read()
153 	return -EOPNOTSUPP;  in mv3310_hwmon_read()
197 	if (phydev->drv->phy_id != MARVELL_PHY_ID_88X3310)  in mv3310_hwmon_config()
213 	struct device *dev = &phydev->mdio.dev;  in mv3310_hwmon_probe()
214 	struct mv3310_priv *priv = dev_get_drvdata(&phydev->mdio.dev);  in mv3310_hwmon_probe()
217 	priv->hwmon_name = devm_kstrdup(dev, dev_name(dev), GFP_KERNEL);  in mv3310_hwmon_probe()
218 	if (!priv->hwmon_name)  in mv3310_hwmon_probe()
219 		return -ENODEV;  in mv3310_hwmon_probe()
221 	for (i = j = 0; priv->hwmon_name[i]; i++) {  in mv3310_hwmon_probe()
222 		if (isalnum(priv->hwmon_name[i])) {  in mv3310_hwmon_probe()
224 				priv->hwmon_name[j] = priv->hwmon_name[i];  in mv3310_hwmon_probe()
228 	priv->hwmon_name[j] = '\0';  in mv3310_hwmon_probe()
234 	priv->hwmon_dev = devm_hwmon_device_register_with_info(dev,  in mv3310_hwmon_probe()
235 				priv->hwmon_name, phydev,  in mv3310_hwmon_probe()
238 	return PTR_ERR_OR_ZERO(priv->hwmon_dev);  in mv3310_hwmon_probe()
260 	struct mv3310_priv *priv = dev_get_drvdata(&phydev->mdio.dev);  in mv3310_power_up()
273 	if (phydev->drv->phy_id != MARVELL_PHY_ID_88X3310 ||  in mv3310_power_up()
274 	    priv->firmware_ver < 0x00030000)  in mv3310_power_up()
338 		return -EINVAL;  in mv3310_set_edpd()
355 	sfp_parse_support(phydev->sfp_bus, id, support);  in mv3310_sfp_insert()
356 	iface = sfp_select_interface(phydev->sfp_bus, support);  in mv3310_sfp_insert()
359 		dev_err(&phydev->mdio.dev, "incompatible SFP module inserted\n");  in mv3310_sfp_insert()
360 		return -EINVAL;  in mv3310_sfp_insert()
377 	if (!phydev->is_c45 ||  in mv3310_probe()
378 	    (phydev->c45_ids.devices_in_package & mmd_mask) != mmd_mask)  in mv3310_probe()
379 		return -ENODEV;  in mv3310_probe()
386 		dev_warn(&phydev->mdio.dev,  in mv3310_probe()
388 		return -ENODEV;  in mv3310_probe()
391 	priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);  in mv3310_probe()
393 		return -ENOMEM;  in mv3310_probe()
395 	dev_set_drvdata(&phydev->mdio.dev, priv);  in mv3310_probe()
401 	priv->firmware_ver = ret << 16;  in mv3310_probe()
407 	priv->firmware_ver |= ret;  in mv3310_probe()
410 		    priv->firmware_ver >> 24, (priv->firmware_ver >> 16) & 255,  in mv3310_probe()
411 		    (priv->firmware_ver >> 8) & 255, priv->firmware_ver & 255);  in mv3310_probe()
455 	if (!(phydev->c45_ids.devices_in_package & MDIO_DEVS_PMAPMD))  in mv3310_has_pma_ngbaset_quirk()
459 	return (phydev->c45_ids.device_ids[MDIO_MMD_PMAPMD] &  in mv3310_has_pma_ngbaset_quirk()
465 	struct mv3310_priv *priv = dev_get_drvdata(&phydev->mdio.dev);  in mv3310_config_init()
470 	if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&  in mv3310_config_init()
471 	    phydev->interface != PHY_INTERFACE_MODE_2500BASEX &&  in mv3310_config_init()
472 	    phydev->interface != PHY_INTERFACE_MODE_XAUI &&  in mv3310_config_init()
473 	    phydev->interface != PHY_INTERFACE_MODE_RXAUI &&  in mv3310_config_init()
474 	    phydev->interface != PHY_INTERFACE_MODE_10GBASER)  in mv3310_config_init()
475 		return -ENODEV;  in mv3310_config_init()
477 	phydev->mdix_ctrl = ETH_TP_MDI_AUTO;  in mv3310_config_init()
487 	priv->rate_match = ((val & MV_V2_PORT_MAC_TYPE_MASK) ==  in mv3310_config_init()
490 	/* Enable EDPD mode - saving 600mW */  in mv3310_config_init()
509 				 phydev->supported,  in mv3310_get_features()
513 				 phydev->supported,  in mv3310_get_features()
525 	switch (phydev->mdix_ctrl) {  in mv3310_config_mdix()
536 		return -EINVAL;  in mv3310_config_mdix()
557 	if (phydev->autoneg == AUTONEG_DISABLE)  in mv3310_config_aneg()
569 	reg = linkmode_adv_to_mii_ctrl1000_t(phydev->advertising);  in mv3310_config_aneg()
596 	struct mv3310_priv *priv = dev_get_drvdata(&phydev->mdio.dev);  in mv3310_update_interface()
599 	 * 10Gb. The PHY adapts the rate to actual wire speed with help of  in mv3310_update_interface()
602 	if (priv->rate_match) {  in mv3310_update_interface()
603 		phydev->interface = PHY_INTERFACE_MODE_10GBASER;  in mv3310_update_interface()
607 	if ((phydev->interface == PHY_INTERFACE_MODE_SGMII ||  in mv3310_update_interface()
608 	     phydev->interface == PHY_INTERFACE_MODE_2500BASEX ||  in mv3310_update_interface()
609 	     phydev->interface == PHY_INTERFACE_MODE_10GBASER) &&  in mv3310_update_interface()
610 	    phydev->link) {  in mv3310_update_interface()
612 		 * active PHYXS instance) between Cisco SGMII, 10GBase-R and  in mv3310_update_interface()
614 		 * setting phydev->interface to communicate this to the MAC.  in mv3310_update_interface()
617 		switch (phydev->speed) {  in mv3310_update_interface()
619 			phydev->interface = PHY_INTERFACE_MODE_10GBASER;  in mv3310_update_interface()
622 			phydev->interface = PHY_INTERFACE_MODE_2500BASEX;  in mv3310_update_interface()
627 			phydev->interface = PHY_INTERFACE_MODE_SGMII;  in mv3310_update_interface()
635 /* 10GBASE-ER,LR,LRM,SR do not support autonegotiation. */
638 	phydev->link = 1;  in mv3310_read_status_10gbaser()
639 	phydev->speed = SPEED_10000;  in mv3310_read_status_10gbaser()
640 	phydev->duplex = DUPLEX_FULL;  in mv3310_read_status_10gbaser()
641 	phydev->port = PORT_FIBRE;  in mv3310_read_status_10gbaser()
664 		phydev->link = 0;  in mv3310_read_status_copper()
675 		phydev->speed = SPEED_10000;  in mv3310_read_status_copper()
679 		phydev->speed = SPEED_5000;  in mv3310_read_status_copper()
683 		phydev->speed = SPEED_2500;  in mv3310_read_status_copper()
687 		phydev->speed = SPEED_1000;  in mv3310_read_status_copper()
691 		phydev->speed = SPEED_100;  in mv3310_read_status_copper()
695 		phydev->speed = SPEED_10;  in mv3310_read_status_copper()
699 	phydev->duplex = cssr1 & MV_PCS_CSSR1_DUPLEX_FULL ?  in mv3310_read_status_copper()
701 	phydev->port = PORT_TP;  in mv3310_read_status_copper()
702 	phydev->mdix = cssr1 & MV_PCS_CSSR1_MDIX ?  in mv3310_read_status_copper()
715 		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);  in mv3310_read_status_copper()
728 	phydev->speed = SPEED_UNKNOWN;  in mv3310_read_status()
729 	phydev->duplex = DUPLEX_UNKNOWN;  in mv3310_read_status()
730 	linkmode_zero(phydev->lp_advertising);  in mv3310_read_status()
731 	phydev->link = 0;  in mv3310_read_status()
732 	phydev->pause = 0;  in mv3310_read_status()
733 	phydev->asym_pause = 0;  in mv3310_read_status()
734 	phydev->mdix = ETH_TP_MDI_INVALID;  in mv3310_read_status()
747 	if (phydev->link)  in mv3310_read_status()
756 	switch (tuna->id) {  in mv3310_get_tunable()
760 		return -EOPNOTSUPP;  in mv3310_get_tunable()
767 	switch (tuna->id) {  in mv3310_set_tunable()
771 		return -EOPNOTSUPP;  in mv3310_set_tunable()
817 MODULE_DESCRIPTION("Marvell Alaska X 10Gigabit Ethernet PHY driver (MV88X3310)");