Lines Matching full:rx_ctl
136 u8 rx_ctl = 0x8c; in ax88172_set_multicast() local
139 rx_ctl |= 0x01; in ax88172_set_multicast()
142 rx_ctl |= 0x02; in ax88172_set_multicast()
165 rx_ctl |= 0x10; in ax88172_set_multicast()
168 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL); in ax88172_set_multicast()
333 /* Set RX_CTL to default values with 2k buffer, and enable cactus */ in ax88772_reset()
352 u16 rx_ctl; in ax88772_hw_reset() local
423 /* Set RX_CTL to default values with 2k buffer, and enable cactus */ in ax88772_hw_reset()
428 rx_ctl = asix_read_rx_ctl(dev, in_pm); in ax88772_hw_reset()
429 netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n", in ax88772_hw_reset()
430 rx_ctl); in ax88772_hw_reset()
432 rx_ctl = asix_read_medium_status(dev, in_pm); in ax88772_hw_reset()
435 rx_ctl); in ax88772_hw_reset()
447 u16 rx_ctl, phy14h, phy15h, phy16h; in ax88772a_hw_reset() local
548 /* Set RX_CTL to default values with 2k buffer, and enable cactus */ in ax88772a_hw_reset()
557 /* Set RX_CTL to default values with 2k buffer, and enable cactus */ in ax88772a_hw_reset()
562 rx_ctl = asix_read_rx_ctl(dev, in_pm); in ax88772a_hw_reset()
563 netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n", in ax88772a_hw_reset()
564 rx_ctl); in ax88772a_hw_reset()
566 rx_ctl = asix_read_medium_status(dev, in_pm); in ax88772a_hw_reset()
569 rx_ctl); in ax88772a_hw_reset()