Lines Matching +full:0 +full:x4400
15 #define SR_RX_DMA_ENA 0x04 /* receiver DMA enable bit */
16 #define SR_TX_DMA_ENA 0x08 /* transmitter DMA enable bit */
17 #define SR_RST 0x10 /* SRP reset */
18 #define SR_USR_INT_ENA 0x20 /* user interrupt enable bit */
19 #define SR_TX_INT_ENA 0x40 /* transmitter interrupt enable bit */
20 #define SR_RX_INT_ENA 0x80 /* receiver interrupt enable bit */
23 #define SR_USR_RQ 0x20 /* user interrupt request pending */
24 #define SR_TX_RDY 0x40 /* transmitter empty (ready) */
25 #define SR_RX_RDY 0x80 /* receiver data ready */
27 #define SR_UP_REQUEST 0x02 /* request from SRP to transfer data
29 #define SR_DOWN_REQUEST 0x01 /* SRP is able to transfer data down
31 #define SR_END_OF_TRANSFER 0x03 /* SRP signalize end of
34 #define SR_CMD_FROM_SRP_MASK 0x03 /* mask to get SRP command */
37 #define SR_RDY_RCV 0x01 /* ready to receive packet */
38 #define SR_RDY_SND 0x02 /* ready to send packet */
39 #define SR_CMD_PND 0x04 /* command pending */ /* not currently used */
42 #define SR_PKT_UP 0x01 /* transfer of packet up in progress */
43 #define SR_PKT_DOWN 0x02 /* transfer of packet down in progress */
47 #define SR_LOAD_ADDR 0x4400 /* SRP microcode load address */
48 #define SR_START_ADDR 0x4400 /* SRP microcode start address */
50 #define COSA_LOAD_ADDR 0x400 /* SRP microcode load address */
51 #define COSA_MAX_FIRMWARE_SIZE 0x10000
60 #define COSAIORSET _IO('C',0xf0)
63 #define COSAIOSTRT _IOW('C',0xf1, int)
66 #define COSAIORMEM _IOWR('C',0xf2, struct cosa_download *)
72 #define COSAIODOWNLD _IOW('C',0xf2, struct cosa_download *)
78 #define COSAIORTYPE _IOR('C',0xf3, char *)
81 #define COSAIORIDSTR _IOR('C',0xf4, char *)
86 /* #define COSAIOMINC _IO('C',0xf5) */
87 /* #define COSAIOMDEC _IO('C',0xf6) */
90 #define COSAIONRCARDS _IO('C',0xf7)
93 #define COSAIONRCHANS _IO('C',0xf8)
96 #define COSAIOBMSET _IOW('C', 0xf9, unsigned short)
98 #define COSA_BM_OFF 0 /* Bus-mastering off - use ISA DMA (default) */
102 #define COSAIOBMGET _IO('C', 0xfa)