Lines Matching +full:max +full:- +full:outbound +full:- +full:regions
1 // SPDX-License-Identifier: GPL-2.0+
7 * Author: Shawn Lin <shawn.lin@rock-chips.com>
8 * Simon Xue <xxm@rock-chips.com>
15 #include <linux/pci-epc.h>
17 #include <linux/pci-epf.h>
20 #include "pcie-rockchip.h"
23 * struct rockchip_pcie_ep - private data for PCIe endpoint controller driver
26 * @max_regions: maximum number of regions supported by hardware
27 * @ob_region_map: bitmask of mapped outbound regions
28 * @ob_addr: base addresses in the AXI bus where the outbound regions start
30 * dedicated outbound regions is mapped.
35 * dedicated outbound region.
37 * the MSI/legacy IRQ dedicated outbound region.
74 u64 sz = 1ULL << fls64(size - 1); in rockchip_pcie_prog_ep_ob_atu()
83 cpu_addr -= rockchip->mem_res->start; in rockchip_pcie_prog_ep_ob_atu()
84 addr0 = ((is_nor_msg ? 0x10 : (num_pass_bits - 1)) & in rockchip_pcie_prog_ep_ob_atu()
112 ((num_pass_bits - 1) & PCIE_CORE_OB_REGION_ADDR0_NUM_BITS) | in rockchip_pcie_prog_ep_ob_atu()
130 struct rockchip_pcie *rockchip = &ep->rockchip; in rockchip_pcie_ep_write_header()
134 u32 vid_regs = (hdr->vendorid & GENMASK(15, 0)) | in rockchip_pcie_ep_write_header()
135 (hdr->subsys_vendor_id & GENMASK(31, 16)) << 16; in rockchip_pcie_ep_write_header()
142 reg = (reg & 0xFFFF) | (hdr->deviceid << 16); in rockchip_pcie_ep_write_header()
146 hdr->revid | in rockchip_pcie_ep_write_header()
147 hdr->progif_code << 8 | in rockchip_pcie_ep_write_header()
148 hdr->subclass_code << 16 | in rockchip_pcie_ep_write_header()
149 hdr->baseclass_code << 24, in rockchip_pcie_ep_write_header()
151 rockchip_pcie_write(rockchip, hdr->cache_line_size, in rockchip_pcie_ep_write_header()
154 rockchip_pcie_write(rockchip, hdr->subsys_id << 16, in rockchip_pcie_ep_write_header()
157 rockchip_pcie_write(rockchip, hdr->interrupt_pin << 8, in rockchip_pcie_ep_write_header()
168 struct rockchip_pcie *rockchip = &ep->rockchip; in rockchip_pcie_ep_set_bar()
169 dma_addr_t bar_phys = epf_bar->phys_addr; in rockchip_pcie_ep_set_bar()
170 enum pci_barno bar = epf_bar->barno; in rockchip_pcie_ep_set_bar()
171 int flags = epf_bar->flags; in rockchip_pcie_ep_set_bar()
176 sz = max_t(size_t, epf_bar->size, MIN_EP_APERTURE); in rockchip_pcie_ep_set_bar()
182 sz = 1ULL << fls64(sz - 1); in rockchip_pcie_ep_set_bar()
183 aperture = ilog2(sz) - 7; /* 128B -> 0, 256B -> 1, 512B -> 2, ... */ in rockchip_pcie_ep_set_bar()
192 return -EINVAL; in rockchip_pcie_ep_set_bar()
211 b = bar - BAR_4; in rockchip_pcie_ep_set_bar()
236 struct rockchip_pcie *rockchip = &ep->rockchip; in rockchip_pcie_ep_clear_bar()
238 enum pci_barno bar = epf_bar->barno; in rockchip_pcie_ep_clear_bar()
245 b = bar - BAR_4; in rockchip_pcie_ep_clear_bar()
266 struct rockchip_pcie *pcie = &ep->rockchip; in rockchip_pcie_ep_map_addr()
269 r = find_first_zero_bit(&ep->ob_region_map, BITS_PER_LONG); in rockchip_pcie_ep_map_addr()
274 if (r >= ep->max_regions - 1) { in rockchip_pcie_ep_map_addr()
275 dev_err(&epc->dev, "no free outbound region\n"); in rockchip_pcie_ep_map_addr()
276 return -EINVAL; in rockchip_pcie_ep_map_addr()
282 set_bit(r, &ep->ob_region_map); in rockchip_pcie_ep_map_addr()
283 ep->ob_addr[r] = addr; in rockchip_pcie_ep_map_addr()
292 struct rockchip_pcie *rockchip = &ep->rockchip; in rockchip_pcie_ep_unmap_addr()
295 for (r = 0; r < ep->max_regions - 1; r++) in rockchip_pcie_ep_unmap_addr()
296 if (ep->ob_addr[r] == addr) in rockchip_pcie_ep_unmap_addr()
303 if (r == ep->max_regions - 1) in rockchip_pcie_ep_unmap_addr()
308 ep->ob_addr[r] = 0; in rockchip_pcie_ep_unmap_addr()
309 clear_bit(r, &ep->ob_region_map); in rockchip_pcie_ep_unmap_addr()
316 struct rockchip_pcie *rockchip = &ep->rockchip; in rockchip_pcie_ep_set_msi()
336 struct rockchip_pcie *rockchip = &ep->rockchip; in rockchip_pcie_ep_get_msi()
343 return -EINVAL; in rockchip_pcie_ep_get_msi()
352 struct rockchip_pcie *rockchip = &ep->rockchip; in rockchip_pcie_ep_assert_intx()
357 ep->irq_pending |= BIT(intx); in rockchip_pcie_ep_assert_intx()
363 ep->irq_pending &= ~BIT(intx); in rockchip_pcie_ep_assert_intx()
376 cmd = rockchip_pcie_read(&ep->rockchip, in rockchip_pcie_ep_send_legacy_irq()
381 return -EINVAL; in rockchip_pcie_ep_send_legacy_irq()
397 struct rockchip_pcie *rockchip = &ep->rockchip; in rockchip_pcie_ep_send_msi_irq()
403 flags = rockchip_pcie_read(&ep->rockchip, in rockchip_pcie_ep_send_msi_irq()
407 return -EINVAL; in rockchip_pcie_ep_send_msi_irq()
414 return -EINVAL; in rockchip_pcie_ep_send_msi_irq()
417 data_mask = msi_count - 1; in rockchip_pcie_ep_send_msi_irq()
422 data = (data & ~data_mask) | ((interrupt_num - 1) & data_mask); in rockchip_pcie_ep_send_msi_irq()
436 /* Set the outbound region if needed. */ in rockchip_pcie_ep_send_msi_irq()
437 if (unlikely(ep->irq_pci_addr != (pci_addr & ~pci_addr_mask) || in rockchip_pcie_ep_send_msi_irq()
438 ep->irq_pci_fn != fn)) { in rockchip_pcie_ep_send_msi_irq()
439 rockchip_pcie_prog_ep_ob_atu(rockchip, fn, ep->max_regions - 1, in rockchip_pcie_ep_send_msi_irq()
441 ep->irq_phys_addr, in rockchip_pcie_ep_send_msi_irq()
444 ep->irq_pci_addr = (pci_addr & ~pci_addr_mask); in rockchip_pcie_ep_send_msi_irq()
445 ep->irq_pci_fn = fn; in rockchip_pcie_ep_send_msi_irq()
448 writew(data, ep->irq_cpu_addr + (pci_addr & pci_addr_mask)); in rockchip_pcie_ep_send_msi_irq()
464 return -EINVAL; in rockchip_pcie_ep_raise_irq()
471 struct rockchip_pcie *rockchip = &ep->rockchip; in rockchip_pcie_ep_start()
476 list_for_each_entry(epf, &epc->pci_epf, list) in rockchip_pcie_ep_start()
477 cfg |= BIT(epf->func_no); in rockchip_pcie_ep_start()
513 struct device *dev = rockchip->dev; in rockchip_pcie_parse_ep_dt()
524 err = of_property_read_u32(dev->of_node, in rockchip_pcie_parse_ep_dt()
525 "rockchip,max-outbound-regions", in rockchip_pcie_parse_ep_dt()
526 &ep->max_regions); in rockchip_pcie_parse_ep_dt()
527 if (err < 0 || ep->max_regions > MAX_REGION_LIMIT) in rockchip_pcie_parse_ep_dt()
528 ep->max_regions = MAX_REGION_LIMIT; in rockchip_pcie_parse_ep_dt()
530 err = of_property_read_u8(dev->of_node, "max-functions", in rockchip_pcie_parse_ep_dt()
531 &ep->epc->max_functions); in rockchip_pcie_parse_ep_dt()
533 ep->epc->max_functions = 1; in rockchip_pcie_parse_ep_dt()
539 { .compatible = "rockchip,rk3399-pcie-ep"},
545 struct device *dev = &pdev->dev; in rockchip_pcie_ep_probe()
554 return -ENOMEM; in rockchip_pcie_ep_probe()
556 rockchip = &ep->rockchip; in rockchip_pcie_ep_probe()
557 rockchip->is_rc = false; in rockchip_pcie_ep_probe()
558 rockchip->dev = dev; in rockchip_pcie_ep_probe()
566 ep->epc = epc; in rockchip_pcie_ep_probe()
585 max_regions = ep->max_regions; in rockchip_pcie_ep_probe()
586 ep->ob_addr = devm_kcalloc(dev, max_regions, sizeof(*ep->ob_addr), in rockchip_pcie_ep_probe()
589 if (!ep->ob_addr) { in rockchip_pcie_ep_probe()
590 err = -ENOMEM; in rockchip_pcie_ep_probe()
597 err = pci_epc_mem_init(epc, rockchip->mem_res->start, in rockchip_pcie_ep_probe()
598 resource_size(rockchip->mem_res), PAGE_SIZE); in rockchip_pcie_ep_probe()
604 ep->irq_cpu_addr = pci_epc_mem_alloc_addr(epc, &ep->irq_phys_addr, in rockchip_pcie_ep_probe()
606 if (!ep->irq_cpu_addr) { in rockchip_pcie_ep_probe()
608 err = -ENOMEM; in rockchip_pcie_ep_probe()
612 ep->irq_pci_addr = ROCKCHIP_PCIE_EP_DUMMY_IRQ_ADDR; in rockchip_pcie_ep_probe()
629 .name = "rockchip-pcie-ep",