Lines Matching +full:reset +full:- +full:assert +full:- +full:ms
1 // SPDX-License-Identifier: GPL-2.0+
7 * Author: Shawn Lin <shawn.lin@rock-chips.com>
8 * Wenrui Li <wenrui.li@rock-chips.com>
21 #include <linux/reset.h>
24 #include "pcie-rockchip.h"
28 struct device *dev = rockchip->dev; in rockchip_pcie_parse_dt()
30 struct device_node *node = dev->of_node; in rockchip_pcie_parse_dt()
34 if (rockchip->is_rc) { in rockchip_pcie_parse_dt()
37 "axi-base"); in rockchip_pcie_parse_dt()
38 rockchip->reg_base = devm_pci_remap_cfg_resource(dev, regs); in rockchip_pcie_parse_dt()
39 if (IS_ERR(rockchip->reg_base)) in rockchip_pcie_parse_dt()
40 return PTR_ERR(rockchip->reg_base); in rockchip_pcie_parse_dt()
42 rockchip->mem_res = in rockchip_pcie_parse_dt()
44 "mem-base"); in rockchip_pcie_parse_dt()
45 if (!rockchip->mem_res) in rockchip_pcie_parse_dt()
46 return -EINVAL; in rockchip_pcie_parse_dt()
49 rockchip->apb_base = in rockchip_pcie_parse_dt()
50 devm_platform_ioremap_resource_byname(pdev, "apb-base"); in rockchip_pcie_parse_dt()
51 if (IS_ERR(rockchip->apb_base)) in rockchip_pcie_parse_dt()
52 return PTR_ERR(rockchip->apb_base); in rockchip_pcie_parse_dt()
58 rockchip->lanes = 1; in rockchip_pcie_parse_dt()
59 err = of_property_read_u32(node, "num-lanes", &rockchip->lanes); in rockchip_pcie_parse_dt()
60 if (!err && (rockchip->lanes == 0 || in rockchip_pcie_parse_dt()
61 rockchip->lanes == 3 || in rockchip_pcie_parse_dt()
62 rockchip->lanes > 4)) { in rockchip_pcie_parse_dt()
63 dev_warn(dev, "invalid num-lanes, default to use one lane\n"); in rockchip_pcie_parse_dt()
64 rockchip->lanes = 1; in rockchip_pcie_parse_dt()
67 rockchip->link_gen = of_pci_get_max_link_speed(node); in rockchip_pcie_parse_dt()
68 if (rockchip->link_gen < 0 || rockchip->link_gen > 2) in rockchip_pcie_parse_dt()
69 rockchip->link_gen = 2; in rockchip_pcie_parse_dt()
71 rockchip->core_rst = devm_reset_control_get_exclusive(dev, "core"); in rockchip_pcie_parse_dt()
72 if (IS_ERR(rockchip->core_rst)) { in rockchip_pcie_parse_dt()
73 if (PTR_ERR(rockchip->core_rst) != -EPROBE_DEFER) in rockchip_pcie_parse_dt()
74 dev_err(dev, "missing core reset property in node\n"); in rockchip_pcie_parse_dt()
75 return PTR_ERR(rockchip->core_rst); in rockchip_pcie_parse_dt()
78 rockchip->mgmt_rst = devm_reset_control_get_exclusive(dev, "mgmt"); in rockchip_pcie_parse_dt()
79 if (IS_ERR(rockchip->mgmt_rst)) { in rockchip_pcie_parse_dt()
80 if (PTR_ERR(rockchip->mgmt_rst) != -EPROBE_DEFER) in rockchip_pcie_parse_dt()
81 dev_err(dev, "missing mgmt reset property in node\n"); in rockchip_pcie_parse_dt()
82 return PTR_ERR(rockchip->mgmt_rst); in rockchip_pcie_parse_dt()
85 rockchip->mgmt_sticky_rst = devm_reset_control_get_exclusive(dev, in rockchip_pcie_parse_dt()
86 "mgmt-sticky"); in rockchip_pcie_parse_dt()
87 if (IS_ERR(rockchip->mgmt_sticky_rst)) { in rockchip_pcie_parse_dt()
88 if (PTR_ERR(rockchip->mgmt_sticky_rst) != -EPROBE_DEFER) in rockchip_pcie_parse_dt()
89 dev_err(dev, "missing mgmt-sticky reset property in node\n"); in rockchip_pcie_parse_dt()
90 return PTR_ERR(rockchip->mgmt_sticky_rst); in rockchip_pcie_parse_dt()
93 rockchip->pipe_rst = devm_reset_control_get_exclusive(dev, "pipe"); in rockchip_pcie_parse_dt()
94 if (IS_ERR(rockchip->pipe_rst)) { in rockchip_pcie_parse_dt()
95 if (PTR_ERR(rockchip->pipe_rst) != -EPROBE_DEFER) in rockchip_pcie_parse_dt()
96 dev_err(dev, "missing pipe reset property in node\n"); in rockchip_pcie_parse_dt()
97 return PTR_ERR(rockchip->pipe_rst); in rockchip_pcie_parse_dt()
100 rockchip->pm_rst = devm_reset_control_get_exclusive(dev, "pm"); in rockchip_pcie_parse_dt()
101 if (IS_ERR(rockchip->pm_rst)) { in rockchip_pcie_parse_dt()
102 if (PTR_ERR(rockchip->pm_rst) != -EPROBE_DEFER) in rockchip_pcie_parse_dt()
103 dev_err(dev, "missing pm reset property in node\n"); in rockchip_pcie_parse_dt()
104 return PTR_ERR(rockchip->pm_rst); in rockchip_pcie_parse_dt()
107 rockchip->pclk_rst = devm_reset_control_get_exclusive(dev, "pclk"); in rockchip_pcie_parse_dt()
108 if (IS_ERR(rockchip->pclk_rst)) { in rockchip_pcie_parse_dt()
109 if (PTR_ERR(rockchip->pclk_rst) != -EPROBE_DEFER) in rockchip_pcie_parse_dt()
110 dev_err(dev, "missing pclk reset property in node\n"); in rockchip_pcie_parse_dt()
111 return PTR_ERR(rockchip->pclk_rst); in rockchip_pcie_parse_dt()
114 rockchip->aclk_rst = devm_reset_control_get_exclusive(dev, "aclk"); in rockchip_pcie_parse_dt()
115 if (IS_ERR(rockchip->aclk_rst)) { in rockchip_pcie_parse_dt()
116 if (PTR_ERR(rockchip->aclk_rst) != -EPROBE_DEFER) in rockchip_pcie_parse_dt()
117 dev_err(dev, "missing aclk reset property in node\n"); in rockchip_pcie_parse_dt()
118 return PTR_ERR(rockchip->aclk_rst); in rockchip_pcie_parse_dt()
121 if (rockchip->is_rc) { in rockchip_pcie_parse_dt()
122 rockchip->ep_gpio = devm_gpiod_get_optional(dev, "ep", in rockchip_pcie_parse_dt()
124 if (IS_ERR(rockchip->ep_gpio)) in rockchip_pcie_parse_dt()
125 return dev_err_probe(dev, PTR_ERR(rockchip->ep_gpio), in rockchip_pcie_parse_dt()
129 rockchip->aclk_pcie = devm_clk_get(dev, "aclk"); in rockchip_pcie_parse_dt()
130 if (IS_ERR(rockchip->aclk_pcie)) { in rockchip_pcie_parse_dt()
132 return PTR_ERR(rockchip->aclk_pcie); in rockchip_pcie_parse_dt()
135 rockchip->aclk_perf_pcie = devm_clk_get(dev, "aclk-perf"); in rockchip_pcie_parse_dt()
136 if (IS_ERR(rockchip->aclk_perf_pcie)) { in rockchip_pcie_parse_dt()
138 return PTR_ERR(rockchip->aclk_perf_pcie); in rockchip_pcie_parse_dt()
141 rockchip->hclk_pcie = devm_clk_get(dev, "hclk"); in rockchip_pcie_parse_dt()
142 if (IS_ERR(rockchip->hclk_pcie)) { in rockchip_pcie_parse_dt()
144 return PTR_ERR(rockchip->hclk_pcie); in rockchip_pcie_parse_dt()
147 rockchip->clk_pcie_pm = devm_clk_get(dev, "pm"); in rockchip_pcie_parse_dt()
148 if (IS_ERR(rockchip->clk_pcie_pm)) { in rockchip_pcie_parse_dt()
150 return PTR_ERR(rockchip->clk_pcie_pm); in rockchip_pcie_parse_dt()
158 /* 100 ms max wait time for PHY PLLs to lock */
160 /* Sleep should be less than 20ms */
165 struct device *dev = rockchip->dev; in rockchip_pcie_init_port()
169 err = reset_control_assert(rockchip->aclk_rst); in rockchip_pcie_init_port()
171 dev_err(dev, "assert aclk_rst err %d\n", err); in rockchip_pcie_init_port()
175 err = reset_control_assert(rockchip->pclk_rst); in rockchip_pcie_init_port()
177 dev_err(dev, "assert pclk_rst err %d\n", err); in rockchip_pcie_init_port()
181 err = reset_control_assert(rockchip->pm_rst); in rockchip_pcie_init_port()
183 dev_err(dev, "assert pm_rst err %d\n", err); in rockchip_pcie_init_port()
188 err = phy_init(rockchip->phys[i]); in rockchip_pcie_init_port()
195 err = reset_control_assert(rockchip->core_rst); in rockchip_pcie_init_port()
197 dev_err(dev, "assert core_rst err %d\n", err); in rockchip_pcie_init_port()
201 err = reset_control_assert(rockchip->mgmt_rst); in rockchip_pcie_init_port()
203 dev_err(dev, "assert mgmt_rst err %d\n", err); in rockchip_pcie_init_port()
207 err = reset_control_assert(rockchip->mgmt_sticky_rst); in rockchip_pcie_init_port()
209 dev_err(dev, "assert mgmt_sticky_rst err %d\n", err); in rockchip_pcie_init_port()
213 err = reset_control_assert(rockchip->pipe_rst); in rockchip_pcie_init_port()
215 dev_err(dev, "assert pipe_rst err %d\n", err); in rockchip_pcie_init_port()
221 err = reset_control_deassert(rockchip->pm_rst); in rockchip_pcie_init_port()
227 err = reset_control_deassert(rockchip->aclk_rst); in rockchip_pcie_init_port()
233 err = reset_control_deassert(rockchip->pclk_rst); in rockchip_pcie_init_port()
239 if (rockchip->link_gen == 2) in rockchip_pcie_init_port()
247 PCIE_CLIENT_CONF_LANE_NUM(rockchip->lanes); in rockchip_pcie_init_port()
249 if (rockchip->is_rc) in rockchip_pcie_init_port()
257 err = phy_power_on(rockchip->phys[i]); in rockchip_pcie_init_port()
276 * four reset pins. in rockchip_pcie_init_port()
278 err = reset_control_deassert(rockchip->mgmt_sticky_rst); in rockchip_pcie_init_port()
284 err = reset_control_deassert(rockchip->core_rst); in rockchip_pcie_init_port()
290 err = reset_control_deassert(rockchip->mgmt_rst); in rockchip_pcie_init_port()
296 err = reset_control_deassert(rockchip->pipe_rst); in rockchip_pcie_init_port()
304 while (i--) in rockchip_pcie_init_port()
305 phy_power_off(rockchip->phys[i]); in rockchip_pcie_init_port()
308 while (i--) in rockchip_pcie_init_port()
309 phy_exit(rockchip->phys[i]); in rockchip_pcie_init_port()
316 struct device *dev = rockchip->dev; in rockchip_pcie_get_phys()
321 phy = devm_phy_get(dev, "pcie-phy"); in rockchip_pcie_get_phys()
323 rockchip->legacy_phy = true; in rockchip_pcie_get_phys()
324 rockchip->phys[0] = phy; in rockchip_pcie_get_phys()
329 if (PTR_ERR(phy) == -EPROBE_DEFER) in rockchip_pcie_get_phys()
332 dev_dbg(dev, "missing legacy phy; search for per-lane PHY\n"); in rockchip_pcie_get_phys()
335 name = kasprintf(GFP_KERNEL, "pcie-phy-%u", i); in rockchip_pcie_get_phys()
337 return -ENOMEM; in rockchip_pcie_get_phys()
339 phy = devm_of_phy_get(dev, dev->of_node, name); in rockchip_pcie_get_phys()
343 if (PTR_ERR(phy) != -EPROBE_DEFER) in rockchip_pcie_get_phys()
349 rockchip->phys[i] = phy; in rockchip_pcie_get_phys()
362 if (rockchip->lanes_map & BIT(i)) in rockchip_pcie_deinit_phys()
363 phy_power_off(rockchip->phys[i]); in rockchip_pcie_deinit_phys()
364 phy_exit(rockchip->phys[i]); in rockchip_pcie_deinit_phys()
371 struct device *dev = rockchip->dev; in rockchip_pcie_enable_clocks()
374 err = clk_prepare_enable(rockchip->aclk_pcie); in rockchip_pcie_enable_clocks()
380 err = clk_prepare_enable(rockchip->aclk_perf_pcie); in rockchip_pcie_enable_clocks()
386 err = clk_prepare_enable(rockchip->hclk_pcie); in rockchip_pcie_enable_clocks()
392 err = clk_prepare_enable(rockchip->clk_pcie_pm); in rockchip_pcie_enable_clocks()
401 clk_disable_unprepare(rockchip->hclk_pcie); in rockchip_pcie_enable_clocks()
403 clk_disable_unprepare(rockchip->aclk_perf_pcie); in rockchip_pcie_enable_clocks()
405 clk_disable_unprepare(rockchip->aclk_pcie); in rockchip_pcie_enable_clocks()
414 clk_disable_unprepare(rockchip->clk_pcie_pm); in rockchip_pcie_disable_clocks()
415 clk_disable_unprepare(rockchip->hclk_pcie); in rockchip_pcie_disable_clocks()
416 clk_disable_unprepare(rockchip->aclk_perf_pcie); in rockchip_pcie_disable_clocks()
417 clk_disable_unprepare(rockchip->aclk_pcie); in rockchip_pcie_disable_clocks()