Lines Matching +full:integer +full:- +full:n
1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/pci-acpi.h>
33 struct device *dev = &adev->dev; in acpi_get_rc_addr()
45 dev_err(dev, "failed to parse _CRS method, error code %d\n", in acpi_get_rc_addr()
51 dev_err(dev, "no IO and memory resources present in _CRS\n"); in acpi_get_rc_addr()
52 return -EINVAL; in acpi_get_rc_addr()
56 *res = *entry->res; in acpi_get_rc_addr()
86 dev_err(dev, "can't find _HID %s device to locate resources\n", in acpi_get_rc_resources()
88 return -ENODEV; in acpi_get_rc_resources()
97 dev_err(dev, "can't get resource from %s\n", in acpi_get_rc_resources()
98 dev_name(&adev->dev)); in acpi_get_rc_resources()
144 if (hpx->revision > 1) { in program_hpx_type0()
145 pci_warn(dev, "PCI settings rev %d not supported; using defaults\n", in program_hpx_type0()
146 hpx->revision); in program_hpx_type0()
150 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, hpx->cache_line_size); in program_hpx_type0()
151 pci_write_config_byte(dev, PCI_LATENCY_TIMER, hpx->latency_timer); in program_hpx_type0()
153 if (hpx->enable_serr) in program_hpx_type0()
155 if (hpx->enable_perr) in program_hpx_type0()
160 if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) { in program_hpx_type0()
162 hpx->latency_timer); in program_hpx_type0()
164 if (hpx->enable_perr) in program_hpx_type0()
174 union acpi_object *fields = record->package.elements; in decode_type0_hpx_record()
175 u32 revision = fields[1].integer.value; in decode_type0_hpx_record()
179 if (record->package.count != 6) in decode_type0_hpx_record()
184 hpx0->revision = revision; in decode_type0_hpx_record()
185 hpx0->cache_line_size = fields[2].integer.value; in decode_type0_hpx_record()
186 hpx0->latency_timer = fields[3].integer.value; in decode_type0_hpx_record()
187 hpx0->enable_serr = fields[4].integer.value; in decode_type0_hpx_record()
188 hpx0->enable_perr = fields[5].integer.value; in decode_type0_hpx_record()
191 pr_warn("%s: Type 0 Revision %d record not supported\n", in decode_type0_hpx_record()
198 /* _HPX PCI-X Setting Record (Type 1) */
217 pci_warn(dev, "PCI-X settings not supported\n"); in program_hpx_type1()
224 union acpi_object *fields = record->package.elements; in decode_type1_hpx_record()
225 u32 revision = fields[1].integer.value; in decode_type1_hpx_record()
229 if (record->package.count != 5) in decode_type1_hpx_record()
234 hpx1->revision = revision; in decode_type1_hpx_record()
235 hpx1->max_mem_read = fields[2].integer.value; in decode_type1_hpx_record()
236 hpx1->avg_max_split = fields[3].integer.value; in decode_type1_hpx_record()
237 hpx1->tot_max_split = fields[4].integer.value; in decode_type1_hpx_record()
240 pr_warn("%s: Type 1 Revision %d record not supported\n", in decode_type1_hpx_record()
294 if (hpx->revision > 1) { in program_hpx_type2()
295 pci_warn(dev, "PCIe settings rev %d not supported\n", in program_hpx_type2()
296 hpx->revision); in program_hpx_type2()
305 hpx->pci_exp_devctl_and |= PCI_EXP_DEVCTL_PAYLOAD | in program_hpx_type2()
307 hpx->pci_exp_devctl_or &= ~(PCI_EXP_DEVCTL_PAYLOAD | in program_hpx_type2()
312 ~hpx->pci_exp_devctl_and, hpx->pci_exp_devctl_or); in program_hpx_type2()
321 hpx->pci_exp_lnkctl_and |= PCI_EXP_LNKCTL_RCB; in program_hpx_type2()
322 hpx->pci_exp_lnkctl_or &= ~PCI_EXP_LNKCTL_RCB; in program_hpx_type2()
324 hpx->pci_exp_lnkctl_or |= PCI_EXP_LNKCTL_RCB; in program_hpx_type2()
327 ~hpx->pci_exp_lnkctl_and, hpx->pci_exp_lnkctl_or); in program_hpx_type2()
337 reg32 = (reg32 & hpx->unc_err_mask_and) | hpx->unc_err_mask_or; in program_hpx_type2()
342 reg32 = (reg32 & hpx->unc_err_sever_and) | hpx->unc_err_sever_or; in program_hpx_type2()
347 reg32 = (reg32 & hpx->cor_err_mask_and) | hpx->cor_err_mask_or; in program_hpx_type2()
352 reg32 = (reg32 & hpx->adv_err_cap_and) | hpx->adv_err_cap_or; in program_hpx_type2()
373 union acpi_object *fields = record->package.elements; in decode_type2_hpx_record()
374 u32 revision = fields[1].integer.value; in decode_type2_hpx_record()
378 if (record->package.count != 18) in decode_type2_hpx_record()
383 hpx2->revision = revision; in decode_type2_hpx_record()
384 hpx2->unc_err_mask_and = fields[2].integer.value; in decode_type2_hpx_record()
385 hpx2->unc_err_mask_or = fields[3].integer.value; in decode_type2_hpx_record()
386 hpx2->unc_err_sever_and = fields[4].integer.value; in decode_type2_hpx_record()
387 hpx2->unc_err_sever_or = fields[5].integer.value; in decode_type2_hpx_record()
388 hpx2->cor_err_mask_and = fields[6].integer.value; in decode_type2_hpx_record()
389 hpx2->cor_err_mask_or = fields[7].integer.value; in decode_type2_hpx_record()
390 hpx2->adv_err_cap_and = fields[8].integer.value; in decode_type2_hpx_record()
391 hpx2->adv_err_cap_or = fields[9].integer.value; in decode_type2_hpx_record()
392 hpx2->pci_exp_devctl_and = fields[10].integer.value; in decode_type2_hpx_record()
393 hpx2->pci_exp_devctl_or = fields[11].integer.value; in decode_type2_hpx_record()
394 hpx2->pci_exp_lnkctl_and = fields[12].integer.value; in decode_type2_hpx_record()
395 hpx2->pci_exp_lnkctl_or = fields[13].integer.value; in decode_type2_hpx_record()
396 hpx2->sec_unc_err_sever_and = fields[14].integer.value; in decode_type2_hpx_record()
397 hpx2->sec_unc_err_sever_or = fields[15].integer.value; in decode_type2_hpx_record()
398 hpx2->sec_unc_err_mask_and = fields[16].integer.value; in decode_type2_hpx_record()
399 hpx2->sec_unc_err_mask_or = fields[17].integer.value; in decode_type2_hpx_record()
402 pr_warn("%s: Type 2 Revision %d record not supported\n", in decode_type2_hpx_record()
468 if (dev->is_virtfn) in hpx3_function_type()
503 if (!(hpx3_device_type(dev) & reg->device_type)) in program_hpx_type3_register()
506 if (!(hpx3_function_type(dev) & reg->function_type)) in program_hpx_type3_register()
509 switch (reg->config_space_location) { in program_hpx_type3_register()
514 pos = pci_find_capability(dev, reg->pci_exp_cap_id); in program_hpx_type3_register()
520 pos = pci_find_ext_capability(dev, reg->pci_exp_cap_id); in program_hpx_type3_register()
526 reg->pci_exp_cap_ver)) in program_hpx_type3_register()
537 pci_read_config_dword(dev, pos + reg->match_offset, &match_reg); in program_hpx_type3_register()
539 if ((match_reg & reg->match_mask_and) != reg->match_value) in program_hpx_type3_register()
542 pci_read_config_dword(dev, pos + reg->reg_offset, &write_reg); in program_hpx_type3_register()
544 write_reg &= reg->reg_mask_and; in program_hpx_type3_register()
545 write_reg |= reg->reg_mask_or; in program_hpx_type3_register()
550 pci_write_config_dword(dev, pos + reg->reg_offset, write_reg); in program_hpx_type3_register()
552 pci_dbg(dev, "Applied _HPX3 at [0x%x]: 0x%08x -> 0x%08x", in program_hpx_type3_register()
570 hpx3_reg->device_type = reg_fields[0].integer.value; in parse_hpx3_register()
571 hpx3_reg->function_type = reg_fields[1].integer.value; in parse_hpx3_register()
572 hpx3_reg->config_space_location = reg_fields[2].integer.value; in parse_hpx3_register()
573 hpx3_reg->pci_exp_cap_id = reg_fields[3].integer.value; in parse_hpx3_register()
574 hpx3_reg->pci_exp_cap_ver = reg_fields[4].integer.value; in parse_hpx3_register()
575 hpx3_reg->pci_exp_vendor_id = reg_fields[5].integer.value; in parse_hpx3_register()
576 hpx3_reg->dvsec_id = reg_fields[6].integer.value; in parse_hpx3_register()
577 hpx3_reg->dvsec_rev = reg_fields[7].integer.value; in parse_hpx3_register()
578 hpx3_reg->match_offset = reg_fields[8].integer.value; in parse_hpx3_register()
579 hpx3_reg->match_mask_and = reg_fields[9].integer.value; in parse_hpx3_register()
580 hpx3_reg->match_value = reg_fields[10].integer.value; in parse_hpx3_register()
581 hpx3_reg->reg_offset = reg_fields[11].integer.value; in parse_hpx3_register()
582 hpx3_reg->reg_mask_and = reg_fields[12].integer.value; in parse_hpx3_register()
583 hpx3_reg->reg_mask_or = reg_fields[13].integer.value; in parse_hpx3_register()
589 union acpi_object *fields = record->package.elements; in program_type3_hpx_record()
595 revision = fields[1].integer.value; in program_type3_hpx_record()
598 desc_count = fields[2].integer.value; in program_type3_hpx_record()
601 if (record->package.count != expected_length) in program_type3_hpx_record()
617 "%s: Type 3 Revision %d record not supported\n", in program_type3_hpx_record()
640 if (package->type != ACPI_TYPE_PACKAGE) { in acpi_run_hpx()
645 for (i = 0; i < package->package.count; i++) { in acpi_run_hpx()
646 record = &package->package.elements[i]; in acpi_run_hpx()
647 if (record->type != ACPI_TYPE_PACKAGE) { in acpi_run_hpx()
652 fields = record->package.elements; in acpi_run_hpx()
659 type = fields[0].integer.value; in acpi_run_hpx()
688 pr_err("%s: Type %d record not supported\n", in acpi_run_hpx()
714 if (package->type != ACPI_TYPE_PACKAGE || in acpi_run_hpp()
715 package->package.count != 4) { in acpi_run_hpp()
720 fields = package->package.elements; in acpi_run_hpp()
729 hpx0.cache_line_size = fields[0].integer.value; in acpi_run_hpp()
730 hpx0.latency_timer = fields[1].integer.value; in acpi_run_hpp()
731 hpx0.enable_serr = fields[2].integer.value; in acpi_run_hpp()
732 hpx0.enable_perr = fields[3].integer.value; in acpi_run_hpp()
743 * @dev - the pci_dev for which we want parameters
752 return -ENODEV; in pci_acpi_program_hp_params()
755 for (pbus = dev->bus; pbus; pbus = pbus->parent) { in pci_acpi_program_hp_params()
781 return -ENODEV; in pci_acpi_program_hp_params()
785 * pciehp_is_native - Check whether a hotplug port is handled by the OS
806 host = pci_find_host_bridge(bridge->bus); in pciehp_is_native()
807 return host->native_pcie_hotplug; in pciehp_is_native()
811 * shpchp_is_native - Check whether a hotplug port is handled by the OS
819 return bridge->shpc_managed; in shpchp_is_native()
823 * pci_acpi_wake_bus - Root bus wakeup notification fork function.
833 pci_pme_wakeup_bus(root->bus); in pci_acpi_wake_bus()
837 * pci_acpi_wake_dev - PCI device wakeup notification work function.
844 pci_dev = to_pci_dev(context->dev); in pci_acpi_wake_dev()
846 if (pci_dev->pme_poll) in pci_acpi_wake_dev()
847 pci_dev->pme_poll = false; in pci_acpi_wake_dev()
849 if (pci_dev->current_state == PCI_D3cold) { in pci_acpi_wake_dev()
851 pm_request_resume(&pci_dev->dev); in pci_acpi_wake_dev()
856 if (pci_dev->pme_support) in pci_acpi_wake_dev()
860 pm_request_resume(&pci_dev->dev); in pci_acpi_wake_dev()
862 pci_pme_wakeup_bus(pci_dev->subordinate); in pci_acpi_wake_dev()
866 * pci_acpi_add_bus_pm_notifier - Register PM notifier for root PCI bus.
875 * pci_acpi_add_pm_notifier - Register PM notifier for given PCI device.
882 return acpi_add_pm_notifier(dev, &pci_dev->dev, pci_acpi_wake_dev); in pci_acpi_add_pm_notifier()
886 * _SxD returns the D-state with the highest power
887 * (lowest D-state number) supported in the S-state "x".
892 * D-state) than the return value from _SxD.
894 * But if _PRW is enabled at S-state "x", the OS
895 * must not choose a power lower than _SxD --
897 * the lowest power (highest D-state number) the device
902 * if (_PRW at S-state x)
904 * else // no _PRW at S-state x
912 if (pdev->no_d3cold || !pdev->d3cold_allowed) in acpi_pci_choose_state()
916 acpi_state = acpi_pm_device_sleep_state(&pdev->dev, NULL, d_max); in acpi_pci_choose_state()
944 if (!dev->is_hotplug_bridge) in acpi_pci_bridge_d3()
947 /* Assume D3 support if the bridge is power-manageable by ACPI. */ in acpi_pci_bridge_d3()
948 adev = ACPI_COMPANION(&dev->dev); in acpi_pci_bridge_d3()
950 adev = acpi_pci_find_companion(&dev->dev); in acpi_pci_bridge_d3()
951 ACPI_COMPANION_SET(&dev->dev, adev); in acpi_pci_bridge_d3()
965 adev = ACPI_COMPANION(&root->dev); in acpi_pci_bridge_d3()
972 adev = acpi_pci_find_companion(&root->dev); in acpi_pci_bridge_d3()
987 struct acpi_device *adev = ACPI_COMPANION(&dev->dev); in acpi_pci_power_manageable()
993 struct acpi_device *adev = ACPI_COMPANION(&dev->dev); in acpi_pci_set_power_state()
1001 int error = -EINVAL; in acpi_pci_set_power_state()
1004 if (!adev || acpi_has_method(adev->handle, "_EJ0")) in acpi_pci_set_power_state()
1005 return -ENODEV; in acpi_pci_set_power_state()
1009 if (dev_pm_qos_flags(&dev->dev, PM_QOS_FLAG_NO_POWER_OFF) == in acpi_pci_set_power_state()
1011 error = -EBUSY; in acpi_pci_set_power_state()
1023 pci_dbg(dev, "power state changed by ACPI to %s\n", in acpi_pci_set_power_state()
1031 struct acpi_device *adev = ACPI_COMPANION(&dev->dev); in acpi_pci_get_power_state()
1044 state = adev->power.state; in acpi_pci_get_power_state()
1053 struct acpi_device *adev = ACPI_COMPANION(&dev->dev); in acpi_pci_refresh_power_state()
1061 while (bus->parent) { in acpi_pci_propagate_wakeup()
1062 if (acpi_pm_device_can_wakeup(&bus->self->dev)) in acpi_pci_propagate_wakeup()
1063 return acpi_pm_set_device_wakeup(&bus->self->dev, enable); in acpi_pci_propagate_wakeup()
1065 bus = bus->parent; in acpi_pci_propagate_wakeup()
1069 if (bus->bridge) { in acpi_pci_propagate_wakeup()
1070 if (acpi_pm_device_can_wakeup(bus->bridge)) in acpi_pci_propagate_wakeup()
1071 return acpi_pm_set_device_wakeup(bus->bridge, enable); in acpi_pci_propagate_wakeup()
1078 if (acpi_pm_device_can_wakeup(&dev->dev)) in acpi_pci_wakeup()
1079 return acpi_pm_set_device_wakeup(&dev->dev, enable); in acpi_pci_wakeup()
1081 return acpi_pci_propagate_wakeup(dev->bus, enable); in acpi_pci_wakeup()
1086 struct acpi_device *adev = ACPI_COMPANION(&dev->dev); in acpi_pci_need_resume()
1090 * system-wide suspend/resume confuses the platform firmware, so avoid in acpi_pci_need_resume()
1101 if (adev->wakeup.flags.valid && in acpi_pci_need_resume()
1102 device_may_wakeup(&dev->dev) != !!adev->wakeup.prepare_count) in acpi_pci_need_resume()
1108 return !!adev->power.flags.dsw_present; in acpi_pci_need_resume()
1127 if (acpi_pci_disabled || !bus->bridge || !ACPI_HANDLE(bus->bridge)) in acpi_pci_add_bus()
1140 obj = acpi_evaluate_dsm(ACPI_HANDLE(bus->bridge), &pci_acpi_dsm_guid, 3, in acpi_pci_add_bus()
1145 if (obj->type == ACPI_TYPE_INTEGER && obj->integer.value == 1) { in acpi_pci_add_bus()
1147 bridge->ignore_reset_delay = 1; in acpi_pci_add_bus()
1154 if (acpi_pci_disabled || !bus->bridge) in acpi_pci_remove_bus()
1170 addr = (PCI_SLOT(pci_dev->devfn) << 16) | PCI_FUNC(pci_dev->devfn); in acpi_pci_find_companion()
1171 return acpi_find_child_device(ACPI_COMPANION(dev->parent), addr, in acpi_pci_find_companion()
1176 * pci_acpi_optimize_delay - optimize PCI D3 and D3cold delay from ACPI
1185 * the hierarchy have already completed power-on reset delays.
1198 struct pci_host_bridge *bridge = pci_find_host_bridge(pdev->bus); in pci_acpi_optimize_delay()
1202 if (bridge->ignore_reset_delay) in pci_acpi_optimize_delay()
1203 pdev->d3cold_delay = 0; in pci_acpi_optimize_delay()
1210 if (obj->type == ACPI_TYPE_PACKAGE && obj->package.count == 5) { in pci_acpi_optimize_delay()
1211 elements = obj->package.elements; in pci_acpi_optimize_delay()
1213 value = (int)elements[0].integer.value / 1000; in pci_acpi_optimize_delay()
1215 pdev->d3cold_delay = value; in pci_acpi_optimize_delay()
1218 value = (int)elements[3].integer.value / 1000; in pci_acpi_optimize_delay()
1220 pdev->d3hot_delay = value; in pci_acpi_optimize_delay()
1232 if (device_property_read_u8(&dev->dev, "ExternalFacingPort", &val)) in pci_acpi_set_external_facing()
1240 dev->external_facing = 1; in pci_acpi_set_external_facing()
1251 pci_acpi_optimize_delay(pci_dev, adev->handle); in pci_acpi_setup()
1256 if (!adev->wakeup.flags.valid) in pci_acpi_setup()
1266 if (pci_dev->bridge_d3) in pci_acpi_setup()
1283 if (adev->wakeup.flags.valid) { in pci_acpi_cleanup()
1285 if (pci_dev->bridge_d3) in pci_acpi_cleanup()
1309 * pci_msi_register_fwnode_provider - Register callback to retrieve fwnode
1323 * pci_host_bridge_acpi_msi_domain - Retrieve MSI domain of a PCI host bridge
1338 fwnode = pci_msi_get_fwnode_cb(&bus->dev); in pci_host_bridge_acpi_msi_domain()
1350 pr_info("ACPI FADT declares the system doesn't support MSI, so disable it\n"); in acpi_pci_init()
1355 pr_info("ACPI FADT declares the system doesn't support PCIe ASPM, so disable it\n"); in acpi_pci_init()