1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/clk.h>
14 #include <linux/phy/phy.h>
63 	"vdda-pll", "vdda33", "vdda18",
69  * struct qcom_snps_hsphy - snps hs phy attributes
73  * @phy: generic phy
74  * @base: iomapped memory space for snps hs phy
78  * @phy_reset: phy reset control
80  * @phy_initialized: if PHY has been initialized correctly
81  * @mode: contains the current mode the PHY is in
82  * @update_seq_cfg: tuning parameters for phy init
87 	struct phy *phy;  member
101 	struct device *dev = hsphy->dev;  in qcom_snps_hsphy_clk_init()
103 	hsphy->num_clks = 2;  in qcom_snps_hsphy_clk_init()
104 	hsphy->clks = devm_kcalloc(dev, hsphy->num_clks, sizeof(*hsphy->clks), GFP_KERNEL);  in qcom_snps_hsphy_clk_init()
105 	if (!hsphy->clks)  in qcom_snps_hsphy_clk_init()
106 		return -ENOMEM;  in qcom_snps_hsphy_clk_init()
109 	 * TODO: Currently no device tree instantiation of the PHY is using the clock.  in qcom_snps_hsphy_clk_init()
112 	hsphy->clks[0].id = "cfg_ahb";  in qcom_snps_hsphy_clk_init()
113 	hsphy->clks[0].clk = devm_clk_get_optional(dev, "cfg_ahb");  in qcom_snps_hsphy_clk_init()
114 	if (IS_ERR(hsphy->clks[0].clk))  in qcom_snps_hsphy_clk_init()
115 		return dev_err_probe(dev, PTR_ERR(hsphy->clks[0].clk),  in qcom_snps_hsphy_clk_init()
116 				     "failed to get cfg_ahb clk\n");  in qcom_snps_hsphy_clk_init()
118 	hsphy->clks[1].id = "ref";  in qcom_snps_hsphy_clk_init()
119 	hsphy->clks[1].clk = devm_clk_get(dev, "ref");  in qcom_snps_hsphy_clk_init()
120 	if (IS_ERR(hsphy->clks[1].clk))  in qcom_snps_hsphy_clk_init()
121 		return dev_err_probe(dev, PTR_ERR(hsphy->clks[1].clk),  in qcom_snps_hsphy_clk_init()
122 				     "failed to get ref clk\n");  in qcom_snps_hsphy_clk_init()
143 	dev_dbg(&hsphy->phy->dev, "Suspend QCOM SNPS PHY\n");  in qcom_snps_hsphy_suspend()
145 	if (hsphy->mode == PHY_MODE_USB_HOST) {  in qcom_snps_hsphy_suspend()
146 		/* Enable auto-resume to meet remote wakeup timing */  in qcom_snps_hsphy_suspend()
147 		qcom_snps_hsphy_write_mask(hsphy->base,  in qcom_snps_hsphy_suspend()
152 		qcom_snps_hsphy_write_mask(hsphy->base,  in qcom_snps_hsphy_suspend()
162 	dev_dbg(&hsphy->phy->dev, "Resume QCOM SNPS PHY, mode\n");  in qcom_snps_hsphy_resume()
171 	if (!hsphy->phy_initialized)  in qcom_snps_hsphy_runtime_suspend()
181 	if (!hsphy->phy_initialized)  in qcom_snps_hsphy_runtime_resume()
187 static int qcom_snps_hsphy_set_mode(struct phy *phy, enum phy_mode mode,  in qcom_snps_hsphy_set_mode()  argument
190 	struct qcom_snps_hsphy *hsphy = phy_get_drvdata(phy);  in qcom_snps_hsphy_set_mode()
192 	hsphy->mode = mode;  in qcom_snps_hsphy_set_mode()
196 static int qcom_snps_hsphy_init(struct phy *phy)  in qcom_snps_hsphy_init()  argument
198 	struct qcom_snps_hsphy *hsphy = phy_get_drvdata(phy);  in qcom_snps_hsphy_init()
201 	dev_vdbg(&phy->dev, "%s(): Initializing SNPS HS phy\n", __func__);  in qcom_snps_hsphy_init()
203 	ret = regulator_bulk_enable(ARRAY_SIZE(hsphy->vregs), hsphy->vregs);  in qcom_snps_hsphy_init()
207 	ret = clk_bulk_prepare_enable(hsphy->num_clks, hsphy->clks);  in qcom_snps_hsphy_init()
209 		dev_err(&phy->dev, "failed to enable clocks, %d\n", ret);  in qcom_snps_hsphy_init()
213 	ret = reset_control_assert(hsphy->phy_reset);  in qcom_snps_hsphy_init()
215 		dev_err(&phy->dev, "failed to assert phy_reset, %d\n", ret);  in qcom_snps_hsphy_init()
221 	ret = reset_control_deassert(hsphy->phy_reset);  in qcom_snps_hsphy_init()
223 		dev_err(&phy->dev, "failed to de-assert phy_reset, %d\n", ret);  in qcom_snps_hsphy_init()
227 	qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_CFG0,  in qcom_snps_hsphy_init()
230 	qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_UTMI_CTRL5,  in qcom_snps_hsphy_init()
232 	qcom_snps_hsphy_write_mask(hsphy->base,  in qcom_snps_hsphy_init()
235 	qcom_snps_hsphy_write_mask(hsphy->base,  in qcom_snps_hsphy_init()
238 	qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_REFCLK_CTRL,  in qcom_snps_hsphy_init()
240 	qcom_snps_hsphy_write_mask(hsphy->base,  in qcom_snps_hsphy_init()
243 	qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_HS_PHY_CTRL1,  in qcom_snps_hsphy_init()
246 	qcom_snps_hsphy_write_mask(hsphy->base,  in qcom_snps_hsphy_init()
250 	qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_HS_PHY_CTRL2,  in qcom_snps_hsphy_init()
254 	qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_UTMI_CTRL0,  in qcom_snps_hsphy_init()
257 	qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_UTMI_CTRL5,  in qcom_snps_hsphy_init()
260 	qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_HS_PHY_CTRL2,  in qcom_snps_hsphy_init()
263 	qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_CFG0,  in qcom_snps_hsphy_init()
266 	hsphy->phy_initialized = true;  in qcom_snps_hsphy_init()
271 	clk_bulk_disable_unprepare(hsphy->num_clks, hsphy->clks);  in qcom_snps_hsphy_init()
273 	regulator_bulk_disable(ARRAY_SIZE(hsphy->vregs), hsphy->vregs);  in qcom_snps_hsphy_init()
278 static int qcom_snps_hsphy_exit(struct phy *phy)  in qcom_snps_hsphy_exit()  argument
280 	struct qcom_snps_hsphy *hsphy = phy_get_drvdata(phy);  in qcom_snps_hsphy_exit()
282 	reset_control_assert(hsphy->phy_reset);  in qcom_snps_hsphy_exit()
283 	clk_bulk_disable_unprepare(hsphy->num_clks, hsphy->clks);  in qcom_snps_hsphy_exit()
284 	regulator_bulk_disable(ARRAY_SIZE(hsphy->vregs), hsphy->vregs);  in qcom_snps_hsphy_exit()
285 	hsphy->phy_initialized = false;  in qcom_snps_hsphy_exit()
298 	{ .compatible	= "qcom,sm8150-usb-hs-phy", },
299 	{ .compatible	= "qcom,usb-snps-hs-7nm-phy", },
300 	{ .compatible	= "qcom,usb-snps-femto-v2-phy",	},
312 	struct device *dev = &pdev->dev;  in qcom_snps_hsphy_probe()
315 	struct phy *generic_phy;  in qcom_snps_hsphy_probe()
321 		return -ENOMEM;  in qcom_snps_hsphy_probe()
323 	hsphy->dev = dev;  in qcom_snps_hsphy_probe()
325 	hsphy->base = devm_platform_ioremap_resource(pdev, 0);  in qcom_snps_hsphy_probe()
326 	if (IS_ERR(hsphy->base))  in qcom_snps_hsphy_probe()
327 		return PTR_ERR(hsphy->base);  in qcom_snps_hsphy_probe()
333 	hsphy->phy_reset = devm_reset_control_get_exclusive(&pdev->dev, NULL);  in qcom_snps_hsphy_probe()
334 	if (IS_ERR(hsphy->phy_reset)) {  in qcom_snps_hsphy_probe()
335 		dev_err(dev, "failed to get phy core reset\n");  in qcom_snps_hsphy_probe()
336 		return PTR_ERR(hsphy->phy_reset);  in qcom_snps_hsphy_probe()
339 	num = ARRAY_SIZE(hsphy->vregs);  in qcom_snps_hsphy_probe()
341 		hsphy->vregs[i].supply = qcom_snps_hsphy_vreg_names[i];  in qcom_snps_hsphy_probe()
343 	ret = devm_regulator_bulk_get(dev, num, hsphy->vregs);  in qcom_snps_hsphy_probe()
359 		dev_err(dev, "failed to create phy, %d\n", ret);  in qcom_snps_hsphy_probe()
362 	hsphy->phy = generic_phy;  in qcom_snps_hsphy_probe()
369 		dev_dbg(dev, "Registered Qcom-SNPS HS phy\n");  in qcom_snps_hsphy_probe()
379 		.name	= "qcom-snps-hs-femto-v2-phy",
387 MODULE_DESCRIPTION("Qualcomm SNPS FEMTO USB HS PHY V2 driver");