Lines Matching full:pctrl
567 static u32 chv_pctrl_readl(struct intel_pinctrl *pctrl, unsigned int offset) in chv_pctrl_readl() argument
569 const struct intel_community *community = &pctrl->communities[0]; in chv_pctrl_readl()
574 static void chv_pctrl_writel(struct intel_pinctrl *pctrl, unsigned int offset, u32 value) in chv_pctrl_writel() argument
576 const struct intel_community *community = &pctrl->communities[0]; in chv_pctrl_writel()
584 static void __iomem *chv_padreg(struct intel_pinctrl *pctrl, unsigned int offset, in chv_padreg() argument
587 const struct intel_community *community = &pctrl->communities[0]; in chv_padreg()
596 static u32 chv_readl(struct intel_pinctrl *pctrl, unsigned int pin, unsigned int offset) in chv_readl() argument
598 return readl(chv_padreg(pctrl, pin, offset)); in chv_readl()
601 static void chv_writel(struct intel_pinctrl *pctrl, unsigned int pin, unsigned int offset, u32 valu… in chv_writel() argument
603 void __iomem *reg = chv_padreg(pctrl, pin, offset); in chv_writel()
611 static bool chv_pad_locked(struct intel_pinctrl *pctrl, unsigned int offset) in chv_pad_locked() argument
613 return chv_readl(pctrl, offset, CHV_PADCTRL1) & CHV_PADCTRL1_CFGLOCK; in chv_pad_locked()
618 struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_get_groups_count() local
620 return pctrl->soc->ngroups; in chv_get_groups_count()
626 struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_get_group_name() local
628 return pctrl->soc->groups[group].name; in chv_get_group_name()
634 struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_get_group_pins() local
636 *pins = pctrl->soc->groups[group].pins; in chv_get_group_pins()
637 *npins = pctrl->soc->groups[group].npins; in chv_get_group_pins()
644 struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_pin_dbg_show() local
651 ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0); in chv_pin_dbg_show()
652 ctrl1 = chv_readl(pctrl, offset, CHV_PADCTRL1); in chv_pin_dbg_show()
653 locked = chv_pad_locked(pctrl, offset); in chv_pin_dbg_show()
683 struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_get_functions_count() local
685 return pctrl->soc->nfunctions; in chv_get_functions_count()
691 struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_get_function_name() local
693 return pctrl->soc->functions[function].name; in chv_get_function_name()
701 struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_get_function_groups() local
703 *groups = pctrl->soc->functions[function].groups; in chv_get_function_groups()
704 *ngroups = pctrl->soc->functions[function].ngroups; in chv_get_function_groups()
711 struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_pinmux_set_mux() local
716 grp = &pctrl->soc->groups[group]; in chv_pinmux_set_mux()
722 if (chv_pad_locked(pctrl, grp->pins[i])) { in chv_pinmux_set_mux()
723 dev_warn(pctrl->dev, "unable to set mode for locked pin %u\n", in chv_pinmux_set_mux()
746 value = chv_readl(pctrl, pin, CHV_PADCTRL0); in chv_pinmux_set_mux()
752 chv_writel(pctrl, pin, CHV_PADCTRL0, value); in chv_pinmux_set_mux()
755 value = chv_readl(pctrl, pin, CHV_PADCTRL1) & ~CHV_PADCTRL1_INVRXTX_MASK; in chv_pinmux_set_mux()
758 chv_writel(pctrl, pin, CHV_PADCTRL1, value); in chv_pinmux_set_mux()
760 dev_dbg(pctrl->dev, "configured pin %u mode %u OE %sinverted\n", in chv_pinmux_set_mux()
769 static void chv_gpio_clear_triggering(struct intel_pinctrl *pctrl, in chv_gpio_clear_triggering() argument
781 value = chv_readl(pctrl, offset, CHV_PADCTRL0); in chv_gpio_clear_triggering()
785 value = chv_readl(pctrl, offset, CHV_PADCTRL1); in chv_gpio_clear_triggering()
788 chv_writel(pctrl, offset, CHV_PADCTRL1, value); in chv_gpio_clear_triggering()
795 struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_gpio_request_enable() local
801 if (chv_pad_locked(pctrl, offset)) { in chv_gpio_request_enable()
802 value = chv_readl(pctrl, offset, CHV_PADCTRL0); in chv_gpio_request_enable()
809 struct intel_community_context *cctx = &pctrl->context.communities[0]; in chv_gpio_request_enable()
821 chv_gpio_clear_triggering(pctrl, offset); in chv_gpio_request_enable()
823 value = chv_readl(pctrl, offset, CHV_PADCTRL0); in chv_gpio_request_enable()
837 chv_writel(pctrl, offset, CHV_PADCTRL0, value); in chv_gpio_request_enable()
849 struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_gpio_disable_free() local
854 if (!chv_pad_locked(pctrl, offset)) in chv_gpio_disable_free()
855 chv_gpio_clear_triggering(pctrl, offset); in chv_gpio_disable_free()
864 struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_gpio_set_direction() local
870 ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0) & ~CHV_PADCTRL0_GPIOCFG_MASK; in chv_gpio_set_direction()
875 chv_writel(pctrl, offset, CHV_PADCTRL0, ctrl0); in chv_gpio_set_direction()
895 struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_config_get() local
903 ctrl0 = chv_readl(pctrl, pin, CHV_PADCTRL0); in chv_config_get()
904 ctrl1 = chv_readl(pctrl, pin, CHV_PADCTRL1); in chv_config_get()
977 static int chv_config_set_pull(struct intel_pinctrl *pctrl, unsigned int pin, in chv_config_set_pull() argument
984 ctrl0 = chv_readl(pctrl, pin, CHV_PADCTRL0); in chv_config_set_pull()
1036 chv_writel(pctrl, pin, CHV_PADCTRL0, ctrl0); in chv_config_set_pull()
1042 static int chv_config_set_oden(struct intel_pinctrl *pctrl, unsigned int pin, in chv_config_set_oden() argument
1049 ctrl1 = chv_readl(pctrl, pin, CHV_PADCTRL1); in chv_config_set_oden()
1056 chv_writel(pctrl, pin, CHV_PADCTRL1, ctrl1); in chv_config_set_oden()
1065 struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_config_set() local
1070 if (chv_pad_locked(pctrl, pin)) in chv_config_set()
1081 ret = chv_config_set_pull(pctrl, pin, param, arg); in chv_config_set()
1087 ret = chv_config_set_oden(pctrl, pin, false); in chv_config_set()
1093 ret = chv_config_set_oden(pctrl, pin, true); in chv_config_set()
1102 dev_dbg(pctrl->dev, "pin %d set config %d arg %u\n", pin, in chv_config_set()
1166 struct intel_pinctrl *pctrl = gpiochip_get_data(chip); in chv_gpio_get() local
1171 ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0); in chv_gpio_get()
1184 struct intel_pinctrl *pctrl = gpiochip_get_data(chip); in chv_gpio_set() local
1190 ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0); in chv_gpio_set()
1197 chv_writel(pctrl, offset, CHV_PADCTRL0, ctrl0); in chv_gpio_set()
1204 struct intel_pinctrl *pctrl = gpiochip_get_data(chip); in chv_gpio_get_direction() local
1209 ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0); in chv_gpio_get_direction()
1247 struct intel_pinctrl *pctrl = gpiochip_get_data(gc); in chv_gpio_irq_ack() local
1253 intr_line = chv_readl(pctrl, pin, CHV_PADCTRL0); in chv_gpio_irq_ack()
1256 chv_pctrl_writel(pctrl, CHV_INTSTAT, BIT(intr_line)); in chv_gpio_irq_ack()
1264 struct intel_pinctrl *pctrl = gpiochip_get_data(gc); in chv_gpio_irq_mask_unmask() local
1271 intr_line = chv_readl(pctrl, pin, CHV_PADCTRL0); in chv_gpio_irq_mask_unmask()
1275 value = chv_pctrl_readl(pctrl, CHV_INTMASK); in chv_gpio_irq_mask_unmask()
1280 chv_pctrl_writel(pctrl, CHV_INTMASK, value); in chv_gpio_irq_mask_unmask()
1309 struct intel_pinctrl *pctrl = gpiochip_get_data(gc); in chv_gpio_irq_startup() local
1310 struct intel_community_context *cctx = &pctrl->context.communities[0]; in chv_gpio_irq_startup()
1317 intsel = chv_readl(pctrl, pin, CHV_PADCTRL0); in chv_gpio_irq_startup()
1321 value = chv_readl(pctrl, pin, CHV_PADCTRL1); in chv_gpio_irq_startup()
1341 struct intel_pinctrl *pctrl = gpiochip_get_data(gc); in chv_gpio_irq_type() local
1342 struct intel_community_context *cctx = &pctrl->context.communities[0]; in chv_gpio_irq_type()
1362 if (!chv_pad_locked(pctrl, pin)) { in chv_gpio_irq_type()
1363 value = chv_readl(pctrl, pin, CHV_PADCTRL1); in chv_gpio_irq_type()
1380 chv_writel(pctrl, pin, CHV_PADCTRL1, value); in chv_gpio_irq_type()
1383 value = chv_readl(pctrl, pin, CHV_PADCTRL0); in chv_gpio_irq_type()
1402 struct intel_pinctrl *pctrl = gpiochip_get_data(gc); in chv_gpio_irq_handler() local
1403 const struct intel_community *community = &pctrl->communities[0]; in chv_gpio_irq_handler()
1404 struct intel_community_context *cctx = &pctrl->context.communities[0]; in chv_gpio_irq_handler()
1413 pending = chv_pctrl_readl(pctrl, CHV_INTSTAT); in chv_gpio_irq_handler()
1472 struct intel_pinctrl *pctrl = gpiochip_get_data(chip); in chv_init_irq_valid_mask() local
1473 const struct intel_community *community = &pctrl->communities[0]; in chv_init_irq_valid_mask()
1477 for (i = 0; i < pctrl->soc->npins; i++) { in chv_init_irq_valid_mask()
1481 desc = &pctrl->soc->pins[i]; in chv_init_irq_valid_mask()
1483 intsel = chv_readl(pctrl, desc->number, CHV_PADCTRL0); in chv_init_irq_valid_mask()
1494 struct intel_pinctrl *pctrl = gpiochip_get_data(chip); in chv_gpio_irq_init_hw() local
1495 const struct intel_community *community = &pctrl->communities[0]; in chv_gpio_irq_init_hw()
1504 if (!pctrl->chip.irq.init_valid_mask) { in chv_gpio_irq_init_hw()
1509 chv_pctrl_writel(pctrl, CHV_INTMASK, GENMASK(31, community->nirqs)); in chv_gpio_irq_init_hw()
1513 chv_pctrl_writel(pctrl, CHV_INTSTAT, 0xffff); in chv_gpio_irq_init_hw()
1520 struct intel_pinctrl *pctrl = gpiochip_get_data(chip); in chv_gpio_add_pin_ranges() local
1521 const struct intel_community *community = &pctrl->communities[0]; in chv_gpio_add_pin_ranges()
1527 ret = gpiochip_add_pin_range(chip, dev_name(pctrl->dev), in chv_gpio_add_pin_ranges()
1531 dev_err(pctrl->dev, "failed to add GPIO pin range\n"); in chv_gpio_add_pin_ranges()
1539 static int chv_gpio_probe(struct intel_pinctrl *pctrl, int irq) in chv_gpio_probe() argument
1541 const struct intel_community *community = &pctrl->communities[0]; in chv_gpio_probe()
1543 struct gpio_chip *chip = &pctrl->chip; in chv_gpio_probe()
1549 chip->ngpio = pctrl->soc->pins[pctrl->soc->npins - 1].number + 1; in chv_gpio_probe()
1550 chip->label = dev_name(pctrl->dev); in chv_gpio_probe()
1552 chip->parent = pctrl->dev; in chv_gpio_probe()
1555 pctrl->irq = irq; in chv_gpio_probe()
1556 pctrl->irqchip.name = "chv-gpio"; in chv_gpio_probe()
1557 pctrl->irqchip.irq_startup = chv_gpio_irq_startup; in chv_gpio_probe()
1558 pctrl->irqchip.irq_ack = chv_gpio_irq_ack; in chv_gpio_probe()
1559 pctrl->irqchip.irq_mask = chv_gpio_irq_mask; in chv_gpio_probe()
1560 pctrl->irqchip.irq_unmask = chv_gpio_irq_unmask; in chv_gpio_probe()
1561 pctrl->irqchip.irq_set_type = chv_gpio_irq_type; in chv_gpio_probe()
1562 pctrl->irqchip.flags = IRQCHIP_SKIP_SET_WAKE; in chv_gpio_probe()
1564 chip->irq.chip = &pctrl->irqchip; in chv_gpio_probe()
1568 chip->irq.parents = &pctrl->irq; in chv_gpio_probe()
1574 irq_base = devm_irq_alloc_descs(pctrl->dev, -1, 0, in chv_gpio_probe()
1575 pctrl->soc->npins, NUMA_NO_NODE); in chv_gpio_probe()
1577 dev_err(pctrl->dev, "Failed to allocate IRQ numbers\n"); in chv_gpio_probe()
1582 ret = devm_gpiochip_add_data(pctrl->dev, chip, pctrl); in chv_gpio_probe()
1584 dev_err(pctrl->dev, "Failed to register gpiochip\n"); in chv_gpio_probe()
1605 struct intel_pinctrl *pctrl = region_context; in chv_pinctrl_mmio_access_handler() local
1612 chv_pctrl_writel(pctrl, address, *value); in chv_pinctrl_mmio_access_handler()
1614 *value = chv_pctrl_readl(pctrl, address); in chv_pinctrl_mmio_access_handler()
1628 struct intel_pinctrl *pctrl; in chv_pinctrl_probe() local
1636 pctrl = devm_kzalloc(dev, sizeof(*pctrl), GFP_KERNEL); in chv_pinctrl_probe()
1637 if (!pctrl) in chv_pinctrl_probe()
1640 pctrl->dev = dev; in chv_pinctrl_probe()
1641 pctrl->soc = soc_data; in chv_pinctrl_probe()
1643 pctrl->ncommunities = pctrl->soc->ncommunities; in chv_pinctrl_probe()
1644 pctrl->communities = devm_kmemdup(dev, pctrl->soc->communities, in chv_pinctrl_probe()
1645 pctrl->ncommunities * sizeof(*pctrl->communities), in chv_pinctrl_probe()
1647 if (!pctrl->communities) in chv_pinctrl_probe()
1650 community = &pctrl->communities[0]; in chv_pinctrl_probe()
1658 pctrl->context.pads = devm_kcalloc(dev, pctrl->soc->npins, in chv_pinctrl_probe()
1659 sizeof(*pctrl->context.pads), in chv_pinctrl_probe()
1661 if (!pctrl->context.pads) in chv_pinctrl_probe()
1665 pctrl->context.communities = devm_kcalloc(dev, pctrl->soc->ncommunities, in chv_pinctrl_probe()
1666 sizeof(*pctrl->context.communities), in chv_pinctrl_probe()
1668 if (!pctrl->context.communities) in chv_pinctrl_probe()
1675 pctrl->pctldesc = chv_pinctrl_desc; in chv_pinctrl_probe()
1676 pctrl->pctldesc.name = dev_name(dev); in chv_pinctrl_probe()
1677 pctrl->pctldesc.pins = pctrl->soc->pins; in chv_pinctrl_probe()
1678 pctrl->pctldesc.npins = pctrl->soc->npins; in chv_pinctrl_probe()
1680 pctrl->pctldev = devm_pinctrl_register(dev, &pctrl->pctldesc, pctrl); in chv_pinctrl_probe()
1681 if (IS_ERR(pctrl->pctldev)) { in chv_pinctrl_probe()
1683 return PTR_ERR(pctrl->pctldev); in chv_pinctrl_probe()
1686 ret = chv_gpio_probe(pctrl, irq); in chv_pinctrl_probe()
1693 NULL, pctrl); in chv_pinctrl_probe()
1697 platform_set_drvdata(pdev, pctrl); in chv_pinctrl_probe()
1704 struct intel_pinctrl *pctrl = platform_get_drvdata(pdev); in chv_pinctrl_remove() local
1705 const struct intel_community *community = &pctrl->communities[0]; in chv_pinctrl_remove()
1717 struct intel_pinctrl *pctrl = dev_get_drvdata(dev); in chv_pinctrl_suspend_noirq() local
1718 struct intel_community_context *cctx = &pctrl->context.communities[0]; in chv_pinctrl_suspend_noirq()
1724 cctx->saved_intmask = chv_pctrl_readl(pctrl, CHV_INTMASK); in chv_pinctrl_suspend_noirq()
1726 for (i = 0; i < pctrl->soc->npins; i++) { in chv_pinctrl_suspend_noirq()
1728 struct intel_pad_context *ctx = &pctrl->context.pads[i]; in chv_pinctrl_suspend_noirq()
1730 desc = &pctrl->soc->pins[i]; in chv_pinctrl_suspend_noirq()
1731 if (chv_pad_locked(pctrl, desc->number)) in chv_pinctrl_suspend_noirq()
1734 ctx->padctrl0 = chv_readl(pctrl, desc->number, CHV_PADCTRL0); in chv_pinctrl_suspend_noirq()
1737 ctx->padctrl1 = chv_readl(pctrl, desc->number, CHV_PADCTRL1); in chv_pinctrl_suspend_noirq()
1747 struct intel_pinctrl *pctrl = dev_get_drvdata(dev); in chv_pinctrl_resume_noirq() local
1748 struct intel_community_context *cctx = &pctrl->context.communities[0]; in chv_pinctrl_resume_noirq()
1759 chv_pctrl_writel(pctrl, CHV_INTMASK, 0x0000); in chv_pinctrl_resume_noirq()
1761 for (i = 0; i < pctrl->soc->npins; i++) { in chv_pinctrl_resume_noirq()
1763 struct intel_pad_context *ctx = &pctrl->context.pads[i]; in chv_pinctrl_resume_noirq()
1766 desc = &pctrl->soc->pins[i]; in chv_pinctrl_resume_noirq()
1767 if (chv_pad_locked(pctrl, desc->number)) in chv_pinctrl_resume_noirq()
1771 val = chv_readl(pctrl, desc->number, CHV_PADCTRL0); in chv_pinctrl_resume_noirq()
1774 chv_writel(pctrl, desc->number, CHV_PADCTRL0, ctx->padctrl0); in chv_pinctrl_resume_noirq()
1775 dev_dbg(pctrl->dev, "restored pin %2u ctrl0 0x%08x\n", in chv_pinctrl_resume_noirq()
1776 desc->number, chv_readl(pctrl, desc->number, CHV_PADCTRL0)); in chv_pinctrl_resume_noirq()
1779 val = chv_readl(pctrl, desc->number, CHV_PADCTRL1); in chv_pinctrl_resume_noirq()
1781 chv_writel(pctrl, desc->number, CHV_PADCTRL1, ctx->padctrl1); in chv_pinctrl_resume_noirq()
1782 dev_dbg(pctrl->dev, "restored pin %2u ctrl1 0x%08x\n", in chv_pinctrl_resume_noirq()
1783 desc->number, chv_readl(pctrl, desc->number, CHV_PADCTRL1)); in chv_pinctrl_resume_noirq()
1791 chv_pctrl_writel(pctrl, CHV_INTSTAT, 0xffff); in chv_pinctrl_resume_noirq()
1792 chv_pctrl_writel(pctrl, CHV_INTMASK, cctx->saved_intmask); in chv_pinctrl_resume_noirq()