Lines Matching full:pctl
210 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_gpio_request() local
214 range = pinctrl_find_gpio_range_from_pin_nolock(pctl->pctl_dev, pin); in stm32_gpio_request()
216 dev_err(pctl->dev, "pin %d not in range.\n", pin); in stm32_gpio_request()
367 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_gpio_irq_request_resources() local
377 dev_err(pctl->dev, "unable to lock HW IRQ %lu for IRQ\n", in stm32_gpio_irq_request_resources()
435 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_gpio_domain_activate() local
443 spin_lock_irqsave(&pctl->irqmux_lock, flags); in stm32_gpio_domain_activate()
445 if (pctl->hwlock) { in stm32_gpio_domain_activate()
446 ret = hwspin_lock_timeout_in_atomic(pctl->hwlock, in stm32_gpio_domain_activate()
449 dev_err(pctl->dev, "Can't get hwspinlock\n"); in stm32_gpio_domain_activate()
454 if (pctl->irqmux_map & BIT(irq_data->hwirq)) { in stm32_gpio_domain_activate()
455 dev_err(pctl->dev, "irq line %ld already requested.\n", in stm32_gpio_domain_activate()
458 if (pctl->hwlock) in stm32_gpio_domain_activate()
459 hwspin_unlock_in_atomic(pctl->hwlock); in stm32_gpio_domain_activate()
462 pctl->irqmux_map |= BIT(irq_data->hwirq); in stm32_gpio_domain_activate()
465 regmap_field_write(pctl->irqmux[irq_data->hwirq], bank->bank_ioport_nr); in stm32_gpio_domain_activate()
467 if (pctl->hwlock) in stm32_gpio_domain_activate()
468 hwspin_unlock_in_atomic(pctl->hwlock); in stm32_gpio_domain_activate()
471 spin_unlock_irqrestore(&pctl->irqmux_lock, flags); in stm32_gpio_domain_activate()
479 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_gpio_domain_deactivate() local
482 spin_lock_irqsave(&pctl->irqmux_lock, flags); in stm32_gpio_domain_deactivate()
483 pctl->irqmux_map &= ~BIT(irq_data->hwirq); in stm32_gpio_domain_deactivate()
484 spin_unlock_irqrestore(&pctl->irqmux_lock, flags); in stm32_gpio_domain_deactivate()
518 stm32_pctrl_find_group_by_pin(struct stm32_pinctrl *pctl, u32 pin) in stm32_pctrl_find_group_by_pin() argument
522 for (i = 0; i < pctl->ngroups; i++) { in stm32_pctrl_find_group_by_pin()
523 struct stm32_pinctrl_group *grp = pctl->groups + i; in stm32_pctrl_find_group_by_pin()
532 static bool stm32_pctrl_is_function_valid(struct stm32_pinctrl *pctl, in stm32_pctrl_is_function_valid() argument
537 for (i = 0; i < pctl->npins; i++) { in stm32_pctrl_is_function_valid()
538 const struct stm32_desc_pin *pin = pctl->pins + i; in stm32_pctrl_is_function_valid()
556 static int stm32_pctrl_dt_node_to_map_func(struct stm32_pinctrl *pctl, in stm32_pctrl_dt_node_to_map_func() argument
567 if (!stm32_pctrl_is_function_valid(pctl, pin, fnum)) { in stm32_pctrl_dt_node_to_map_func()
568 dev_err(pctl->dev, "invalid function %d on pin %d .\n", in stm32_pctrl_dt_node_to_map_func()
585 struct stm32_pinctrl *pctl; in stm32_pctrl_dt_subnode_to_map() local
595 pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pctrl_dt_subnode_to_map()
599 dev_err(pctl->dev, "missing pins property in node %pOFn .\n", in stm32_pctrl_dt_subnode_to_map()
641 if (!stm32_pctrl_is_function_valid(pctl, pin, func)) { in stm32_pctrl_dt_subnode_to_map()
642 dev_err(pctl->dev, "invalid function.\n"); in stm32_pctrl_dt_subnode_to_map()
647 grp = stm32_pctrl_find_group_by_pin(pctl, pin); in stm32_pctrl_dt_subnode_to_map()
649 dev_err(pctl->dev, "unable to match pin %d to group\n", in stm32_pctrl_dt_subnode_to_map()
655 err = stm32_pctrl_dt_node_to_map_func(pctl, pin, func, grp, map, in stm32_pctrl_dt_subnode_to_map()
702 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pctrl_get_groups_count() local
704 return pctl->ngroups; in stm32_pctrl_get_groups_count()
710 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pctrl_get_group_name() local
712 return pctl->groups[group].name; in stm32_pctrl_get_group_name()
720 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pctrl_get_group_pins() local
722 *pins = (unsigned *)&pctl->groups[group].pin; in stm32_pctrl_get_group_pins()
755 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pmx_get_func_groups() local
757 *groups = pctl->grp_names; in stm32_pmx_get_func_groups()
758 *num_groups = pctl->ngroups; in stm32_pmx_get_func_groups()
766 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_pmx_set_mode() local
776 if (pctl->hwlock) { in stm32_pmx_set_mode()
777 err = hwspin_lock_timeout_in_atomic(pctl->hwlock, in stm32_pmx_set_mode()
780 dev_err(pctl->dev, "Can't get hwspinlock\n"); in stm32_pmx_set_mode()
795 if (pctl->hwlock) in stm32_pmx_set_mode()
796 hwspin_unlock_in_atomic(pctl->hwlock); in stm32_pmx_set_mode()
835 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pmx_set_mux() local
836 struct stm32_pinctrl_group *g = pctl->groups + group; in stm32_pmx_set_mux()
842 ret = stm32_pctrl_is_function_valid(pctl, g->pin, function); in stm32_pmx_set_mux()
844 dev_err(pctl->dev, "invalid function %d on group %d .\n", in stm32_pmx_set_mux()
851 dev_err(pctl->dev, "No gpio range defined.\n"); in stm32_pmx_set_mux()
888 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_pconf_set_driving() local
896 if (pctl->hwlock) { in stm32_pconf_set_driving()
897 err = hwspin_lock_timeout_in_atomic(pctl->hwlock, in stm32_pconf_set_driving()
900 dev_err(pctl->dev, "Can't get hwspinlock\n"); in stm32_pconf_set_driving()
910 if (pctl->hwlock) in stm32_pconf_set_driving()
911 hwspin_unlock_in_atomic(pctl->hwlock); in stm32_pconf_set_driving()
943 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_pconf_set_speed() local
951 if (pctl->hwlock) { in stm32_pconf_set_speed()
952 err = hwspin_lock_timeout_in_atomic(pctl->hwlock, in stm32_pconf_set_speed()
955 dev_err(pctl->dev, "Can't get hwspinlock\n"); in stm32_pconf_set_speed()
965 if (pctl->hwlock) in stm32_pconf_set_speed()
966 hwspin_unlock_in_atomic(pctl->hwlock); in stm32_pconf_set_speed()
998 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_pconf_set_bias() local
1006 if (pctl->hwlock) { in stm32_pconf_set_bias()
1007 err = hwspin_lock_timeout_in_atomic(pctl->hwlock, in stm32_pconf_set_bias()
1010 dev_err(pctl->dev, "Can't get hwspinlock\n"); in stm32_pconf_set_bias()
1020 if (pctl->hwlock) in stm32_pconf_set_bias()
1021 hwspin_unlock_in_atomic(pctl->hwlock); in stm32_pconf_set_bias()
1076 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pconf_parse_conf() local
1083 dev_err(pctl->dev, "No gpio range defined.\n"); in stm32_pconf_parse_conf()
1124 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pconf_group_get() local
1126 *config = pctl->groups[group].config; in stm32_pconf_group_get()
1134 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pconf_group_set() local
1135 struct stm32_pinctrl_group *g = &pctl->groups[group]; in stm32_pconf_group_set()
1241 static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl, in stm32_gpiolib_register_bank() argument
1244 struct stm32_gpio_bank *bank = &pctl->banks[pctl->nbanks]; in stm32_gpiolib_register_bank()
1248 struct device *dev = pctl->dev; in stm32_gpiolib_register_bank()
1282 bank_nr = pctl->nbanks; in stm32_gpiolib_register_bank()
1290 pinctrl_add_gpio_range(pctl->pctl_dev, in stm32_gpiolib_register_bank()
1291 &pctl->banks[bank_nr].range); in stm32_gpiolib_register_bank()
1306 if (pctl->domain) { in stm32_gpiolib_register_bank()
1310 bank->domain = irq_domain_create_hierarchy(pctl->domain, 0, STM32_GPIO_IRQ_LINE, in stm32_gpiolib_register_bank()
1350 struct stm32_pinctrl *pctl) in stm32_pctrl_dt_setup_irq() argument
1358 pctl->regmap = syscon_regmap_lookup_by_phandle(np, "st,syscfg"); in stm32_pctrl_dt_setup_irq()
1359 if (IS_ERR(pctl->regmap)) in stm32_pctrl_dt_setup_irq()
1360 return PTR_ERR(pctl->regmap); in stm32_pctrl_dt_setup_irq()
1362 rm = pctl->regmap; in stm32_pctrl_dt_setup_irq()
1384 pctl->irqmux[i] = devm_regmap_field_alloc(dev, rm, mux); in stm32_pctrl_dt_setup_irq()
1385 if (IS_ERR(pctl->irqmux[i])) in stm32_pctrl_dt_setup_irq()
1386 return PTR_ERR(pctl->irqmux[i]); in stm32_pctrl_dt_setup_irq()
1394 struct stm32_pinctrl *pctl = platform_get_drvdata(pdev); in stm32_pctrl_build_state() local
1397 pctl->ngroups = pctl->npins; in stm32_pctrl_build_state()
1400 pctl->groups = devm_kcalloc(&pdev->dev, pctl->ngroups, in stm32_pctrl_build_state()
1401 sizeof(*pctl->groups), GFP_KERNEL); in stm32_pctrl_build_state()
1402 if (!pctl->groups) in stm32_pctrl_build_state()
1406 pctl->grp_names = devm_kcalloc(&pdev->dev, pctl->ngroups, in stm32_pctrl_build_state()
1407 sizeof(*pctl->grp_names), GFP_KERNEL); in stm32_pctrl_build_state()
1408 if (!pctl->grp_names) in stm32_pctrl_build_state()
1411 for (i = 0; i < pctl->npins; i++) { in stm32_pctrl_build_state()
1412 const struct stm32_desc_pin *pin = pctl->pins + i; in stm32_pctrl_build_state()
1413 struct stm32_pinctrl_group *group = pctl->groups + i; in stm32_pctrl_build_state()
1417 pctl->grp_names[i] = pin->pin.name; in stm32_pctrl_build_state()
1423 static int stm32_pctrl_create_pins_tab(struct stm32_pinctrl *pctl, in stm32_pctrl_create_pins_tab() argument
1429 for (i = 0; i < pctl->match_data->npins; i++) { in stm32_pctrl_create_pins_tab()
1430 p = pctl->match_data->pins + i; in stm32_pctrl_create_pins_tab()
1431 if (pctl->pkg && !(pctl->pkg & p->pkg)) in stm32_pctrl_create_pins_tab()
1439 pctl->npins = nb_pins_available; in stm32_pctrl_create_pins_tab()
1445 struct stm32_pinctrl *pctl) in stm32_pctl_get_package() argument
1447 if (of_property_read_u32(np, "st,package", &pctl->pkg)) { in stm32_pctl_get_package()
1448 pctl->pkg = 0; in stm32_pctl_get_package()
1449 dev_warn(pctl->dev, "No package detected, use default one\n"); in stm32_pctl_get_package()
1451 dev_dbg(pctl->dev, "package detected: %x\n", pctl->pkg); in stm32_pctl_get_package()
1461 struct stm32_pinctrl *pctl; in stm32_pctl_probe() local
1477 pctl = devm_kzalloc(dev, sizeof(*pctl), GFP_KERNEL); in stm32_pctl_probe()
1478 if (!pctl) in stm32_pctl_probe()
1481 platform_set_drvdata(pdev, pctl); in stm32_pctl_probe()
1484 pctl->domain = stm32_pctrl_get_irq_domain(np); in stm32_pctl_probe()
1485 if (IS_ERR(pctl->domain)) in stm32_pctl_probe()
1486 return PTR_ERR(pctl->domain); in stm32_pctl_probe()
1487 if (!pctl->domain) in stm32_pctl_probe()
1496 pctl->hwlock = hwspin_lock_request_specific(hwlock_id); in stm32_pctl_probe()
1499 spin_lock_init(&pctl->irqmux_lock); in stm32_pctl_probe()
1501 pctl->dev = dev; in stm32_pctl_probe()
1502 pctl->match_data = match->data; in stm32_pctl_probe()
1505 stm32_pctl_get_package(np, pctl); in stm32_pctl_probe()
1507 pctl->pins = devm_kcalloc(pctl->dev, pctl->match_data->npins, in stm32_pctl_probe()
1508 sizeof(*pctl->pins), GFP_KERNEL); in stm32_pctl_probe()
1509 if (!pctl->pins) in stm32_pctl_probe()
1512 ret = stm32_pctrl_create_pins_tab(pctl, pctl->pins); in stm32_pctl_probe()
1522 if (pctl->domain) { in stm32_pctl_probe()
1523 ret = stm32_pctrl_dt_setup_irq(pdev, pctl); in stm32_pctl_probe()
1528 pins = devm_kcalloc(&pdev->dev, pctl->npins, sizeof(*pins), in stm32_pctl_probe()
1533 for (i = 0; i < pctl->npins; i++) in stm32_pctl_probe()
1534 pins[i] = pctl->pins[i].pin; in stm32_pctl_probe()
1536 pctl->pctl_desc.name = dev_name(&pdev->dev); in stm32_pctl_probe()
1537 pctl->pctl_desc.owner = THIS_MODULE; in stm32_pctl_probe()
1538 pctl->pctl_desc.pins = pins; in stm32_pctl_probe()
1539 pctl->pctl_desc.npins = pctl->npins; in stm32_pctl_probe()
1540 pctl->pctl_desc.link_consumers = true; in stm32_pctl_probe()
1541 pctl->pctl_desc.confops = &stm32_pconf_ops; in stm32_pctl_probe()
1542 pctl->pctl_desc.pctlops = &stm32_pctrl_ops; in stm32_pctl_probe()
1543 pctl->pctl_desc.pmxops = &stm32_pmx_ops; in stm32_pctl_probe()
1544 pctl->dev = &pdev->dev; in stm32_pctl_probe()
1546 pctl->pctl_dev = devm_pinctrl_register(&pdev->dev, &pctl->pctl_desc, in stm32_pctl_probe()
1547 pctl); in stm32_pctl_probe()
1549 if (IS_ERR(pctl->pctl_dev)) { in stm32_pctl_probe()
1551 return PTR_ERR(pctl->pctl_dev); in stm32_pctl_probe()
1562 pctl->banks = devm_kcalloc(dev, banks, sizeof(*pctl->banks), in stm32_pctl_probe()
1564 if (!pctl->banks) in stm32_pctl_probe()
1569 struct stm32_gpio_bank *bank = &pctl->banks[i]; in stm32_pctl_probe()
1591 ret = stm32_gpiolib_register_bank(pctl, child); in stm32_pctl_probe()
1597 pctl->nbanks++; in stm32_pctl_probe()
1607 struct stm32_pinctrl *pctl, u32 pin) in stm32_pinctrl_restore_gpio_regs() argument
1609 const struct pin_desc *desc = pin_desc_get(pctl->pctl_dev, pin); in stm32_pinctrl_restore_gpio_regs()
1616 range = pinctrl_find_gpio_range_from_pin(pctl->pctl_dev, pin); in stm32_pinctrl_restore_gpio_regs()
1661 regmap_field_write(pctl->irqmux[offset], bank->bank_ioport_nr); in stm32_pinctrl_restore_gpio_regs()
1668 struct stm32_pinctrl *pctl = dev_get_drvdata(dev); in stm32_pinctrl_resume() local
1669 struct stm32_pinctrl_group *g = pctl->groups; in stm32_pinctrl_resume()
1672 for (i = 0; i < pctl->ngroups; i++, g++) in stm32_pinctrl_resume()
1673 stm32_pinctrl_restore_gpio_regs(pctl, g->pin); in stm32_pinctrl_resume()