1 // SPDX-License-Identifier: GPL-2.0
19 #include <linux/pwm.h>
23 /* PWM registers and bits definitions */
42  * struct pwm_mediatek_chip - struct representing PWM chip
43  * @chip: linux PWM chip representation
44  * @regs: base address of PWM chip
46  * @clk_main: the clock used by PWM core
47  * @clk_pwms: the clock used by each PWM channel
71 				   struct pwm_device *pwm)  in pwm_mediatek_clk_enable()  argument
76 	ret = clk_prepare_enable(pc->clk_top);  in pwm_mediatek_clk_enable()
80 	ret = clk_prepare_enable(pc->clk_main);  in pwm_mediatek_clk_enable()
84 	ret = clk_prepare_enable(pc->clk_pwms[pwm->hwpwm]);  in pwm_mediatek_clk_enable()
91 	clk_disable_unprepare(pc->clk_main);  in pwm_mediatek_clk_enable()
93 	clk_disable_unprepare(pc->clk_top);  in pwm_mediatek_clk_enable()
99 				     struct pwm_device *pwm)  in pwm_mediatek_clk_disable()  argument
103 	clk_disable_unprepare(pc->clk_pwms[pwm->hwpwm]);  in pwm_mediatek_clk_disable()
104 	clk_disable_unprepare(pc->clk_main);  in pwm_mediatek_clk_disable()
105 	clk_disable_unprepare(pc->clk_top);  in pwm_mediatek_clk_disable()
109 				     unsigned int num, unsigned int offset)  in pwm_mediatek_readl()  argument
111 	return readl(chip->regs + pwm_mediatek_reg_offset[num] + offset);  in pwm_mediatek_readl()
115 				       unsigned int num, unsigned int offset,  in pwm_mediatek_writel()  argument
118 	writel(value, chip->regs + pwm_mediatek_reg_offset[num] + offset);  in pwm_mediatek_writel()
121 static int pwm_mediatek_config(struct pwm_chip *chip, struct pwm_device *pwm,  in pwm_mediatek_config()  argument
130 	ret = pwm_mediatek_clk_enable(chip, pwm);  in pwm_mediatek_config()
137 	do_div(resolution, clk_get_rate(pc->clk_pwms[pwm->hwpwm]));  in pwm_mediatek_config()
148 		pwm_mediatek_clk_disable(chip, pwm);  in pwm_mediatek_config()
149 		dev_err(chip->dev, "period %d not supported\n", period_ns);  in pwm_mediatek_config()
150 		return -EINVAL;  in pwm_mediatek_config()
153 	if (pc->soc->pwm45_fixup && pwm->hwpwm > 2) {  in pwm_mediatek_config()
155 		 * PWM[4,5] has distinct offset for PWMDWIDTH and PWMTHRES  in pwm_mediatek_config()
163 	pwm_mediatek_writel(pc, pwm->hwpwm, PWMCON, BIT(15) | clkdiv);  in pwm_mediatek_config()
164 	pwm_mediatek_writel(pc, pwm->hwpwm, reg_width, cnt_period);  in pwm_mediatek_config()
165 	pwm_mediatek_writel(pc, pwm->hwpwm, reg_thres, cnt_duty);  in pwm_mediatek_config()
167 	pwm_mediatek_clk_disable(chip, pwm);  in pwm_mediatek_config()
172 static int pwm_mediatek_enable(struct pwm_chip *chip, struct pwm_device *pwm)  in pwm_mediatek_enable()  argument
178 	ret = pwm_mediatek_clk_enable(chip, pwm);  in pwm_mediatek_enable()
182 	value = readl(pc->regs);  in pwm_mediatek_enable()
183 	value |= BIT(pwm->hwpwm);  in pwm_mediatek_enable()
184 	writel(value, pc->regs);  in pwm_mediatek_enable()
189 static void pwm_mediatek_disable(struct pwm_chip *chip, struct pwm_device *pwm)  in pwm_mediatek_disable()  argument
194 	value = readl(pc->regs);  in pwm_mediatek_disable()
195 	value &= ~BIT(pwm->hwpwm);  in pwm_mediatek_disable()
196 	writel(value, pc->regs);  in pwm_mediatek_disable()
198 	pwm_mediatek_clk_disable(chip, pwm);  in pwm_mediatek_disable()
215 	pc = devm_kzalloc(&pdev->dev, sizeof(*pc), GFP_KERNEL);  in pwm_mediatek_probe()
217 		return -ENOMEM;  in pwm_mediatek_probe()
219 	pc->soc = of_device_get_match_data(&pdev->dev);  in pwm_mediatek_probe()
222 	pc->regs = devm_ioremap_resource(&pdev->dev, res);  in pwm_mediatek_probe()
223 	if (IS_ERR(pc->regs))  in pwm_mediatek_probe()
224 		return PTR_ERR(pc->regs);  in pwm_mediatek_probe()
226 	pc->clk_pwms = devm_kcalloc(&pdev->dev, pc->soc->num_pwms,  in pwm_mediatek_probe()
227 				    sizeof(*pc->clk_pwms), GFP_KERNEL);  in pwm_mediatek_probe()
228 	if (!pc->clk_pwms)  in pwm_mediatek_probe()
229 		return -ENOMEM;  in pwm_mediatek_probe()
231 	pc->clk_top = devm_clk_get(&pdev->dev, "top");  in pwm_mediatek_probe()
232 	if (IS_ERR(pc->clk_top)) {  in pwm_mediatek_probe()
233 		dev_err(&pdev->dev, "clock: top fail: %ld\n",  in pwm_mediatek_probe()
234 			PTR_ERR(pc->clk_top));  in pwm_mediatek_probe()
235 		return PTR_ERR(pc->clk_top);  in pwm_mediatek_probe()
238 	pc->clk_main = devm_clk_get(&pdev->dev, "main");  in pwm_mediatek_probe()
239 	if (IS_ERR(pc->clk_main)) {  in pwm_mediatek_probe()
240 		dev_err(&pdev->dev, "clock: main fail: %ld\n",  in pwm_mediatek_probe()
241 			PTR_ERR(pc->clk_main));  in pwm_mediatek_probe()
242 		return PTR_ERR(pc->clk_main);  in pwm_mediatek_probe()
245 	for (i = 0; i < pc->soc->num_pwms; i++) {  in pwm_mediatek_probe()
248 		snprintf(name, sizeof(name), "pwm%d", i + 1);  in pwm_mediatek_probe()
250 		pc->clk_pwms[i] = devm_clk_get(&pdev->dev, name);  in pwm_mediatek_probe()
251 		if (IS_ERR(pc->clk_pwms[i])) {  in pwm_mediatek_probe()
252 			dev_err(&pdev->dev, "clock: %s fail: %ld\n",  in pwm_mediatek_probe()
253 				name, PTR_ERR(pc->clk_pwms[i]));  in pwm_mediatek_probe()
254 			return PTR_ERR(pc->clk_pwms[i]);  in pwm_mediatek_probe()
260 	pc->chip.dev = &pdev->dev;  in pwm_mediatek_probe()
261 	pc->chip.ops = &pwm_mediatek_ops;  in pwm_mediatek_probe()
262 	pc->chip.base = -1;  in pwm_mediatek_probe()
263 	pc->chip.npwm = pc->soc->num_pwms;  in pwm_mediatek_probe()
265 	ret = pwmchip_add(&pc->chip);  in pwm_mediatek_probe()
267 		dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);  in pwm_mediatek_probe()
278 	return pwmchip_remove(&pc->chip);  in pwm_mediatek_remove()
312 	{ .compatible = "mediatek,mt2712-pwm", .data = &mt2712_pwm_data },
313 	{ .compatible = "mediatek,mt7622-pwm", .data = &mt7622_pwm_data },
314 	{ .compatible = "mediatek,mt7623-pwm", .data = &mt7623_pwm_data },
315 	{ .compatible = "mediatek,mt7628-pwm", .data = &mt7628_pwm_data },
316 	{ .compatible = "mediatek,mt7629-pwm", .data = &mt7629_pwm_data },
317 	{ .compatible = "mediatek,mt8516-pwm", .data = &mt8516_pwm_data },
324 		.name = "pwm-mediatek",