Lines Matching +full:pm8921 +full:- +full:rtc
1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
7 #include <linux/rtc.h>
14 /* RTC Register offsets from RTC CTRL REG */
27 * struct pm8xxx_rtc_regs - describe RTC registers per PMIC versions
33 * @alarm_rw: base address of alarm read-write register
47 * struct pm8xxx_rtc - rtc driver internal structure
48 * @rtc: rtc device for this driver.
49 * @regmap: regmap used to access RTC registers
50 * @allow_set_time: indicates whether writing to the RTC is allowed
51 * @rtc_alarm_irq: rtc alarm irq number.
52 * @regs: rtc registers description.
57 struct rtc_device *rtc; member
67 * Steps to write the RTC registers.
69 * 2. Disable rtc if enabled.
72 * 5. Enable rtc if disabled in step 2.
82 const struct pm8xxx_rtc_regs *regs = rtc_dd->regs; in pm8xxx_rtc_set_time()
84 if (!rtc_dd->allow_set_time) in pm8xxx_rtc_set_time()
85 return -EACCES; in pm8xxx_rtc_set_time()
89 dev_dbg(dev, "Seconds value to be written to RTC = %lu\n", secs); in pm8xxx_rtc_set_time()
96 spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags); in pm8xxx_rtc_set_time()
98 rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg); in pm8xxx_rtc_set_time()
102 if (ctrl_reg & regs->alarm_en) { in pm8xxx_rtc_set_time()
104 ctrl_reg &= ~regs->alarm_en; in pm8xxx_rtc_set_time()
105 rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg); in pm8xxx_rtc_set_time()
107 dev_err(dev, "Write to RTC Alarm control register failed\n"); in pm8xxx_rtc_set_time()
112 /* Disable RTC H/w before writing on RTC register */ in pm8xxx_rtc_set_time()
113 rc = regmap_read(rtc_dd->regmap, regs->ctrl, &rtc_ctrl_reg); in pm8xxx_rtc_set_time()
120 rc = regmap_write(rtc_dd->regmap, regs->ctrl, rtc_ctrl_reg); in pm8xxx_rtc_set_time()
122 dev_err(dev, "Write to RTC control register failed\n"); in pm8xxx_rtc_set_time()
128 rc = regmap_write(rtc_dd->regmap, regs->write, 0); in pm8xxx_rtc_set_time()
130 dev_err(dev, "Write to RTC write data register failed\n"); in pm8xxx_rtc_set_time()
135 rc = regmap_bulk_write(rtc_dd->regmap, regs->write + 1, in pm8xxx_rtc_set_time()
136 &value[1], sizeof(value) - 1); in pm8xxx_rtc_set_time()
138 dev_err(dev, "Write to RTC write data register failed\n"); in pm8xxx_rtc_set_time()
143 rc = regmap_write(rtc_dd->regmap, regs->write, value[0]); in pm8xxx_rtc_set_time()
145 dev_err(dev, "Write to RTC write data register failed\n"); in pm8xxx_rtc_set_time()
149 /* Enable RTC H/w after writing on RTC register */ in pm8xxx_rtc_set_time()
152 rc = regmap_write(rtc_dd->regmap, regs->ctrl, rtc_ctrl_reg); in pm8xxx_rtc_set_time()
154 dev_err(dev, "Write to RTC control register failed\n"); in pm8xxx_rtc_set_time()
160 ctrl_reg |= regs->alarm_en; in pm8xxx_rtc_set_time()
161 rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg); in pm8xxx_rtc_set_time()
163 dev_err(dev, "Write to RTC Alarm control register failed\n"); in pm8xxx_rtc_set_time()
169 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags); in pm8xxx_rtc_set_time()
181 const struct pm8xxx_rtc_regs *regs = rtc_dd->regs; in pm8xxx_rtc_read_time()
183 rc = regmap_bulk_read(rtc_dd->regmap, regs->read, value, sizeof(value)); in pm8xxx_rtc_read_time()
185 dev_err(dev, "RTC read data register failed\n"); in pm8xxx_rtc_read_time()
193 rc = regmap_read(rtc_dd->regmap, regs->read, ®); in pm8xxx_rtc_read_time()
195 dev_err(dev, "RTC read data register failed\n"); in pm8xxx_rtc_read_time()
200 rc = regmap_bulk_read(rtc_dd->regmap, regs->read, in pm8xxx_rtc_read_time()
203 dev_err(dev, "RTC read data register failed\n"); in pm8xxx_rtc_read_time()
213 dev_dbg(dev, "secs = %lu, h:m:s == %ptRt, y-m-d = %ptRdr\n", secs, tm, tm); in pm8xxx_rtc_read_time()
224 const struct pm8xxx_rtc_regs *regs = rtc_dd->regs; in pm8xxx_rtc_set_alarm()
226 secs = rtc_tm_to_time64(&alarm->time); in pm8xxx_rtc_set_alarm()
233 rc = regmap_update_bits(rtc_dd->regmap, regs->alarm_ctrl, in pm8xxx_rtc_set_alarm()
234 regs->alarm_en, 0); in pm8xxx_rtc_set_alarm()
238 spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags); in pm8xxx_rtc_set_alarm()
240 rc = regmap_bulk_write(rtc_dd->regmap, regs->alarm_rw, value, in pm8xxx_rtc_set_alarm()
243 dev_err(dev, "Write to RTC ALARM register failed\n"); in pm8xxx_rtc_set_alarm()
247 if (alarm->enabled) { in pm8xxx_rtc_set_alarm()
248 rc = regmap_update_bits(rtc_dd->regmap, regs->alarm_ctrl, in pm8xxx_rtc_set_alarm()
249 regs->alarm_en, regs->alarm_en); in pm8xxx_rtc_set_alarm()
254 dev_dbg(dev, "Alarm Set for h:m:s=%ptRt, y-m-d=%ptRdr\n", in pm8xxx_rtc_set_alarm()
255 &alarm->time, &alarm->time); in pm8xxx_rtc_set_alarm()
257 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags); in pm8xxx_rtc_set_alarm()
267 const struct pm8xxx_rtc_regs *regs = rtc_dd->regs; in pm8xxx_rtc_read_alarm()
269 rc = regmap_bulk_read(rtc_dd->regmap, regs->alarm_rw, value, in pm8xxx_rtc_read_alarm()
272 dev_err(dev, "RTC alarm time read failed\n"); in pm8xxx_rtc_read_alarm()
279 rtc_time64_to_tm(secs, &alarm->time); in pm8xxx_rtc_read_alarm()
281 dev_dbg(dev, "Alarm set for - h:m:s=%ptRt, y-m-d=%ptRdr\n", in pm8xxx_rtc_read_alarm()
282 &alarm->time, &alarm->time); in pm8xxx_rtc_read_alarm()
292 const struct pm8xxx_rtc_regs *regs = rtc_dd->regs; in pm8xxx_rtc_alarm_irq_enable()
296 spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags); in pm8xxx_rtc_alarm_irq_enable()
298 rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg); in pm8xxx_rtc_alarm_irq_enable()
303 ctrl_reg |= regs->alarm_en; in pm8xxx_rtc_alarm_irq_enable()
305 ctrl_reg &= ~regs->alarm_en; in pm8xxx_rtc_alarm_irq_enable()
307 rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg); in pm8xxx_rtc_alarm_irq_enable()
309 dev_err(dev, "Write to RTC control register failed\n"); in pm8xxx_rtc_alarm_irq_enable()
315 rc = regmap_bulk_write(rtc_dd->regmap, regs->alarm_rw, value, in pm8xxx_rtc_alarm_irq_enable()
318 dev_err(dev, "Clear RTC ALARM register failed\n"); in pm8xxx_rtc_alarm_irq_enable()
324 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags); in pm8xxx_rtc_alarm_irq_enable()
339 const struct pm8xxx_rtc_regs *regs = rtc_dd->regs; in pm8xxx_alarm_trigger()
344 rtc_update_irq(rtc_dd->rtc, 1, RTC_IRQF | RTC_AF); in pm8xxx_alarm_trigger()
346 spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags); in pm8xxx_alarm_trigger()
349 rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg); in pm8xxx_alarm_trigger()
351 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags); in pm8xxx_alarm_trigger()
355 ctrl_reg &= ~regs->alarm_en; in pm8xxx_alarm_trigger()
357 rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg); in pm8xxx_alarm_trigger()
359 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags); in pm8xxx_alarm_trigger()
360 dev_err(rtc_dd->rtc_dev, in pm8xxx_alarm_trigger()
365 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags); in pm8xxx_alarm_trigger()
367 /* Clear RTC alarm register */ in pm8xxx_alarm_trigger()
368 rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl2, &ctrl_reg); in pm8xxx_alarm_trigger()
370 dev_err(rtc_dd->rtc_dev, in pm8xxx_alarm_trigger()
371 "RTC Alarm control2 register read failed\n"); in pm8xxx_alarm_trigger()
376 rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl2, ctrl_reg); in pm8xxx_alarm_trigger()
378 dev_err(rtc_dd->rtc_dev, in pm8xxx_alarm_trigger()
379 "Write to RTC Alarm control2 register failed\n"); in pm8xxx_alarm_trigger()
387 const struct pm8xxx_rtc_regs *regs = rtc_dd->regs; in pm8xxx_rtc_enable()
391 /* Check if the RTC is on, else turn it on */ in pm8xxx_rtc_enable()
392 rc = regmap_read(rtc_dd->regmap, regs->ctrl, &ctrl_reg); in pm8xxx_rtc_enable()
398 rc = regmap_write(rtc_dd->regmap, regs->ctrl, ctrl_reg); in pm8xxx_rtc_enable()
437 * Hardcoded RTC bases until IORESOURCE_REG mapping is figured out
440 { .compatible = "qcom,pm8921-rtc", .data = &pm8921_regs },
441 { .compatible = "qcom,pm8018-rtc", .data = &pm8921_regs },
442 { .compatible = "qcom,pm8058-rtc", .data = &pm8058_regs },
443 { .compatible = "qcom,pm8941-rtc", .data = &pm8941_regs },
454 match = of_match_node(pm8xxx_id_table, pdev->dev.of_node); in pm8xxx_rtc_probe()
456 return -ENXIO; in pm8xxx_rtc_probe()
458 rtc_dd = devm_kzalloc(&pdev->dev, sizeof(*rtc_dd), GFP_KERNEL); in pm8xxx_rtc_probe()
460 return -ENOMEM; in pm8xxx_rtc_probe()
462 /* Initialise spinlock to protect RTC control register */ in pm8xxx_rtc_probe()
463 spin_lock_init(&rtc_dd->ctrl_reg_lock); in pm8xxx_rtc_probe()
465 rtc_dd->regmap = dev_get_regmap(pdev->dev.parent, NULL); in pm8xxx_rtc_probe()
466 if (!rtc_dd->regmap) { in pm8xxx_rtc_probe()
467 dev_err(&pdev->dev, "Parent regmap unavailable.\n"); in pm8xxx_rtc_probe()
468 return -ENXIO; in pm8xxx_rtc_probe()
471 rtc_dd->rtc_alarm_irq = platform_get_irq(pdev, 0); in pm8xxx_rtc_probe()
472 if (rtc_dd->rtc_alarm_irq < 0) in pm8xxx_rtc_probe()
473 return -ENXIO; in pm8xxx_rtc_probe()
475 rtc_dd->allow_set_time = of_property_read_bool(pdev->dev.of_node, in pm8xxx_rtc_probe()
476 "allow-set-time"); in pm8xxx_rtc_probe()
478 rtc_dd->regs = match->data; in pm8xxx_rtc_probe()
479 rtc_dd->rtc_dev = &pdev->dev; in pm8xxx_rtc_probe()
487 device_init_wakeup(&pdev->dev, 1); in pm8xxx_rtc_probe()
489 /* Register the RTC device */ in pm8xxx_rtc_probe()
490 rtc_dd->rtc = devm_rtc_allocate_device(&pdev->dev); in pm8xxx_rtc_probe()
491 if (IS_ERR(rtc_dd->rtc)) in pm8xxx_rtc_probe()
492 return PTR_ERR(rtc_dd->rtc); in pm8xxx_rtc_probe()
494 rtc_dd->rtc->ops = &pm8xxx_rtc_ops; in pm8xxx_rtc_probe()
495 rtc_dd->rtc->range_max = U32_MAX; in pm8xxx_rtc_probe()
498 rc = devm_request_any_context_irq(&pdev->dev, rtc_dd->rtc_alarm_irq, in pm8xxx_rtc_probe()
503 dev_err(&pdev->dev, "Request IRQ failed (%d)\n", rc); in pm8xxx_rtc_probe()
507 return rtc_register_device(rtc_dd->rtc); in pm8xxx_rtc_probe()
516 disable_irq_wake(rtc_dd->rtc_alarm_irq); in pm8xxx_rtc_resume()
526 enable_irq_wake(rtc_dd->rtc_alarm_irq); in pm8xxx_rtc_suspend()
539 .name = "rtc-pm8xxx",
547 MODULE_ALIAS("platform:rtc-pm8xxx");
548 MODULE_DESCRIPTION("PMIC8xxx RTC driver");