73 	unsigned short csr; /* control/status reg */  member
117 /* bits in csr reg */
190 // safe bits for the CSR
196 	unsigned short csr = dregs->csr;  in scsi_sun3_intr()  local
200 	dregs->csr &= ~CSR_DMA_ENABLE;  in scsi_sun3_intr()
203 	if(csr & ~CSR_GOOD) {  in scsi_sun3_intr()
204 		if (csr & CSR_DMA_BUSERR)  in scsi_sun3_intr()
206 		if (csr & CSR_DMA_CONFLICT)  in scsi_sun3_intr()
211 	if(csr & (CSR_SDB_INT | CSR_DMA_INT)) {  in scsi_sun3_intr()
242 	dregs->csr &= ~CSR_FIFO;  in sun3scsi_dma_setup()
243 	dregs->csr |= CSR_FIFO;  in sun3scsi_dma_setup()
248 		dregs->csr |= CSR_SEND;  in sun3scsi_dma_setup()
250 		dregs->csr &= ~CSR_SEND;  in sun3scsi_dma_setup()
253 	dregs->csr |= CSR_PACK_ENABLE;  in sun3scsi_dma_setup()
269 	dregs->csr &= ~CSR_FIFO;  in sun3scsi_dma_setup()
270 	dregs->csr |= CSR_FIFO;  in sun3scsi_dma_setup()
348 	unsigned short csr;  in sun3scsi_dma_start()  local
350 	csr = dregs->csr;  in sun3scsi_dma_start()
358 /*	if(!(csr & CSR_DMA_ENABLE))  in sun3scsi_dma_start()
359  *		dregs->csr |= CSR_DMA_ENABLE;  in sun3scsi_dma_start()
378 	dregs->csr &= ~CSR_DMA_ENABLE;  in sun3scsi_dma_finish()
388 	if ((!write_flag) && (dregs->csr & CSR_LEFT)) {  in sun3scsi_dma_finish()
396 		switch (dregs->csr & CSR_LEFT) {  in sun3scsi_dma_finish()
418 			if(dregs->csr & CSR_FIFO_EMPTY)  in sun3scsi_dma_finish()
464 	dregs->csr &= ~CSR_SEND;  in sun3scsi_dma_finish()
465 /*	dregs->csr |= CSR_DMA_ENABLE; */  in sun3scsi_dma_finish()
469 	dregs->csr &= ~CSR_SEND;  in sun3scsi_dma_finish()
472 	dregs->csr &= ~CSR_FIFO;  in sun3scsi_dma_finish()
473 	dregs->csr |= CSR_FIFO;  in sun3scsi_dma_finish()
548 			oldcsr = dregs->csr;  in sun3_scsi_probe()
549 			dregs->csr = 0;  in sun3_scsi_probe()
551 			if (dregs->csr == 0x1400)  in sun3_scsi_probe()
554 			dregs->csr = oldcsr;  in sun3_scsi_probe()
604 	dregs->csr = 0;  in sun3_scsi_probe()
606 	dregs->csr = CSR_SCSI | CSR_FIFO | CSR_INTR;  in sun3_scsi_probe()