Lines Matching +full:spi +full:- +full:base
1 // SPDX-License-Identifier: GPL-2.0-or-later
16 #include <linux/dma-mapping.h>
19 #include <linux/spi/spi.h>
20 #include <linux/spi/spi_bitbang.h>
23 #include <linux/platform_data/spi-davinci.h>
89 /* SPI Controller registers */
104 /* SPI Controller driver's private data. */
111 void __iomem *base; member
137 if (dspi->rx) { in davinci_spi_rx_buf_u8()
138 u8 *rx = dspi->rx; in davinci_spi_rx_buf_u8()
140 dspi->rx = rx; in davinci_spi_rx_buf_u8()
146 if (dspi->rx) { in davinci_spi_rx_buf_u16()
147 u16 *rx = dspi->rx; in davinci_spi_rx_buf_u16()
149 dspi->rx = rx; in davinci_spi_rx_buf_u16()
157 if (dspi->tx) { in davinci_spi_tx_buf_u8()
158 const u8 *tx = dspi->tx; in davinci_spi_tx_buf_u8()
161 dspi->tx = tx; in davinci_spi_tx_buf_u8()
170 if (dspi->tx) { in davinci_spi_tx_buf_u16()
171 const u16 *tx = dspi->tx; in davinci_spi_tx_buf_u16()
174 dspi->tx = tx; in davinci_spi_tx_buf_u16()
198 static void davinci_spi_chipselect(struct spi_device *spi, int value) in davinci_spi_chipselect() argument
201 struct davinci_spi_config *spicfg = spi->controller_data; in davinci_spi_chipselect()
202 u8 chip_sel = spi->chip_select; in davinci_spi_chipselect()
205 dspi = spi_master_get_devdata(spi->master); in davinci_spi_chipselect()
208 if (spicfg && spicfg->wdelay) in davinci_spi_chipselect()
215 if (spi->cs_gpiod) { in davinci_spi_chipselect()
217 gpiod_set_value(spi->cs_gpiod, 1); in davinci_spi_chipselect()
219 gpiod_set_value(spi->cs_gpiod, 0); in davinci_spi_chipselect()
222 if (!(spi->mode & SPI_CS_WORD)) in davinci_spi_chipselect()
228 iowrite16(spidat1, dspi->base + SPIDAT1 + 2); in davinci_spi_chipselect()
232 * davinci_spi_get_prescale - Calculates the correct prescale value
234 * @max_speed_hz: the maximum rate the SPI clock can run at
239 * Returns: calculated prescale value for easy programming into SPI registers
247 /* Subtract 1 to match what will be programmed into SPI register. */ in davinci_spi_get_prescale()
248 ret = DIV_ROUND_UP(clk_get_rate(dspi->clk), max_speed_hz) - 1; in davinci_spi_get_prescale()
250 if (ret < dspi->prescaler_limit || ret > 255) in davinci_spi_get_prescale()
251 return -EINVAL; in davinci_spi_get_prescale()
257 * davinci_spi_setup_transfer - This functions will determine transfer method
258 * @spi: spi device on which data transfer to be done
259 * @t: spi transfer in which transfer info is filled
262 * It will also set the SPI Clock Control register according to
263 * SPI slave device freq.
265 static int davinci_spi_setup_transfer(struct spi_device *spi, in davinci_spi_setup_transfer() argument
275 dspi = spi_master_get_devdata(spi->master); in davinci_spi_setup_transfer()
276 spicfg = spi->controller_data; in davinci_spi_setup_transfer()
281 bits_per_word = t->bits_per_word; in davinci_spi_setup_transfer()
282 hz = t->speed_hz; in davinci_spi_setup_transfer()
287 bits_per_word = spi->bits_per_word; in davinci_spi_setup_transfer()
294 dspi->get_rx = davinci_spi_rx_buf_u8; in davinci_spi_setup_transfer()
295 dspi->get_tx = davinci_spi_tx_buf_u8; in davinci_spi_setup_transfer()
296 dspi->bytes_per_word[spi->chip_select] = 1; in davinci_spi_setup_transfer()
298 dspi->get_rx = davinci_spi_rx_buf_u16; in davinci_spi_setup_transfer()
299 dspi->get_tx = davinci_spi_tx_buf_u16; in davinci_spi_setup_transfer()
300 dspi->bytes_per_word[spi->chip_select] = 2; in davinci_spi_setup_transfer()
304 hz = spi->max_speed_hz; in davinci_spi_setup_transfer()
314 if (spi->mode & SPI_LSB_FIRST) in davinci_spi_setup_transfer()
317 if (spi->mode & SPI_CPOL) in davinci_spi_setup_transfer()
320 if (!(spi->mode & SPI_CPHA)) in davinci_spi_setup_transfer()
324 * Assume wdelay is used only on SPI peripherals that has this field in davinci_spi_setup_transfer()
327 if (spicfg->wdelay) in davinci_spi_setup_transfer()
328 spifmt |= ((spicfg->wdelay << SPIFMT_WDELAY_SHIFT) in davinci_spi_setup_transfer()
332 * Version 1 hardware supports two basic SPI modes: in davinci_spi_setup_transfer()
333 * - Standard SPI mode uses 4 pins, with chipselect in davinci_spi_setup_transfer()
334 * - 3 pin SPI is a 4 pin variant without CS (SPI_NO_CS) in davinci_spi_setup_transfer()
340 * - 5 pin SPI variant is standard SPI plus SPI_READY in davinci_spi_setup_transfer()
341 * - 4 pin with enable is (SPI_READY | SPI_NO_CS) in davinci_spi_setup_transfer()
344 if (dspi->version == SPI_VERSION_2) { in davinci_spi_setup_transfer()
348 if (spicfg->odd_parity) in davinci_spi_setup_transfer()
351 if (spicfg->parity_enable) in davinci_spi_setup_transfer()
354 if (spicfg->timer_disable) { in davinci_spi_setup_transfer()
357 delay |= (spicfg->c2tdelay << SPIDELAY_C2TDELAY_SHIFT) in davinci_spi_setup_transfer()
359 delay |= (spicfg->t2cdelay << SPIDELAY_T2CDELAY_SHIFT) in davinci_spi_setup_transfer()
363 if (spi->mode & SPI_READY) { in davinci_spi_setup_transfer()
365 delay |= (spicfg->t2edelay << SPIDELAY_T2EDELAY_SHIFT) in davinci_spi_setup_transfer()
367 delay |= (spicfg->c2edelay << SPIDELAY_C2EDELAY_SHIFT) in davinci_spi_setup_transfer()
371 iowrite32(delay, dspi->base + SPIDELAY); in davinci_spi_setup_transfer()
374 iowrite32(spifmt, dspi->base + SPIFMT0); in davinci_spi_setup_transfer()
379 static int davinci_spi_of_setup(struct spi_device *spi) in davinci_spi_of_setup() argument
381 struct davinci_spi_config *spicfg = spi->controller_data; in davinci_spi_of_setup()
382 struct device_node *np = spi->dev.of_node; in davinci_spi_of_setup()
383 struct davinci_spi *dspi = spi_master_get_devdata(spi->master); in davinci_spi_of_setup()
389 return -ENOMEM; in davinci_spi_of_setup()
392 if (!of_property_read_u32(np, "ti,spi-wdelay", &prop)) in davinci_spi_of_setup()
393 spicfg->wdelay = (u8)prop; in davinci_spi_of_setup()
394 spi->controller_data = spicfg; in davinci_spi_of_setup()
396 if (dspi->dma_rx && dspi->dma_tx) in davinci_spi_of_setup()
397 spicfg->io_type = SPI_IO_TYPE_DMA; in davinci_spi_of_setup()
404 * davinci_spi_setup - This functions will set default transfer method
405 * @spi: spi device on which data transfer to be done
409 static int davinci_spi_setup(struct spi_device *spi) in davinci_spi_setup() argument
412 struct device_node *np = spi->dev.of_node; in davinci_spi_setup()
415 dspi = spi_master_get_devdata(spi->master); in davinci_spi_setup()
417 if (!(spi->mode & SPI_NO_CS)) { in davinci_spi_setup()
418 if (np && spi->cs_gpiod) in davinci_spi_setup()
422 set_io_bits(dspi->base + SPIPC0, 1 << spi->chip_select); in davinci_spi_setup()
425 if (spi->mode & SPI_READY) in davinci_spi_setup()
426 set_io_bits(dspi->base + SPIPC0, SPIPC0_SPIENA_MASK); in davinci_spi_setup()
428 if (spi->mode & SPI_LOOP) in davinci_spi_setup()
429 set_io_bits(dspi->base + SPIGCR1, SPIGCR1_LOOPBACK_MASK); in davinci_spi_setup()
431 clear_io_bits(dspi->base + SPIGCR1, SPIGCR1_LOOPBACK_MASK); in davinci_spi_setup()
433 return davinci_spi_of_setup(spi); in davinci_spi_setup()
436 static void davinci_spi_cleanup(struct spi_device *spi) in davinci_spi_cleanup() argument
438 struct davinci_spi_config *spicfg = spi->controller_data; in davinci_spi_cleanup()
440 spi->controller_data = NULL; in davinci_spi_cleanup()
441 if (spi->dev.of_node) in davinci_spi_cleanup()
446 struct spi_device *spi, in davinci_spi_can_dma() argument
449 struct davinci_spi_config *spicfg = spi->controller_data; in davinci_spi_can_dma()
453 can_dma = (spicfg->io_type == SPI_IO_TYPE_DMA) && in davinci_spi_can_dma()
454 (xfer->len >= DMA_MIN_BYTES) && in davinci_spi_can_dma()
455 !is_vmalloc_addr(xfer->rx_buf) && in davinci_spi_can_dma()
456 !is_vmalloc_addr(xfer->tx_buf); in davinci_spi_can_dma()
463 struct device *sdev = dspi->bitbang.master->dev.parent; in davinci_spi_check_error()
466 dev_err(sdev, "SPI Time-out Error\n"); in davinci_spi_check_error()
467 return -ETIMEDOUT; in davinci_spi_check_error()
470 dev_err(sdev, "SPI Desynchronization Error\n"); in davinci_spi_check_error()
471 return -EIO; in davinci_spi_check_error()
474 dev_err(sdev, "SPI Bit error\n"); in davinci_spi_check_error()
475 return -EIO; in davinci_spi_check_error()
478 if (dspi->version == SPI_VERSION_2) { in davinci_spi_check_error()
480 dev_err(sdev, "SPI Data Length Error\n"); in davinci_spi_check_error()
481 return -EIO; in davinci_spi_check_error()
484 dev_err(sdev, "SPI Parity Error\n"); in davinci_spi_check_error()
485 return -EIO; in davinci_spi_check_error()
488 dev_err(sdev, "SPI Data Overrun error\n"); in davinci_spi_check_error()
489 return -EIO; in davinci_spi_check_error()
492 dev_err(sdev, "SPI Buffer Init Active\n"); in davinci_spi_check_error()
493 return -EBUSY; in davinci_spi_check_error()
501 * davinci_spi_process_events - check for and handle any SPI controller events
511 buf = ioread32(dspi->base + SPIBUF); in davinci_spi_process_events()
513 if (dspi->rcount > 0 && !(buf & SPIBUF_RXEMPTY_MASK)) { in davinci_spi_process_events()
514 dspi->get_rx(buf & 0xFFFF, dspi); in davinci_spi_process_events()
515 dspi->rcount--; in davinci_spi_process_events()
518 status = ioread32(dspi->base + SPIFLG); in davinci_spi_process_events()
525 if (dspi->wcount > 0 && !(buf & SPIBUF_TXFULL_MASK)) { in davinci_spi_process_events()
526 spidat1 = ioread32(dspi->base + SPIDAT1); in davinci_spi_process_events()
527 dspi->wcount--; in davinci_spi_process_events()
529 spidat1 |= 0xFFFF & dspi->get_tx(dspi); in davinci_spi_process_events()
530 iowrite32(spidat1, dspi->base + SPIDAT1); in davinci_spi_process_events()
541 dspi->rcount = 0; in davinci_spi_dma_rx_callback()
543 if (!dspi->wcount && !dspi->rcount) in davinci_spi_dma_rx_callback()
544 complete(&dspi->done); in davinci_spi_dma_rx_callback()
551 dspi->wcount = 0; in davinci_spi_dma_tx_callback()
553 if (!dspi->wcount && !dspi->rcount) in davinci_spi_dma_tx_callback()
554 complete(&dspi->done); in davinci_spi_dma_tx_callback()
558 * davinci_spi_bufs - functions which will handle transfer data
559 * @spi: spi device on which data transfer to be done
560 * @t: spi transfer in which transfer info is filled
563 * of SPI controller and then wait until the completion will be marked
566 static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t) in davinci_spi_bufs() argument
569 int data_type, ret = -ENOMEM; in davinci_spi_bufs()
575 dspi = spi_master_get_devdata(spi->master); in davinci_spi_bufs()
576 pdata = &dspi->pdata; in davinci_spi_bufs()
577 spicfg = (struct davinci_spi_config *)spi->controller_data; in davinci_spi_bufs()
582 data_type = dspi->bytes_per_word[spi->chip_select]; in davinci_spi_bufs()
584 dspi->tx = t->tx_buf; in davinci_spi_bufs()
585 dspi->rx = t->rx_buf; in davinci_spi_bufs()
586 dspi->wcount = t->len / data_type; in davinci_spi_bufs()
587 dspi->rcount = dspi->wcount; in davinci_spi_bufs()
589 spidat1 = ioread32(dspi->base + SPIDAT1); in davinci_spi_bufs()
591 clear_io_bits(dspi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK); in davinci_spi_bufs()
592 set_io_bits(dspi->base + SPIGCR1, SPIGCR1_SPIENA_MASK); in davinci_spi_bufs()
594 reinit_completion(&dspi->done); in davinci_spi_bufs()
596 if (!davinci_spi_can_dma(spi->master, spi, t)) { in davinci_spi_bufs()
597 if (spicfg->io_type != SPI_IO_TYPE_POLL) in davinci_spi_bufs()
598 set_io_bits(dspi->base + SPIINT, SPIINT_MASKINT); in davinci_spi_bufs()
600 dspi->wcount--; in davinci_spi_bufs()
601 tx_data = dspi->get_tx(dspi); in davinci_spi_bufs()
604 iowrite32(spidat1, dspi->base + SPIDAT1); in davinci_spi_bufs()
608 .src_addr = (unsigned long)dspi->pbase + SPIBUF, in davinci_spi_bufs()
614 .dst_addr = (unsigned long)dspi->pbase + SPIDAT1, in davinci_spi_bufs()
621 dmaengine_slave_config(dspi->dma_rx, &dma_rx_conf); in davinci_spi_bufs()
622 dmaengine_slave_config(dspi->dma_tx, &dma_tx_conf); in davinci_spi_bufs()
624 rxdesc = dmaengine_prep_slave_sg(dspi->dma_rx, in davinci_spi_bufs()
625 t->rx_sg.sgl, t->rx_sg.nents, DMA_DEV_TO_MEM, in davinci_spi_bufs()
630 if (!t->tx_buf) { in davinci_spi_bufs()
631 /* To avoid errors when doing rx-only transfers with in davinci_spi_bufs()
636 t->tx_sg.sgl = t->rx_sg.sgl; in davinci_spi_bufs()
637 t->tx_sg.nents = t->rx_sg.nents; in davinci_spi_bufs()
640 txdesc = dmaengine_prep_slave_sg(dspi->dma_tx, in davinci_spi_bufs()
641 t->tx_sg.sgl, t->tx_sg.nents, DMA_MEM_TO_DEV, in davinci_spi_bufs()
646 rxdesc->callback = davinci_spi_dma_rx_callback; in davinci_spi_bufs()
647 rxdesc->callback_param = (void *)dspi; in davinci_spi_bufs()
648 txdesc->callback = davinci_spi_dma_tx_callback; in davinci_spi_bufs()
649 txdesc->callback_param = (void *)dspi; in davinci_spi_bufs()
651 if (pdata->cshold_bug) in davinci_spi_bufs()
652 iowrite16(spidat1 >> 16, dspi->base + SPIDAT1 + 2); in davinci_spi_bufs()
657 dma_async_issue_pending(dspi->dma_rx); in davinci_spi_bufs()
658 dma_async_issue_pending(dspi->dma_tx); in davinci_spi_bufs()
660 set_io_bits(dspi->base + SPIINT, SPIINT_DMA_REQ_EN); in davinci_spi_bufs()
664 if (spicfg->io_type != SPI_IO_TYPE_POLL) { in davinci_spi_bufs()
665 if (wait_for_completion_timeout(&dspi->done, HZ) == 0) in davinci_spi_bufs()
668 while (dspi->rcount > 0 || dspi->wcount > 0) { in davinci_spi_bufs()
676 clear_io_bits(dspi->base + SPIINT, SPIINT_MASKALL); in davinci_spi_bufs()
677 if (davinci_spi_can_dma(spi->master, spi, t)) in davinci_spi_bufs()
678 clear_io_bits(dspi->base + SPIINT, SPIINT_DMA_REQ_EN); in davinci_spi_bufs()
680 clear_io_bits(dspi->base + SPIGCR1, SPIGCR1_SPIENA_MASK); in davinci_spi_bufs()
681 set_io_bits(dspi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK); in davinci_spi_bufs()
690 dev_name(&spi->dev)); in davinci_spi_bufs()
694 if (dspi->rcount != 0 || dspi->wcount != 0) { in davinci_spi_bufs()
695 dev_err(&spi->dev, "SPI data transfer error\n"); in davinci_spi_bufs()
696 return -EIO; in davinci_spi_bufs()
699 return t->len; in davinci_spi_bufs()
706 * dummy_thread_fn - dummy thread function
707 * @irq: IRQ number for this SPI Master
708 * @data: structure for SPI Master controller davinci_spi
719 * davinci_spi_irq - Interrupt handler for SPI Master Controller
720 * @irq: IRQ number for this SPI Master
721 * @data: structure for SPI Master controller davinci_spi
736 clear_io_bits(dspi->base + SPIINT, SPIINT_MASKINT); in davinci_spi_irq()
738 if ((!dspi->rcount && !dspi->wcount) || status) in davinci_spi_irq()
739 complete(&dspi->done); in davinci_spi_irq()
746 struct device *sdev = dspi->bitbang.master->dev.parent; in davinci_spi_request_dma()
748 dspi->dma_rx = dma_request_chan(sdev, "rx"); in davinci_spi_request_dma()
749 if (IS_ERR(dspi->dma_rx)) in davinci_spi_request_dma()
750 return PTR_ERR(dspi->dma_rx); in davinci_spi_request_dma()
752 dspi->dma_tx = dma_request_chan(sdev, "tx"); in davinci_spi_request_dma()
753 if (IS_ERR(dspi->dma_tx)) { in davinci_spi_request_dma()
754 dma_release_channel(dspi->dma_rx); in davinci_spi_request_dma()
755 return PTR_ERR(dspi->dma_tx); in davinci_spi_request_dma()
763 /* OF SPI data structure */
786 .compatible = "ti,dm6441-spi",
790 .compatible = "ti,da830-spi",
794 .compatible = "ti,keystone-spi",
802 * spi_davinci_get_pdata - Get platform data from DTS binding
813 struct device_node *node = pdev->dev.of_node; in spi_davinci_get_pdata()
819 pdata = &dspi->pdata; in spi_davinci_get_pdata()
821 match = of_match_device(davinci_spi_of_match, &pdev->dev); in spi_davinci_get_pdata()
823 return -ENODEV; in spi_davinci_get_pdata()
825 spi_data = (struct davinci_spi_of_data *)match->data; in spi_davinci_get_pdata()
827 pdata->version = spi_data->version; in spi_davinci_get_pdata()
828 pdata->prescaler_limit = spi_data->prescaler_limit; in spi_davinci_get_pdata()
832 * set to -ENOENT. num-cs includes internal as well as gpios. in spi_davinci_get_pdata()
837 of_property_read_u32(node, "num-cs", &num_cs); in spi_davinci_get_pdata()
838 pdata->num_chipselect = num_cs; in spi_davinci_get_pdata()
839 of_property_read_u32(node, "ti,davinci-spi-intr-line", &intr_line); in spi_davinci_get_pdata()
840 pdata->intr_line = intr_line; in spi_davinci_get_pdata()
847 return -ENODEV; in spi_davinci_get_pdata()
852 * davinci_spi_probe - probe function for SPI Master Controller
857 * This function will map the SPI controller's memory, register IRQ,
858 * Reset SPI controller and setting its registers to default value.
871 master = spi_alloc_master(&pdev->dev, sizeof(struct davinci_spi)); in davinci_spi_probe()
873 ret = -ENOMEM; in davinci_spi_probe()
881 if (dev_get_platdata(&pdev->dev)) { in davinci_spi_probe()
882 pdata = dev_get_platdata(&pdev->dev); in davinci_spi_probe()
883 dspi->pdata = *pdata; in davinci_spi_probe()
892 pdata = &dspi->pdata; in davinci_spi_probe()
894 dspi->bytes_per_word = devm_kcalloc(&pdev->dev, in davinci_spi_probe()
895 pdata->num_chipselect, in davinci_spi_probe()
896 sizeof(*dspi->bytes_per_word), in davinci_spi_probe()
898 if (dspi->bytes_per_word == NULL) { in davinci_spi_probe()
899 ret = -ENOMEM; in davinci_spi_probe()
905 ret = -ENOENT; in davinci_spi_probe()
909 dspi->pbase = r->start; in davinci_spi_probe()
911 dspi->base = devm_ioremap_resource(&pdev->dev, r); in davinci_spi_probe()
912 if (IS_ERR(dspi->base)) { in davinci_spi_probe()
913 ret = PTR_ERR(dspi->base); in davinci_spi_probe()
917 init_completion(&dspi->done); in davinci_spi_probe()
921 ret = -EINVAL; in davinci_spi_probe()
924 dspi->irq = ret; in davinci_spi_probe()
926 ret = devm_request_threaded_irq(&pdev->dev, dspi->irq, davinci_spi_irq, in davinci_spi_probe()
927 dummy_thread_fn, 0, dev_name(&pdev->dev), dspi); in davinci_spi_probe()
931 dspi->bitbang.master = master; in davinci_spi_probe()
933 dspi->clk = devm_clk_get(&pdev->dev, NULL); in davinci_spi_probe()
934 if (IS_ERR(dspi->clk)) { in davinci_spi_probe()
935 ret = -ENODEV; in davinci_spi_probe()
938 ret = clk_prepare_enable(dspi->clk); in davinci_spi_probe()
942 master->use_gpio_descriptors = true; in davinci_spi_probe()
943 master->dev.of_node = pdev->dev.of_node; in davinci_spi_probe()
944 master->bus_num = pdev->id; in davinci_spi_probe()
945 master->num_chipselect = pdata->num_chipselect; in davinci_spi_probe()
946 master->bits_per_word_mask = SPI_BPW_RANGE_MASK(2, 16); in davinci_spi_probe()
947 master->flags = SPI_MASTER_MUST_RX | SPI_MASTER_GPIO_SS; in davinci_spi_probe()
948 master->setup = davinci_spi_setup; in davinci_spi_probe()
949 master->cleanup = davinci_spi_cleanup; in davinci_spi_probe()
950 master->can_dma = davinci_spi_can_dma; in davinci_spi_probe()
952 dspi->bitbang.chipselect = davinci_spi_chipselect; in davinci_spi_probe()
953 dspi->bitbang.setup_transfer = davinci_spi_setup_transfer; in davinci_spi_probe()
954 dspi->prescaler_limit = pdata->prescaler_limit; in davinci_spi_probe()
955 dspi->version = pdata->version; in davinci_spi_probe()
957 dspi->bitbang.flags = SPI_NO_CS | SPI_LSB_FIRST | SPI_LOOP | SPI_CS_WORD; in davinci_spi_probe()
958 if (dspi->version == SPI_VERSION_2) in davinci_spi_probe()
959 dspi->bitbang.flags |= SPI_READY; in davinci_spi_probe()
961 dspi->bitbang.txrx_bufs = davinci_spi_bufs; in davinci_spi_probe()
964 if (ret == -EPROBE_DEFER) { in davinci_spi_probe()
967 dev_info(&pdev->dev, "DMA is not supported (%d)\n", ret); in davinci_spi_probe()
968 dspi->dma_rx = NULL; in davinci_spi_probe()
969 dspi->dma_tx = NULL; in davinci_spi_probe()
972 dspi->get_rx = davinci_spi_rx_buf_u8; in davinci_spi_probe()
973 dspi->get_tx = davinci_spi_tx_buf_u8; in davinci_spi_probe()
975 /* Reset In/OUT SPI module */ in davinci_spi_probe()
976 iowrite32(0, dspi->base + SPIGCR0); in davinci_spi_probe()
978 iowrite32(1, dspi->base + SPIGCR0); in davinci_spi_probe()
982 iowrite32(spipc0, dspi->base + SPIPC0); in davinci_spi_probe()
984 if (pdata->intr_line) in davinci_spi_probe()
985 iowrite32(SPI_INTLVL_1, dspi->base + SPILVL); in davinci_spi_probe()
987 iowrite32(SPI_INTLVL_0, dspi->base + SPILVL); in davinci_spi_probe()
989 iowrite32(CS_DEFAULT, dspi->base + SPIDEF); in davinci_spi_probe()
992 set_io_bits(dspi->base + SPIGCR1, SPIGCR1_CLKMOD_MASK); in davinci_spi_probe()
993 set_io_bits(dspi->base + SPIGCR1, SPIGCR1_MASTER_MASK); in davinci_spi_probe()
994 set_io_bits(dspi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK); in davinci_spi_probe()
996 ret = spi_bitbang_start(&dspi->bitbang); in davinci_spi_probe()
1000 dev_info(&pdev->dev, "Controller at 0x%p\n", dspi->base); in davinci_spi_probe()
1005 if (dspi->dma_rx) { in davinci_spi_probe()
1006 dma_release_channel(dspi->dma_rx); in davinci_spi_probe()
1007 dma_release_channel(dspi->dma_tx); in davinci_spi_probe()
1010 clk_disable_unprepare(dspi->clk); in davinci_spi_probe()
1018 * davinci_spi_remove - remove function for SPI Master Controller
1022 * It will free the IRQ and SPI controller's memory region.
1034 spi_bitbang_stop(&dspi->bitbang); in davinci_spi_remove()
1036 clk_disable_unprepare(dspi->clk); in davinci_spi_remove()
1038 if (dspi->dma_rx) { in davinci_spi_remove()
1039 dma_release_channel(dspi->dma_rx); in davinci_spi_remove()
1040 dma_release_channel(dspi->dma_tx); in davinci_spi_remove()
1057 MODULE_DESCRIPTION("TI DaVinci SPI Master Controller Driver");