Lines Matching +full:lx2160a +full:- +full:fspi
1 // SPDX-License-Identifier: GPL-2.0+
4 * NXP FlexSPI(FSPI) controller driver.
6 * Copyright 2019-2020 NXP
14 * FlexSPI controller is driven by the LUT(Look-up Table) registers
15 * LUT registers are a look-up-table for sequences of instructions.
19 * LUTs are being created at run-time based on the commands passed
20 * from the spi-mem framework, thus using single LUT index.
26 * Based on SPI MEM interface and spi-fsl-qspi.c driver.
55 #include <linux/spi/spi-mem.h>
291 #define LUT_PAD(x) (fls(x) - 1)
297 * ---------------------------------------------------
299 * ---------------------------------------------------
327 .little_endian = true, /* little-endian */
335 .little_endian = true, /* little-endian */
343 .little_endian = true, /* little-endian */
363 * R/W functions for big- or little-endian registers:
364 * The FSPI controller's endianness is independent of
366 * core is little-endian the FSPI controller can use
367 * big-endian or little-endian.
371 if (f->devtype_data->little_endian) in fspi_writel()
379 if (f->devtype_data->little_endian) in fspi_readl()
391 reg = fspi_readl(f, f->iobase + FSPI_INTR); in nxp_fspi_irq_handler()
392 fspi_writel(f, FSPI_INTR_IPCMDDONE, f->iobase + FSPI_INTR); in nxp_fspi_irq_handler()
395 complete(&f->c); in nxp_fspi_irq_handler()
410 return -ENOTSUPP; in nxp_fspi_check_buswidth()
416 struct nxp_fspi *f = spi_controller_get_devdata(mem->spi->master); in nxp_fspi_supports_op()
419 ret = nxp_fspi_check_buswidth(f, op->cmd.buswidth); in nxp_fspi_supports_op()
421 if (op->addr.nbytes) in nxp_fspi_supports_op()
422 ret |= nxp_fspi_check_buswidth(f, op->addr.buswidth); in nxp_fspi_supports_op()
424 if (op->dummy.nbytes) in nxp_fspi_supports_op()
425 ret |= nxp_fspi_check_buswidth(f, op->dummy.buswidth); in nxp_fspi_supports_op()
427 if (op->data.nbytes) in nxp_fspi_supports_op()
428 ret |= nxp_fspi_check_buswidth(f, op->data.buswidth); in nxp_fspi_supports_op()
436 if (op->addr.nbytes > 4) in nxp_fspi_supports_op()
444 if (op->addr.val >= f->memmap_phy_size) in nxp_fspi_supports_op()
448 if (op->dummy.buswidth && in nxp_fspi_supports_op()
449 (op->dummy.nbytes * 8 / op->dummy.buswidth > 64)) in nxp_fspi_supports_op()
453 if (op->data.dir == SPI_MEM_DATA_IN && in nxp_fspi_supports_op()
454 (op->data.nbytes > f->devtype_data->ahb_buf_size || in nxp_fspi_supports_op()
455 (op->data.nbytes > f->devtype_data->rxfifo - 4 && in nxp_fspi_supports_op()
456 !IS_ALIGNED(op->data.nbytes, 8)))) in nxp_fspi_supports_op()
459 if (op->data.dir == SPI_MEM_DATA_OUT && in nxp_fspi_supports_op()
460 op->data.nbytes > f->devtype_data->txfifo) in nxp_fspi_supports_op()
473 if (!f->devtype_data->little_endian) in fspi_readl_poll_tout()
494 reg = fspi_readl(f, f->iobase + FSPI_MCR0); in nxp_fspi_invalid()
495 fspi_writel(f, reg | FSPI_MCR0_SWRST, f->iobase + FSPI_MCR0); in nxp_fspi_invalid()
498 ret = fspi_readl_poll_tout(f, f->iobase + FSPI_MCR0, in nxp_fspi_invalid()
506 void __iomem *base = f->iobase; in nxp_fspi_prepare_lut()
511 lutval[0] |= LUT_DEF(0, LUT_CMD, LUT_PAD(op->cmd.buswidth), in nxp_fspi_prepare_lut()
512 op->cmd.opcode); in nxp_fspi_prepare_lut()
515 if (op->addr.nbytes) { in nxp_fspi_prepare_lut()
517 LUT_PAD(op->addr.buswidth), in nxp_fspi_prepare_lut()
518 op->addr.nbytes * 8); in nxp_fspi_prepare_lut()
523 if (op->dummy.nbytes) { in nxp_fspi_prepare_lut()
529 LUT_PAD(op->data.buswidth), in nxp_fspi_prepare_lut()
530 op->dummy.nbytes * 8 / in nxp_fspi_prepare_lut()
531 op->dummy.buswidth); in nxp_fspi_prepare_lut()
536 if (op->data.nbytes) { in nxp_fspi_prepare_lut()
538 op->data.dir == SPI_MEM_DATA_IN ? in nxp_fspi_prepare_lut()
540 LUT_PAD(op->data.buswidth), in nxp_fspi_prepare_lut()
549 fspi_writel(f, FSPI_LUTKEY_VALUE, f->iobase + FSPI_LUTKEY); in nxp_fspi_prepare_lut()
550 fspi_writel(f, FSPI_LCKER_UNLOCK, f->iobase + FSPI_LCKCR); in nxp_fspi_prepare_lut()
556 dev_dbg(f->dev, "CMD[%x] lutval[0:%x \t 1:%x \t 2:%x \t 3:%x]\n", in nxp_fspi_prepare_lut()
557 op->cmd.opcode, lutval[0], lutval[1], lutval[2], lutval[3]); in nxp_fspi_prepare_lut()
560 fspi_writel(f, FSPI_LUTKEY_VALUE, f->iobase + FSPI_LUTKEY); in nxp_fspi_prepare_lut()
561 fspi_writel(f, FSPI_LCKER_LOCK, f->iobase + FSPI_LCKCR); in nxp_fspi_prepare_lut()
568 if (is_acpi_node(f->dev->fwnode)) in nxp_fspi_clk_prep_enable()
571 ret = clk_prepare_enable(f->clk_en); in nxp_fspi_clk_prep_enable()
575 ret = clk_prepare_enable(f->clk); in nxp_fspi_clk_prep_enable()
577 clk_disable_unprepare(f->clk_en); in nxp_fspi_clk_prep_enable()
586 if (is_acpi_node(f->dev->fwnode)) in nxp_fspi_clk_disable_unprep()
589 clk_disable_unprepare(f->clk); in nxp_fspi_clk_disable_unprep()
590 clk_disable_unprepare(f->clk_en); in nxp_fspi_clk_disable_unprep()
600 * -------- <-- FLSHB2CR0
603 * B2 start address --> -------- <-- FLSHB1CR0
606 * B1 start address --> -------- <-- FLSHA2CR0
609 * A2 start address --> -------- <-- FLSHA1CR0
612 * A1 start address --> -------- (Lower address)
626 * chip-select Flash configuration register.
635 unsigned long rate = spi->max_speed_hz; in nxp_fspi_select_mem()
643 if (f->selected == spi->chip_select) in nxp_fspi_select_mem()
647 fspi_writel(f, 0, f->iobase + FSPI_FLSHA1CR0); in nxp_fspi_select_mem()
648 fspi_writel(f, 0, f->iobase + FSPI_FLSHA2CR0); in nxp_fspi_select_mem()
649 fspi_writel(f, 0, f->iobase + FSPI_FLSHB1CR0); in nxp_fspi_select_mem()
650 fspi_writel(f, 0, f->iobase + FSPI_FLSHB2CR0); in nxp_fspi_select_mem()
653 size_kb = FSPI_FLSHXCR0_SZ(f->memmap_phy_size); in nxp_fspi_select_mem()
655 fspi_writel(f, size_kb, f->iobase + FSPI_FLSHA1CR0 + in nxp_fspi_select_mem()
656 4 * spi->chip_select); in nxp_fspi_select_mem()
658 dev_dbg(f->dev, "Slave device [CS:%x] selected\n", spi->chip_select); in nxp_fspi_select_mem()
662 ret = clk_set_rate(f->clk, rate); in nxp_fspi_select_mem()
670 f->selected = spi->chip_select; in nxp_fspi_select_mem()
675 u32 start = op->addr.val; in nxp_fspi_read_ahb()
676 u32 len = op->data.nbytes; in nxp_fspi_read_ahb()
679 if ((!f->ahb_addr) || start < f->memmap_start || in nxp_fspi_read_ahb()
680 start + len > f->memmap_start + f->memmap_len) { in nxp_fspi_read_ahb()
681 if (f->ahb_addr) in nxp_fspi_read_ahb()
682 iounmap(f->ahb_addr); in nxp_fspi_read_ahb()
684 f->memmap_start = start; in nxp_fspi_read_ahb()
685 f->memmap_len = len > NXP_FSPI_MIN_IOMAP ? in nxp_fspi_read_ahb()
688 f->ahb_addr = ioremap(f->memmap_phy + f->memmap_start, in nxp_fspi_read_ahb()
689 f->memmap_len); in nxp_fspi_read_ahb()
691 if (!f->ahb_addr) { in nxp_fspi_read_ahb()
692 dev_err(f->dev, "failed to alloc memory\n"); in nxp_fspi_read_ahb()
693 return -ENOMEM; in nxp_fspi_read_ahb()
698 memcpy_fromio(op->data.buf.in, in nxp_fspi_read_ahb()
699 f->ahb_addr + start - f->memmap_start, len); in nxp_fspi_read_ahb()
707 void __iomem *base = f->iobase; in nxp_fspi_fill_txfifo()
709 u8 *buf = (u8 *) op->data.buf.out; in nxp_fspi_fill_txfifo()
719 for (i = 0; i < ALIGN_DOWN(op->data.nbytes, 8); i += 8) { in nxp_fspi_fill_txfifo()
721 ret = fspi_readl_poll_tout(f, f->iobase + FSPI_INTR, in nxp_fspi_fill_txfifo()
731 if (i < op->data.nbytes) { in nxp_fspi_fill_txfifo()
735 ret = fspi_readl_poll_tout(f, f->iobase + FSPI_INTR, in nxp_fspi_fill_txfifo()
740 for (j = 0; j < ALIGN(op->data.nbytes - i, 4); j += 4) { in nxp_fspi_fill_txfifo()
751 void __iomem *base = f->iobase; in nxp_fspi_read_rxfifo()
753 int len = op->data.nbytes; in nxp_fspi_read_rxfifo()
754 u8 *buf = (u8 *) op->data.buf.in; in nxp_fspi_read_rxfifo()
762 ret = fspi_readl_poll_tout(f, f->iobase + FSPI_INTR, in nxp_fspi_read_rxfifo()
777 buf = op->data.buf.in + i; in nxp_fspi_read_rxfifo()
779 ret = fspi_readl_poll_tout(f, f->iobase + FSPI_INTR, in nxp_fspi_read_rxfifo()
784 len = op->data.nbytes - i; in nxp_fspi_read_rxfifo()
785 for (j = 0; j < op->data.nbytes - i; j += 4) { in nxp_fspi_read_rxfifo()
789 len -= size; in nxp_fspi_read_rxfifo()
801 void __iomem *base = f->iobase; in nxp_fspi_do_op()
812 init_completion(&f->c); in nxp_fspi_do_op()
814 fspi_writel(f, op->addr.val, base + FSPI_IPCR0); in nxp_fspi_do_op()
820 fspi_writel(f, op->data.nbytes | in nxp_fspi_do_op()
829 if (!wait_for_completion_timeout(&f->c, msecs_to_jiffies(1000))) in nxp_fspi_do_op()
830 err = -ETIMEDOUT; in nxp_fspi_do_op()
833 if (!err && op->data.nbytes && op->data.dir == SPI_MEM_DATA_IN) in nxp_fspi_do_op()
841 struct nxp_fspi *f = spi_controller_get_devdata(mem->spi->master); in nxp_fspi_exec_op()
844 mutex_lock(&f->lock); in nxp_fspi_exec_op()
847 err = fspi_readl_poll_tout(f, f->iobase + FSPI_STS0, in nxp_fspi_exec_op()
851 nxp_fspi_select_mem(f, mem->spi); in nxp_fspi_exec_op()
859 if (op->data.nbytes > (f->devtype_data->rxfifo - 4) && in nxp_fspi_exec_op()
860 op->data.dir == SPI_MEM_DATA_IN) { in nxp_fspi_exec_op()
863 if (op->data.nbytes && op->data.dir == SPI_MEM_DATA_OUT) in nxp_fspi_exec_op()
872 mutex_unlock(&f->lock); in nxp_fspi_exec_op()
879 struct nxp_fspi *f = spi_controller_get_devdata(mem->spi->master); in nxp_fspi_adjust_op_size()
881 if (op->data.dir == SPI_MEM_DATA_OUT) { in nxp_fspi_adjust_op_size()
882 if (op->data.nbytes > f->devtype_data->txfifo) in nxp_fspi_adjust_op_size()
883 op->data.nbytes = f->devtype_data->txfifo; in nxp_fspi_adjust_op_size()
885 if (op->data.nbytes > f->devtype_data->ahb_buf_size) in nxp_fspi_adjust_op_size()
886 op->data.nbytes = f->devtype_data->ahb_buf_size; in nxp_fspi_adjust_op_size()
887 else if (op->data.nbytes > (f->devtype_data->rxfifo - 4)) in nxp_fspi_adjust_op_size()
888 op->data.nbytes = ALIGN_DOWN(op->data.nbytes, 8); in nxp_fspi_adjust_op_size()
896 void __iomem *base = f->iobase; in nxp_fspi_default_setup()
904 ret = clk_set_rate(f->clk, 20000000); in nxp_fspi_default_setup()
914 ret = fspi_readl_poll_tout(f, f->iobase + FSPI_MCR0, in nxp_fspi_default_setup()
934 reg = fspi_readl(f, f->iobase + FSPI_MCR2); in nxp_fspi_default_setup()
946 fspi_writel(f, (f->devtype_data->ahb_buf_size / 8 | in nxp_fspi_default_setup()
960 /* AHB Read - Set lut sequence ID for all CS. */ in nxp_fspi_default_setup()
966 f->selected = -1; in nxp_fspi_default_setup()
976 struct nxp_fspi *f = spi_controller_get_devdata(mem->spi->master); in nxp_fspi_get_name()
977 struct device *dev = &mem->spi->dev; in nxp_fspi_get_name()
981 if (of_get_available_child_count(f->dev->of_node) == 1) in nxp_fspi_get_name()
982 return dev_name(f->dev); in nxp_fspi_get_name()
985 "%s-%d", dev_name(f->dev), in nxp_fspi_get_name()
986 mem->spi->chip_select); in nxp_fspi_get_name()
990 return ERR_PTR(-ENOMEM); in nxp_fspi_get_name()
1006 struct device *dev = &pdev->dev; in nxp_fspi_probe()
1007 struct device_node *np = dev->of_node; in nxp_fspi_probe()
1013 ctlr = spi_alloc_master(&pdev->dev, sizeof(*f)); in nxp_fspi_probe()
1015 return -ENOMEM; in nxp_fspi_probe()
1017 ctlr->mode_bits = SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL | in nxp_fspi_probe()
1021 f->dev = dev; in nxp_fspi_probe()
1022 f->devtype_data = device_get_match_data(dev); in nxp_fspi_probe()
1023 if (!f->devtype_data) { in nxp_fspi_probe()
1024 ret = -ENODEV; in nxp_fspi_probe()
1030 /* find the resources - configuration register address space */ in nxp_fspi_probe()
1031 if (is_acpi_node(f->dev->fwnode)) in nxp_fspi_probe()
1037 f->iobase = devm_ioremap_resource(dev, res); in nxp_fspi_probe()
1038 if (IS_ERR(f->iobase)) { in nxp_fspi_probe()
1039 ret = PTR_ERR(f->iobase); in nxp_fspi_probe()
1043 /* find the resources - controller memory mapped space */ in nxp_fspi_probe()
1044 if (is_acpi_node(f->dev->fwnode)) in nxp_fspi_probe()
1051 ret = -ENODEV; in nxp_fspi_probe()
1056 f->memmap_phy = res->start; in nxp_fspi_probe()
1057 f->memmap_phy_size = resource_size(res); in nxp_fspi_probe()
1060 if (dev_of_node(&pdev->dev)) { in nxp_fspi_probe()
1061 f->clk_en = devm_clk_get(dev, "fspi_en"); in nxp_fspi_probe()
1062 if (IS_ERR(f->clk_en)) { in nxp_fspi_probe()
1063 ret = PTR_ERR(f->clk_en); in nxp_fspi_probe()
1067 f->clk = devm_clk_get(dev, "fspi"); in nxp_fspi_probe()
1068 if (IS_ERR(f->clk)) { in nxp_fspi_probe()
1069 ret = PTR_ERR(f->clk); in nxp_fspi_probe()
1081 reg = fspi_readl(f, f->iobase + FSPI_INTR); in nxp_fspi_probe()
1083 fspi_writel(f, reg, f->iobase + FSPI_INTR); in nxp_fspi_probe()
1091 nxp_fspi_irq_handler, 0, pdev->name, f); in nxp_fspi_probe()
1097 mutex_init(&f->lock); in nxp_fspi_probe()
1099 ctlr->bus_num = -1; in nxp_fspi_probe()
1100 ctlr->num_chipselect = NXP_FSPI_MAX_CHIPSELECT; in nxp_fspi_probe()
1101 ctlr->mem_ops = &nxp_fspi_mem_ops; in nxp_fspi_probe()
1105 ctlr->dev.of_node = np; in nxp_fspi_probe()
1107 ret = devm_spi_register_controller(&pdev->dev, ctlr); in nxp_fspi_probe()
1114 mutex_destroy(&f->lock); in nxp_fspi_probe()
1122 dev_err(dev, "NXP FSPI probe failed\n"); in nxp_fspi_probe()
1131 fspi_writel(f, FSPI_MCR0_MDIS, f->iobase + FSPI_MCR0); in nxp_fspi_remove()
1135 mutex_destroy(&f->lock); in nxp_fspi_remove()
1137 if (f->ahb_addr) in nxp_fspi_remove()
1138 iounmap(f->ahb_addr); in nxp_fspi_remove()
1158 { .compatible = "nxp,lx2160a-fspi", .data = (void *)&lx2160a_data, },
1159 { .compatible = "nxp,imx8mm-fspi", .data = (void *)&imx8mm_data, },
1160 { .compatible = "nxp,imx8qxp-fspi", .data = (void *)&imx8qxp_data, },
1180 .name = "nxp-fspi",
1190 MODULE_DESCRIPTION("NXP FSPI Controller Driver");