Lines Matching +full:quad +full:- +full:phase
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Xilinx Zynq UltraScale+ MPSoC Quad-SPI (QSPI) controller driver
6 * Copyright (C) 2009 - 2015 Xilinx, Inc.
11 #include <linux/dma-mapping.h>
13 #include <linux/firmware/xlnx-zynqmp.h>
24 #include <linux/spi/spi-mem.h>
119 #define GQSPI_TX_FIFO_FILL (GQSPI_TXD_DEPTH -\
141 * struct zynqmp_qspi - Defines qspi driver instance
181 * zynqmp_gqspi_read - For GQSPI controller read operation
188 return readl_relaxed(xqspi->regs + offset); in zynqmp_gqspi_read()
192 * zynqmp_gqspi_write - For GQSPI controller write operation
200 writel_relaxed(val, (xqspi->regs + offset)); in zynqmp_gqspi_write()
204 * zynqmp_gqspi_selectslave - For selection of slave device
207 * @slavebus: To check which bus is selected- upper or lower
220 instanceptr->genfifocs = GQSPI_GENFIFO_CS_LOWER | in zynqmp_gqspi_selectslave()
224 instanceptr->genfifocs = GQSPI_GENFIFO_CS_UPPER; in zynqmp_gqspi_selectslave()
227 instanceptr->genfifocs = GQSPI_GENFIFO_CS_LOWER; in zynqmp_gqspi_selectslave()
230 dev_warn(instanceptr->dev, "Invalid slave select\n"); in zynqmp_gqspi_selectslave()
236 instanceptr->genfifobus = GQSPI_GENFIFO_BUS_LOWER | in zynqmp_gqspi_selectslave()
240 instanceptr->genfifobus = GQSPI_GENFIFO_BUS_UPPER; in zynqmp_gqspi_selectslave()
243 instanceptr->genfifobus = GQSPI_GENFIFO_BUS_LOWER; in zynqmp_gqspi_selectslave()
246 dev_warn(instanceptr->dev, "Invalid slave bus\n"); in zynqmp_gqspi_selectslave()
251 * zynqmp_qspi_init_hw - Initialize the hardware
256 * - Master mode
257 * - TX threshold set to 1
258 * - RX threshold set to 1
259 * - Flash memory interface mode enabled
261 * - Disable and clear all the interrupts
262 * - Enable manual slave select
263 * - Enable manual start
264 * - Deselect all the chip select lines
265 * - Set the little endian mode of TX FIFO and
266 * - Enable the QSPI controller
302 /* Clear pre-scalar by default */ in zynqmp_qspi_init_hw()
339 * zynqmp_qspi_copy_read_data - Copy data to RX buffer
347 memcpy(xqspi->rxbuf, &data, size); in zynqmp_qspi_copy_read_data()
348 xqspi->rxbuf += size; in zynqmp_qspi_copy_read_data()
349 xqspi->bytes_to_receive -= size; in zynqmp_qspi_copy_read_data()
353 * zynqmp_qspi_chipselect - Select or deselect the chip select line
359 struct zynqmp_qspi *xqspi = spi_master_get_devdata(qspi->master); in zynqmp_qspi_chipselect()
366 xqspi->genfifobus = GQSPI_GENFIFO_BUS_LOWER; in zynqmp_qspi_chipselect()
367 xqspi->genfifocs = GQSPI_GENFIFO_CS_LOWER; in zynqmp_qspi_chipselect()
368 genfifoentry |= xqspi->genfifobus; in zynqmp_qspi_chipselect()
369 genfifoentry |= xqspi->genfifocs; in zynqmp_qspi_chipselect()
395 dev_err(xqspi->dev, "Chip select timed out\n"); in zynqmp_qspi_chipselect()
399 * zynqmp_qspi_selectspimode - Selects SPI mode - x1 or x2 or x4.
401 * @spimode: spimode - SPI or DUAL or QUAD.
420 dev_warn(xqspi->dev, "Invalid SPI mode\n"); in zynqmp_qspi_selectspimode()
427 * zynqmp_qspi_config_op - Configure QSPI controller for specified
439 * obtained using the pre-scalar value, the driver sets the clock
455 clk_rate = clk_get_rate(xqspi->refclk); in zynqmp_qspi_config_op()
459 (GQSPI_BAUD_DIV_SHIFT << baud_rate_val)) > qspi->max_speed_hz) in zynqmp_qspi_config_op()
464 /* Set the QSPI clock phase and clock polarity */ in zynqmp_qspi_config_op()
467 if (qspi->mode & SPI_CPHA) in zynqmp_qspi_config_op()
469 if (qspi->mode & SPI_CPOL) in zynqmp_qspi_config_op()
479 * zynqmp_qspi_setup_op - Configure the QSPI controller
489 struct spi_controller *ctlr = qspi->master; in zynqmp_qspi_setup_op()
492 if (ctlr->busy) in zynqmp_qspi_setup_op()
493 return -EBUSY; in zynqmp_qspi_setup_op()
501 * zynqmp_qspi_filltxfifo - Fills the TX FIFO as long as there is room in
511 while ((xqspi->bytes_to_transfer > 0) && (count < size) && (xqspi->txbuf)) { in zynqmp_qspi_filltxfifo()
512 memcpy(&intermediate, xqspi->txbuf, 4); in zynqmp_qspi_filltxfifo()
515 if (xqspi->bytes_to_transfer >= 4) { in zynqmp_qspi_filltxfifo()
516 xqspi->txbuf += 4; in zynqmp_qspi_filltxfifo()
517 xqspi->bytes_to_transfer -= 4; in zynqmp_qspi_filltxfifo()
519 xqspi->txbuf += xqspi->bytes_to_transfer; in zynqmp_qspi_filltxfifo()
520 xqspi->bytes_to_transfer = 0; in zynqmp_qspi_filltxfifo()
527 * zynqmp_qspi_readrxfifo - Fills the RX FIFO as long as there is room in
537 while ((count < size) && (xqspi->bytes_to_receive > 0)) { in zynqmp_qspi_readrxfifo()
538 if (xqspi->bytes_to_receive >= 4) { in zynqmp_qspi_readrxfifo()
539 (*(u32 *)xqspi->rxbuf) = in zynqmp_qspi_readrxfifo()
541 xqspi->rxbuf += 4; in zynqmp_qspi_readrxfifo()
542 xqspi->bytes_to_receive -= 4; in zynqmp_qspi_readrxfifo()
546 count += xqspi->bytes_to_receive; in zynqmp_qspi_readrxfifo()
548 xqspi->bytes_to_receive); in zynqmp_qspi_readrxfifo()
549 xqspi->bytes_to_receive = 0; in zynqmp_qspi_readrxfifo()
555 * zynqmp_qspi_fillgenfifo - Fills the GENFIFO.
565 if (xqspi->txbuf) { in zynqmp_qspi_fillgenfifo()
569 transfer_len = xqspi->bytes_to_transfer; in zynqmp_qspi_fillgenfifo()
570 } else if (xqspi->rxbuf) { in zynqmp_qspi_fillgenfifo()
574 if (xqspi->mode == GQSPI_MODE_DMA) in zynqmp_qspi_fillgenfifo()
575 transfer_len = xqspi->dma_rx_bytes; in zynqmp_qspi_fillgenfifo()
577 transfer_len = xqspi->bytes_to_receive; in zynqmp_qspi_fillgenfifo()
582 transfer_len = xqspi->bytes_to_transfer; in zynqmp_qspi_fillgenfifo()
585 xqspi->genfifoentry = genfifoentry; in zynqmp_qspi_fillgenfifo()
622 if (xqspi->mode == GQSPI_MODE_IO && xqspi->rxbuf) { in zynqmp_qspi_fillgenfifo()
629 * zynqmp_process_dma_irq - Handler for DMA done interrupt of QSPI
639 dma_unmap_single(xqspi->dev, xqspi->dma_addr, in zynqmp_process_dma_irq()
640 xqspi->dma_rx_bytes, DMA_FROM_DEVICE); in zynqmp_process_dma_irq()
641 xqspi->rxbuf += xqspi->dma_rx_bytes; in zynqmp_process_dma_irq()
642 xqspi->bytes_to_receive -= xqspi->dma_rx_bytes; in zynqmp_process_dma_irq()
643 xqspi->dma_rx_bytes = 0; in zynqmp_process_dma_irq()
649 if (xqspi->bytes_to_receive > 0) { in zynqmp_process_dma_irq()
656 genfifoentry = xqspi->genfifoentry; in zynqmp_process_dma_irq()
657 genfifoentry |= xqspi->bytes_to_receive; in zynqmp_process_dma_irq()
678 * zynqmp_qspi_irq - Interrupt service routine of the QSPI controller
700 if (xqspi->mode == GQSPI_MODE_DMA) { in zynqmp_qspi_irq()
721 if (xqspi->bytes_to_receive == 0 && xqspi->bytes_to_transfer == 0 && in zynqmp_qspi_irq()
724 complete(&xqspi->data_completion); in zynqmp_qspi_irq()
731 * zynqmp_qspi_setuprxdma - This function sets up the RX DMA operation
738 u64 dma_align = (u64)(uintptr_t)xqspi->rxbuf; in zynqmp_qspi_setuprxdma()
740 if (xqspi->bytes_to_receive < 8 || in zynqmp_qspi_setuprxdma()
746 xqspi->mode = GQSPI_MODE_IO; in zynqmp_qspi_setuprxdma()
747 xqspi->dma_rx_bytes = 0; in zynqmp_qspi_setuprxdma()
751 rx_rem = xqspi->bytes_to_receive % 4; in zynqmp_qspi_setuprxdma()
752 rx_bytes = (xqspi->bytes_to_receive - rx_rem); in zynqmp_qspi_setuprxdma()
754 addr = dma_map_single(xqspi->dev, (void *)xqspi->rxbuf, in zynqmp_qspi_setuprxdma()
756 if (dma_mapping_error(xqspi->dev, addr)) { in zynqmp_qspi_setuprxdma()
757 dev_err(xqspi->dev, "ERR:rxdma:memory not mapped\n"); in zynqmp_qspi_setuprxdma()
758 return -ENOMEM; in zynqmp_qspi_setuprxdma()
761 xqspi->dma_rx_bytes = rx_bytes; in zynqmp_qspi_setuprxdma()
762 xqspi->dma_addr = addr; in zynqmp_qspi_setuprxdma()
776 xqspi->mode = GQSPI_MODE_DMA; in zynqmp_qspi_setuprxdma()
785 * zynqmp_qspi_write_op - This function sets up the GENFIFO entries,
800 if (xqspi->mode == GQSPI_MODE_DMA) { in zynqmp_qspi_write_op()
806 xqspi->mode = GQSPI_MODE_IO; in zynqmp_qspi_write_op()
811 * zynqmp_qspi_read_op - This function sets up the GENFIFO entries and
832 * zynqmp_qspi_suspend - Suspend method for the QSPI driver
842 struct spi_controller *ctlr = xqspi->ctlr; in zynqmp_qspi_suspend()
855 * zynqmp_qspi_resume - Resume method for the QSPI driver
866 struct spi_controller *ctlr = xqspi->ctlr; in zynqmp_qspi_resume()
876 * zynqmp_runtime_suspend - Runtime suspend method for the SPI driver
887 clk_disable_unprepare(xqspi->refclk); in zynqmp_runtime_suspend()
888 clk_disable_unprepare(xqspi->pclk); in zynqmp_runtime_suspend()
894 * zynqmp_runtime_resume - Runtime resume method for the SPI driver
906 ret = clk_prepare_enable(xqspi->pclk); in zynqmp_runtime_resume()
912 ret = clk_prepare_enable(xqspi->refclk); in zynqmp_runtime_resume()
915 clk_disable_unprepare(xqspi->pclk); in zynqmp_runtime_resume()
923 * zynqmp_qspi_exec_op() - Initiates the QSPI transfer
937 (mem->spi->master); in zynqmp_qspi_exec_op()
940 u16 opcode = op->cmd.opcode; in zynqmp_qspi_exec_op()
943 dev_dbg(xqspi->dev, "cmd:%#x mode:%d.%d.%d.%d\n", in zynqmp_qspi_exec_op()
944 op->cmd.opcode, op->cmd.buswidth, op->addr.buswidth, in zynqmp_qspi_exec_op()
945 op->dummy.buswidth, op->data.buswidth); in zynqmp_qspi_exec_op()
947 mutex_lock(&xqspi->op_lock); in zynqmp_qspi_exec_op()
948 zynqmp_qspi_config_op(xqspi, mem->spi); in zynqmp_qspi_exec_op()
949 zynqmp_qspi_chipselect(mem->spi, false); in zynqmp_qspi_exec_op()
950 genfifoentry |= xqspi->genfifocs; in zynqmp_qspi_exec_op()
951 genfifoentry |= xqspi->genfifobus; in zynqmp_qspi_exec_op()
953 if (op->cmd.opcode) { in zynqmp_qspi_exec_op()
954 reinit_completion(&xqspi->data_completion); in zynqmp_qspi_exec_op()
955 xqspi->txbuf = &opcode; in zynqmp_qspi_exec_op()
956 xqspi->rxbuf = NULL; in zynqmp_qspi_exec_op()
957 xqspi->bytes_to_transfer = op->cmd.nbytes; in zynqmp_qspi_exec_op()
958 xqspi->bytes_to_receive = 0; in zynqmp_qspi_exec_op()
959 zynqmp_qspi_write_op(xqspi, op->cmd.buswidth, genfifoentry); in zynqmp_qspi_exec_op()
967 (&xqspi->data_completion, msecs_to_jiffies(1000))) { in zynqmp_qspi_exec_op()
968 err = -ETIMEDOUT; in zynqmp_qspi_exec_op()
973 if (op->addr.nbytes) { in zynqmp_qspi_exec_op()
974 xqspi->txbuf = &opaddr; in zynqmp_qspi_exec_op()
975 for (i = 0; i < op->addr.nbytes; i++) { in zynqmp_qspi_exec_op()
976 *(((u8 *)xqspi->txbuf) + i) = op->addr.val >> in zynqmp_qspi_exec_op()
977 (8 * (op->addr.nbytes - i - 1)); in zynqmp_qspi_exec_op()
980 reinit_completion(&xqspi->data_completion); in zynqmp_qspi_exec_op()
981 xqspi->rxbuf = NULL; in zynqmp_qspi_exec_op()
982 xqspi->bytes_to_transfer = op->addr.nbytes; in zynqmp_qspi_exec_op()
983 xqspi->bytes_to_receive = 0; in zynqmp_qspi_exec_op()
984 zynqmp_qspi_write_op(xqspi, op->addr.buswidth, genfifoentry); in zynqmp_qspi_exec_op()
994 (&xqspi->data_completion, msecs_to_jiffies(1000))) { in zynqmp_qspi_exec_op()
995 err = -ETIMEDOUT; in zynqmp_qspi_exec_op()
1000 if (op->dummy.nbytes) { in zynqmp_qspi_exec_op()
1001 xqspi->txbuf = NULL; in zynqmp_qspi_exec_op()
1002 xqspi->rxbuf = NULL; in zynqmp_qspi_exec_op()
1004 * xqspi->bytes_to_transfer here represents the dummy circles in zynqmp_qspi_exec_op()
1007 xqspi->bytes_to_transfer = op->dummy.nbytes * 8 / op->dummy.buswidth; in zynqmp_qspi_exec_op()
1008 xqspi->bytes_to_receive = 0; in zynqmp_qspi_exec_op()
1010 * Using op->data.buswidth instead of op->dummy.buswidth here because in zynqmp_qspi_exec_op()
1013 zynqmp_qspi_write_op(xqspi, op->data.buswidth, in zynqmp_qspi_exec_op()
1020 if (op->data.nbytes) { in zynqmp_qspi_exec_op()
1021 reinit_completion(&xqspi->data_completion); in zynqmp_qspi_exec_op()
1022 if (op->data.dir == SPI_MEM_DATA_OUT) { in zynqmp_qspi_exec_op()
1023 xqspi->txbuf = (u8 *)op->data.buf.out; in zynqmp_qspi_exec_op()
1024 xqspi->rxbuf = NULL; in zynqmp_qspi_exec_op()
1025 xqspi->bytes_to_transfer = op->data.nbytes; in zynqmp_qspi_exec_op()
1026 xqspi->bytes_to_receive = 0; in zynqmp_qspi_exec_op()
1027 zynqmp_qspi_write_op(xqspi, op->data.buswidth, in zynqmp_qspi_exec_op()
1038 xqspi->txbuf = NULL; in zynqmp_qspi_exec_op()
1039 xqspi->rxbuf = (u8 *)op->data.buf.in; in zynqmp_qspi_exec_op()
1040 xqspi->bytes_to_receive = op->data.nbytes; in zynqmp_qspi_exec_op()
1041 xqspi->bytes_to_transfer = 0; in zynqmp_qspi_exec_op()
1042 err = zynqmp_qspi_read_op(xqspi, op->data.buswidth, in zynqmp_qspi_exec_op()
1051 if (xqspi->mode == GQSPI_MODE_DMA) { in zynqmp_qspi_exec_op()
1063 (&xqspi->data_completion, msecs_to_jiffies(1000))) in zynqmp_qspi_exec_op()
1064 err = -ETIMEDOUT; in zynqmp_qspi_exec_op()
1069 zynqmp_qspi_chipselect(mem->spi, true); in zynqmp_qspi_exec_op()
1070 mutex_unlock(&xqspi->op_lock); in zynqmp_qspi_exec_op()
1086 * zynqmp_qspi_probe - Probe method for the QSPI driver
1098 struct device *dev = &pdev->dev; in zynqmp_qspi_probe()
1099 struct device_node *np = dev->of_node; in zynqmp_qspi_probe()
1101 ctlr = spi_alloc_master(&pdev->dev, sizeof(*xqspi)); in zynqmp_qspi_probe()
1103 return -ENOMEM; in zynqmp_qspi_probe()
1106 xqspi->dev = dev; in zynqmp_qspi_probe()
1107 xqspi->ctlr = ctlr; in zynqmp_qspi_probe()
1110 xqspi->regs = devm_platform_ioremap_resource(pdev, 0); in zynqmp_qspi_probe()
1111 if (IS_ERR(xqspi->regs)) { in zynqmp_qspi_probe()
1112 ret = PTR_ERR(xqspi->regs); in zynqmp_qspi_probe()
1116 xqspi->pclk = devm_clk_get(&pdev->dev, "pclk"); in zynqmp_qspi_probe()
1117 if (IS_ERR(xqspi->pclk)) { in zynqmp_qspi_probe()
1119 ret = PTR_ERR(xqspi->pclk); in zynqmp_qspi_probe()
1123 xqspi->refclk = devm_clk_get(&pdev->dev, "ref_clk"); in zynqmp_qspi_probe()
1124 if (IS_ERR(xqspi->refclk)) { in zynqmp_qspi_probe()
1126 ret = PTR_ERR(xqspi->refclk); in zynqmp_qspi_probe()
1130 ret = clk_prepare_enable(xqspi->pclk); in zynqmp_qspi_probe()
1136 ret = clk_prepare_enable(xqspi->refclk); in zynqmp_qspi_probe()
1142 init_completion(&xqspi->data_completion); in zynqmp_qspi_probe()
1144 mutex_init(&xqspi->op_lock); in zynqmp_qspi_probe()
1146 pm_runtime_use_autosuspend(&pdev->dev); in zynqmp_qspi_probe()
1147 pm_runtime_set_autosuspend_delay(&pdev->dev, SPI_AUTOSUSPEND_TIMEOUT); in zynqmp_qspi_probe()
1148 pm_runtime_set_active(&pdev->dev); in zynqmp_qspi_probe()
1149 pm_runtime_enable(&pdev->dev); in zynqmp_qspi_probe()
1153 pm_runtime_mark_last_busy(&pdev->dev); in zynqmp_qspi_probe()
1154 pm_runtime_put_autosuspend(&pdev->dev); in zynqmp_qspi_probe()
1155 xqspi->irq = platform_get_irq(pdev, 0); in zynqmp_qspi_probe()
1156 if (xqspi->irq <= 0) { in zynqmp_qspi_probe()
1157 ret = -ENXIO; in zynqmp_qspi_probe()
1160 ret = devm_request_irq(&pdev->dev, xqspi->irq, zynqmp_qspi_irq, in zynqmp_qspi_probe()
1161 0, pdev->name, xqspi); in zynqmp_qspi_probe()
1163 ret = -ENXIO; in zynqmp_qspi_probe()
1168 ret = dma_set_mask(&pdev->dev, DMA_BIT_MASK(44)); in zynqmp_qspi_probe()
1172 ctlr->bits_per_word_mask = SPI_BPW_MASK(8); in zynqmp_qspi_probe()
1173 ctlr->num_chipselect = GQSPI_DEFAULT_NUM_CS; in zynqmp_qspi_probe()
1174 ctlr->mem_ops = &zynqmp_qspi_mem_ops; in zynqmp_qspi_probe()
1175 ctlr->setup = zynqmp_qspi_setup_op; in zynqmp_qspi_probe()
1176 ctlr->max_speed_hz = clk_get_rate(xqspi->refclk) / 2; in zynqmp_qspi_probe()
1177 ctlr->bits_per_word_mask = SPI_BPW_MASK(8); in zynqmp_qspi_probe()
1178 ctlr->mode_bits = SPI_CPOL | SPI_CPHA | SPI_RX_DUAL | SPI_RX_QUAD | in zynqmp_qspi_probe()
1180 ctlr->dev.of_node = np; in zynqmp_qspi_probe()
1182 ret = devm_spi_register_controller(&pdev->dev, ctlr); in zynqmp_qspi_probe()
1184 dev_err(&pdev->dev, "spi_register_controller failed\n"); in zynqmp_qspi_probe()
1191 pm_runtime_set_suspended(&pdev->dev); in zynqmp_qspi_probe()
1192 pm_runtime_disable(&pdev->dev); in zynqmp_qspi_probe()
1193 clk_disable_unprepare(xqspi->refclk); in zynqmp_qspi_probe()
1195 clk_disable_unprepare(xqspi->pclk); in zynqmp_qspi_probe()
1203 * zynqmp_qspi_remove - Remove method for the QSPI driver
1217 clk_disable_unprepare(xqspi->refclk); in zynqmp_qspi_remove()
1218 clk_disable_unprepare(xqspi->pclk); in zynqmp_qspi_remove()
1219 pm_runtime_set_suspended(&pdev->dev); in zynqmp_qspi_remove()
1220 pm_runtime_disable(&pdev->dev); in zynqmp_qspi_remove()
1226 { .compatible = "xlnx,zynqmp-qspi-1.0", },
1236 .name = "zynqmp-qspi",