Lines Matching +full:s32v234 +full:- +full:linflexuart
1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2012-2016 Freescale Semiconductor, Inc.
6 * Copyright 2017-2019 NXP
20 /* All registers are 32-bit width */
115 #define DRIVER_NAME "fsl-linflexuart"
125 .compatible = "fsl,s32v234-linflexuart",
147 ier = readl(port->membase + LINIER); in linflex_stop_tx()
149 writel(ier, port->membase + LINIER); in linflex_stop_tx()
156 ier = readl(port->membase + LINIER); in linflex_stop_rx()
157 writel(ier & ~LINFLEXD_LINIER_DRIE, port->membase + LINIER); in linflex_stop_rx()
162 struct circ_buf *xmit = &sport->state->xmit; in linflex_transmit_buffer()
167 c = xmit->buf[xmit->tail]; in linflex_transmit_buffer()
168 writeb(c, sport->membase + BDRL); in linflex_transmit_buffer()
171 while (((status = readl(sport->membase + UARTSR)) & in linflex_transmit_buffer()
176 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); in linflex_transmit_buffer()
177 sport->icount.tx++; in linflex_transmit_buffer()
180 sport->membase + UARTSR); in linflex_transmit_buffer()
195 ier = readl(port->membase + LINIER); in linflex_start_tx()
196 writel(ier | LINFLEXD_LINIER_DTIE, port->membase + LINIER); in linflex_start_tx()
202 struct circ_buf *xmit = &sport->state->xmit; in linflex_txint()
206 spin_lock_irqsave(&sport->lock, flags); in linflex_txint()
208 if (sport->x_char) { in linflex_txint()
209 writeb(sport->x_char, sport->membase + BDRL); in linflex_txint()
212 while (((status = readl(sport->membase + UARTSR)) & in linflex_txint()
217 sport->membase + UARTSR); in linflex_txint()
233 spin_unlock_irqrestore(&sport->lock, flags); in linflex_txint()
241 struct tty_port *port = &sport->state->port; in linflex_rxint()
246 spin_lock_irqsave(&sport->lock, flags); in linflex_rxint()
248 status = readl(sport->membase + UARTSR); in linflex_rxint()
250 rx = readb(sport->membase + BDRM); in linflex_rxint()
253 sport->icount.rx++; in linflex_rxint()
271 sport->membase + UARTSR); in linflex_rxint()
272 status = readl(sport->membase + UARTSR); in linflex_rxint()
283 spin_unlock_irqrestore(&sport->lock, flags); in linflex_rxint()
295 status = readl(sport->membase + UARTSR); in linflex_int()
310 status = readl(port->membase + UARTSR) & LINFLEXD_UARTSR_DTFTFF; in linflex_tx_empty()
333 ier = readl(sport->membase + LINIER); in linflex_setup_watermark()
335 writel(ier, sport->membase + LINIER); in linflex_setup_watermark()
337 cr = readl(sport->membase + UARTCR); in linflex_setup_watermark()
339 writel(cr, sport->membase + UARTCR); in linflex_setup_watermark()
343 /* set the Linflex in master mode and activate by-pass filter */ in linflex_setup_watermark()
346 writel(cr1, sport->membase + LINCR1); in linflex_setup_watermark()
349 while ((readl(sport->membase + LINSR) in linflex_setup_watermark()
355 * UART = 0x1; - Linflex working in UART mode in linflex_setup_watermark()
356 * TXEN = 0x1; - Enable transmission of data now in linflex_setup_watermark()
357 * RXEn = 0x1; - Receiver enabled in linflex_setup_watermark()
358 * WL0 = 0x1; - 8 bit data in linflex_setup_watermark()
359 * PCE = 0x0; - No parity in linflex_setup_watermark()
363 writel(LINFLEXD_UARTCR_UART, sport->membase + UARTCR); in linflex_setup_watermark()
368 writel(cr, sport->membase + UARTCR); in linflex_setup_watermark()
372 writel(cr1, sport->membase + LINCR1); in linflex_setup_watermark()
374 ier = readl(sport->membase + LINIER); in linflex_setup_watermark()
378 writel(ier, sport->membase + LINIER); in linflex_setup_watermark()
386 spin_lock_irqsave(&port->lock, flags); in linflex_startup()
390 spin_unlock_irqrestore(&port->lock, flags); in linflex_startup()
392 ret = devm_request_irq(port->dev, port->irq, linflex_int, 0, in linflex_startup()
403 spin_lock_irqsave(&port->lock, flags); in linflex_shutdown()
406 ier = readl(port->membase + LINIER); in linflex_shutdown()
408 writel(ier, port->membase + LINIER); in linflex_shutdown()
410 spin_unlock_irqrestore(&port->lock, flags); in linflex_shutdown()
412 devm_free_irq(port->dev, port->irq, port); in linflex_shutdown()
421 unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8; in linflex_set_termios()
423 cr = readl(port->membase + UARTCR); in linflex_set_termios()
427 cr1 = readl(port->membase + LINCR1); in linflex_set_termios()
429 writel(cr1, port->membase + LINCR1); in linflex_set_termios()
432 while ((readl(port->membase + LINSR) in linflex_set_termios()
440 * - (7,e/o,1) in linflex_set_termios()
441 * - (8,n,1) in linflex_set_termios()
442 * - (8,e/o,1) in linflex_set_termios()
446 while ((termios->c_cflag & CSIZE) != CS8 && in linflex_set_termios()
447 (termios->c_cflag & CSIZE) != CS7) { in linflex_set_termios()
448 termios->c_cflag &= ~CSIZE; in linflex_set_termios()
449 termios->c_cflag |= old_csize; in linflex_set_termios()
453 if ((termios->c_cflag & CSIZE) == CS7) { in linflex_set_termios()
458 if ((termios->c_cflag & CSIZE) == CS8) { in linflex_set_termios()
463 if (termios->c_cflag & CMSPAR) { in linflex_set_termios()
464 if ((termios->c_cflag & CSIZE) != CS8) { in linflex_set_termios()
465 termios->c_cflag &= ~CSIZE; in linflex_set_termios()
466 termios->c_cflag |= CS8; in linflex_set_termios()
472 if (termios->c_cflag & CSTOPB) in linflex_set_termios()
473 termios->c_cflag &= ~CSTOPB; in linflex_set_termios()
475 /* parity must be enabled when CS7 to match 8-bits format */ in linflex_set_termios()
476 if ((termios->c_cflag & CSIZE) == CS7) in linflex_set_termios()
477 termios->c_cflag |= PARENB; in linflex_set_termios()
479 if ((termios->c_cflag & PARENB)) { in linflex_set_termios()
481 if (termios->c_cflag & PARODD) in linflex_set_termios()
491 spin_lock_irqsave(&port->lock, flags); in linflex_set_termios()
493 port->read_status_mask = 0; in linflex_set_termios()
495 if (termios->c_iflag & INPCK) in linflex_set_termios()
496 port->read_status_mask |= (LINFLEXD_UARTSR_FEF | in linflex_set_termios()
501 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK)) in linflex_set_termios()
502 port->read_status_mask |= LINFLEXD_UARTSR_FEF; in linflex_set_termios()
505 port->ignore_status_mask = 0; in linflex_set_termios()
506 if (termios->c_iflag & IGNPAR) in linflex_set_termios()
507 port->ignore_status_mask |= LINFLEXD_UARTSR_PE; in linflex_set_termios()
508 if (termios->c_iflag & IGNBRK) { in linflex_set_termios()
509 port->ignore_status_mask |= LINFLEXD_UARTSR_PE; in linflex_set_termios()
514 if (termios->c_iflag & IGNPAR) in linflex_set_termios()
515 port->ignore_status_mask |= LINFLEXD_UARTSR_BOF; in linflex_set_termios()
518 writel(cr, port->membase + UARTCR); in linflex_set_termios()
522 writel(cr1, port->membase + LINCR1); in linflex_set_termios()
524 spin_unlock_irqrestore(&port->lock, flags); in linflex_set_termios()
542 /* configure/auto-configure the port */
546 port->type = PORT_LINFLEXUART; in linflex_config_port()
573 cr = readl(port->membase + UARTCR); in linflex_console_putchar()
575 writeb(ch, port->membase + BDRL); in linflex_console_putchar()
578 while ((readl(port->membase + UARTSR) & in linflex_console_putchar()
583 while (readl(port->membase + UARTSR) & in linflex_console_putchar()
588 writel((readl(port->membase + UARTSR) | in linflex_console_putchar()
590 port->membase + UARTSR); in linflex_console_putchar()
641 ier = readl(sport->membase + LINIER); in linflex_string_write()
644 cr = readl(sport->membase + UARTCR); in linflex_string_write()
646 writel(cr, sport->membase + UARTCR); in linflex_string_write()
650 writel(ier, sport->membase + LINIER); in linflex_string_write()
656 struct uart_port *sport = linflex_ports[co->index]; in linflex_console_write()
660 if (sport->sysrq) in linflex_console_write()
663 locked = spin_trylock_irqsave(&sport->lock, flags); in linflex_console_write()
665 spin_lock_irqsave(&sport->lock, flags); in linflex_console_write()
670 spin_unlock_irqrestore(&sport->lock, flags); in linflex_console_write()
682 cr = readl(sport->membase + UARTCR); in linflex_console_get_options()
721 if (co->index == -1 || co->index >= ARRAY_SIZE(linflex_ports)) in linflex_console_setup()
722 co->index = 0; in linflex_console_setup()
724 sport = linflex_ports[co->index]; in linflex_console_setup()
726 return -ENODEV; in linflex_console_setup()
733 if (earlycon_port && sport->mapbase == earlycon_port->mapbase) { in linflex_console_setup()
780 .index = -1,
787 struct earlycon_device *dev = con->data; in linflex_earlycon_write()
789 uart_console_write(&dev->port, s, n, linflex_earlycon_putchar); in linflex_earlycon_write()
795 if (!device->port.membase) in linflex_early_console_setup()
796 return -ENODEV; in linflex_early_console_setup()
798 device->con->write = linflex_earlycon_write; in linflex_early_console_setup()
799 earlycon_port = &device->port; in linflex_early_console_setup()
804 OF_EARLYCON_DECLARE(linflex, "fsl,s32v234-linflexuart",
822 struct device_node *np = pdev->dev.of_node; in linflex_probe()
827 sport = devm_kzalloc(&pdev->dev, sizeof(*sport), GFP_KERNEL); in linflex_probe()
829 return -ENOMEM; in linflex_probe()
833 dev_err(&pdev->dev, "failed to get alias id, errno %d\n", ret); in linflex_probe()
837 dev_err(&pdev->dev, "driver limited to %d serial ports\n", in linflex_probe()
839 return -ENOMEM; in linflex_probe()
842 sport->line = ret; in linflex_probe()
846 return -ENODEV; in linflex_probe()
848 sport->mapbase = res->start; in linflex_probe()
849 sport->membase = devm_ioremap_resource(&pdev->dev, res); in linflex_probe()
850 if (IS_ERR(sport->membase)) in linflex_probe()
851 return PTR_ERR(sport->membase); in linflex_probe()
853 sport->dev = &pdev->dev; in linflex_probe()
854 sport->type = PORT_LINFLEXUART; in linflex_probe()
855 sport->iotype = UPIO_MEM; in linflex_probe()
856 sport->irq = platform_get_irq(pdev, 0); in linflex_probe()
857 sport->ops = &linflex_pops; in linflex_probe()
858 sport->flags = UPF_BOOT_AUTOCONF; in linflex_probe()
859 sport->has_sysrq = IS_ENABLED(CONFIG_SERIAL_FSL_LINFLEXUART_CONSOLE); in linflex_probe()
861 linflex_ports[sport->line] = sport; in linflex_probe()