Lines Matching +full:data +full:- +full:crci
1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/dma-mapping.h>
188 writel_relaxed(val, port->membase + off); in msm_write()
194 return readl_relaxed(port->membase + off); in msm_read()
206 port->uartclk = 1843200; in msm_serial_set_mnd_regs_tcxo()
218 port->uartclk = 1843200; in msm_serial_set_mnd_regs_tcxoby4()
229 if (msm_port->is_uartdm) in msm_serial_set_mnd_regs()
232 if (port->uartclk == 19200000) in msm_serial_set_mnd_regs()
234 else if (port->uartclk == 4800000) in msm_serial_set_mnd_regs()
243 struct device *dev = port->dev; in msm_stop_dma()
247 mapped = dma->count; in msm_stop_dma()
248 dma->count = 0; in msm_stop_dma()
250 dmaengine_terminate_all(dma->chan); in msm_stop_dma()
260 val &= ~dma->enable_bit; in msm_stop_dma()
264 dma_unmap_single(dev, dma->phys, mapped, dma->dir); in msm_stop_dma()
271 dma = &msm_port->tx_dma; in msm_release_dma()
272 if (dma->chan) { in msm_release_dma()
273 msm_stop_dma(&msm_port->uart, dma); in msm_release_dma()
274 dma_release_channel(dma->chan); in msm_release_dma()
279 dma = &msm_port->rx_dma; in msm_release_dma()
280 if (dma->chan) { in msm_release_dma()
281 msm_stop_dma(&msm_port->uart, dma); in msm_release_dma()
282 dma_release_channel(dma->chan); in msm_release_dma()
283 kfree(dma->virt); in msm_release_dma()
291 struct device *dev = msm_port->uart.dev; in msm_request_tx_dma()
294 u32 crci = 0; in msm_request_tx_dma() local
297 dma = &msm_port->tx_dma; in msm_request_tx_dma()
300 dma->chan = dma_request_chan(dev, "tx"); in msm_request_tx_dma()
301 if (IS_ERR(dma->chan)) in msm_request_tx_dma()
304 of_property_read_u32(dev->of_node, "qcom,tx-crci", &crci); in msm_request_tx_dma()
311 conf.slave_id = crci; in msm_request_tx_dma()
313 ret = dmaengine_slave_config(dma->chan, &conf); in msm_request_tx_dma()
317 dma->dir = DMA_TO_DEVICE; in msm_request_tx_dma()
319 if (msm_port->is_uartdm < UARTDM_1P4) in msm_request_tx_dma()
320 dma->enable_bit = UARTDM_DMEN_TX_DM_ENABLE; in msm_request_tx_dma()
322 dma->enable_bit = UARTDM_DMEN_TX_BAM_ENABLE; in msm_request_tx_dma()
327 dma_release_channel(dma->chan); in msm_request_tx_dma()
334 struct device *dev = msm_port->uart.dev; in msm_request_rx_dma()
337 u32 crci = 0; in msm_request_rx_dma() local
340 dma = &msm_port->rx_dma; in msm_request_rx_dma()
343 dma->chan = dma_request_chan(dev, "rx"); in msm_request_rx_dma()
344 if (IS_ERR(dma->chan)) in msm_request_rx_dma()
347 of_property_read_u32(dev->of_node, "qcom,rx-crci", &crci); in msm_request_rx_dma()
349 dma->virt = kzalloc(UARTDM_RX_SIZE, GFP_KERNEL); in msm_request_rx_dma()
350 if (!dma->virt) in msm_request_rx_dma()
358 conf.slave_id = crci; in msm_request_rx_dma()
360 ret = dmaengine_slave_config(dma->chan, &conf); in msm_request_rx_dma()
364 dma->dir = DMA_FROM_DEVICE; in msm_request_rx_dma()
366 if (msm_port->is_uartdm < UARTDM_1P4) in msm_request_rx_dma()
367 dma->enable_bit = UARTDM_DMEN_RX_DM_ENABLE; in msm_request_rx_dma()
369 dma->enable_bit = UARTDM_DMEN_RX_BAM_ENABLE; in msm_request_rx_dma()
373 kfree(dma->virt); in msm_request_rx_dma()
375 dma_release_channel(dma->chan); in msm_request_rx_dma()
388 if (!timeout--) in msm_wait_for_xmitr()
398 msm_port->imr &= ~UART_IMR_TXLEV; in msm_stop_tx()
399 msm_write(port, msm_port->imr, UART_IMR); in msm_stop_tx()
405 struct msm_dma *dma = &msm_port->tx_dma; in msm_start_tx()
408 if (dma->count) in msm_start_tx()
411 msm_port->imr |= UART_IMR_TXLEV; in msm_start_tx()
412 msm_write(port, msm_port->imr, UART_IMR); in msm_start_tx()
425 struct uart_port *port = &msm_port->uart; in msm_complete_tx_dma()
426 struct circ_buf *xmit = &port->state->xmit; in msm_complete_tx_dma()
427 struct msm_dma *dma = &msm_port->tx_dma; in msm_complete_tx_dma()
434 spin_lock_irqsave(&port->lock, flags); in msm_complete_tx_dma()
437 if (!dma->count) in msm_complete_tx_dma()
440 status = dmaengine_tx_status(dma->chan, dma->cookie, &state); in msm_complete_tx_dma()
442 dma_unmap_single(port->dev, dma->phys, dma->count, dma->dir); in msm_complete_tx_dma()
445 val &= ~dma->enable_bit; in msm_complete_tx_dma()
448 if (msm_port->is_uartdm > UARTDM_1P3) { in msm_complete_tx_dma()
453 count = dma->count - state.residue; in msm_complete_tx_dma()
454 port->icount.tx += count; in msm_complete_tx_dma()
455 dma->count = 0; in msm_complete_tx_dma()
457 xmit->tail += count; in msm_complete_tx_dma()
458 xmit->tail &= UART_XMIT_SIZE - 1; in msm_complete_tx_dma()
461 msm_port->imr |= UART_IMR_TXLEV; in msm_complete_tx_dma()
462 msm_write(port, msm_port->imr, UART_IMR); in msm_complete_tx_dma()
469 spin_unlock_irqrestore(&port->lock, flags); in msm_complete_tx_dma()
474 struct circ_buf *xmit = &msm_port->uart.state->xmit; in msm_handle_tx_dma()
475 struct uart_port *port = &msm_port->uart; in msm_handle_tx_dma()
476 struct msm_dma *dma = &msm_port->tx_dma; in msm_handle_tx_dma()
481 cpu_addr = &xmit->buf[xmit->tail]; in msm_handle_tx_dma()
483 dma->phys = dma_map_single(port->dev, cpu_addr, count, dma->dir); in msm_handle_tx_dma()
484 ret = dma_mapping_error(port->dev, dma->phys); in msm_handle_tx_dma()
488 dma->desc = dmaengine_prep_slave_single(dma->chan, dma->phys, in msm_handle_tx_dma()
492 if (!dma->desc) { in msm_handle_tx_dma()
493 ret = -EIO; in msm_handle_tx_dma()
497 dma->desc->callback = msm_complete_tx_dma; in msm_handle_tx_dma()
498 dma->desc->callback_param = msm_port; in msm_handle_tx_dma()
500 dma->cookie = dmaengine_submit(dma->desc); in msm_handle_tx_dma()
501 ret = dma_submit_error(dma->cookie); in msm_handle_tx_dma()
509 msm_port->imr &= ~UART_IMR_TXLEV; in msm_handle_tx_dma()
510 msm_write(port, msm_port->imr, UART_IMR); in msm_handle_tx_dma()
512 dma->count = count; in msm_handle_tx_dma()
515 val |= dma->enable_bit; in msm_handle_tx_dma()
517 if (msm_port->is_uartdm < UARTDM_1P4) in msm_handle_tx_dma()
522 if (msm_port->is_uartdm > UARTDM_1P3) in msm_handle_tx_dma()
525 dma_async_issue_pending(dma->chan); in msm_handle_tx_dma()
528 dma_unmap_single(port->dev, dma->phys, count, dma->dir); in msm_handle_tx_dma()
535 struct uart_port *port = &msm_port->uart; in msm_complete_rx_dma()
536 struct tty_port *tport = &port->state->port; in msm_complete_rx_dma()
537 struct msm_dma *dma = &msm_port->rx_dma; in msm_complete_rx_dma()
542 spin_lock_irqsave(&port->lock, flags); in msm_complete_rx_dma()
545 if (!dma->count) in msm_complete_rx_dma()
549 val &= ~dma->enable_bit; in msm_complete_rx_dma()
553 port->icount.overrun++; in msm_complete_rx_dma()
560 port->icount.rx += count; in msm_complete_rx_dma()
562 dma->count = 0; in msm_complete_rx_dma()
564 dma_unmap_single(port->dev, dma->phys, UARTDM_RX_SIZE, dma->dir); in msm_complete_rx_dma()
569 if (msm_port->break_detected && dma->virt[i] == 0) { in msm_complete_rx_dma()
570 port->icount.brk++; in msm_complete_rx_dma()
572 msm_port->break_detected = false; in msm_complete_rx_dma()
577 if (!(port->read_status_mask & UART_SR_RX_BREAK)) in msm_complete_rx_dma()
580 spin_unlock_irqrestore(&port->lock, flags); in msm_complete_rx_dma()
581 sysrq = uart_handle_sysrq_char(port, dma->virt[i]); in msm_complete_rx_dma()
582 spin_lock_irqsave(&port->lock, flags); in msm_complete_rx_dma()
584 tty_insert_flip_char(tport, dma->virt[i], flag); in msm_complete_rx_dma()
589 spin_unlock_irqrestore(&port->lock, flags); in msm_complete_rx_dma()
597 struct msm_dma *dma = &msm_port->rx_dma; in msm_start_rx_dma()
598 struct uart_port *uart = &msm_port->uart; in msm_start_rx_dma()
605 if (!dma->chan) in msm_start_rx_dma()
608 dma->phys = dma_map_single(uart->dev, dma->virt, in msm_start_rx_dma()
609 UARTDM_RX_SIZE, dma->dir); in msm_start_rx_dma()
610 ret = dma_mapping_error(uart->dev, dma->phys); in msm_start_rx_dma()
614 dma->desc = dmaengine_prep_slave_single(dma->chan, dma->phys, in msm_start_rx_dma()
617 if (!dma->desc) in msm_start_rx_dma()
620 dma->desc->callback = msm_complete_rx_dma; in msm_start_rx_dma()
621 dma->desc->callback_param = msm_port; in msm_start_rx_dma()
623 dma->cookie = dmaengine_submit(dma->desc); in msm_start_rx_dma()
624 ret = dma_submit_error(dma->cookie); in msm_start_rx_dma()
628 * Using DMA for FIFO off-load, no need for "Rx FIFO over in msm_start_rx_dma()
631 msm_port->imr &= ~(UART_IMR_RXLEV | UART_IMR_RXSTALE); in msm_start_rx_dma()
637 if (msm_port->is_uartdm < UARTDM_1P4) in msm_start_rx_dma()
638 msm_port->imr |= UART_IMR_RXSTALE; in msm_start_rx_dma()
640 msm_write(uart, msm_port->imr, UART_IMR); in msm_start_rx_dma()
642 dma->count = UARTDM_RX_SIZE; in msm_start_rx_dma()
644 dma_async_issue_pending(dma->chan); in msm_start_rx_dma()
650 val |= dma->enable_bit; in msm_start_rx_dma()
652 if (msm_port->is_uartdm < UARTDM_1P4) in msm_start_rx_dma()
657 if (msm_port->is_uartdm > UARTDM_1P3) in msm_start_rx_dma()
662 dma_unmap_single(uart->dev, dma->phys, UARTDM_RX_SIZE, dma->dir); in msm_start_rx_dma()
676 /* Re-enable RX interrupts */ in msm_start_rx_dma()
677 msm_port->imr |= (UART_IMR_RXLEV | UART_IMR_RXSTALE); in msm_start_rx_dma()
678 msm_write(uart, msm_port->imr, UART_IMR); in msm_start_rx_dma()
684 struct msm_dma *dma = &msm_port->rx_dma; in msm_stop_rx()
686 msm_port->imr &= ~(UART_IMR_RXLEV | UART_IMR_RXSTALE); in msm_stop_rx()
687 msm_write(port, msm_port->imr, UART_IMR); in msm_stop_rx()
689 if (dma->chan) in msm_stop_rx()
697 msm_port->imr |= UART_IMR_DELTA_CTS; in msm_enable_ms()
698 msm_write(port, msm_port->imr, UART_IMR); in msm_enable_ms()
702 __must_hold(&port->lock) in msm_handle_rx_dm()
704 struct tty_port *tport = &port->state->port; in msm_handle_rx_dm()
710 port->icount.overrun++; in msm_handle_rx_dm()
716 count = msm_read(port, UARTDM_RX_TOTAL_SNAP) - in msm_handle_rx_dm()
717 msm_port->old_snap_state; in msm_handle_rx_dm()
718 msm_port->old_snap_state = 0; in msm_handle_rx_dm()
721 msm_port->old_snap_state += count; in msm_handle_rx_dm()
726 port->icount.rx += count; in msm_handle_rx_dm()
734 msm_port->old_snap_state -= count; in msm_handle_rx_dm()
738 ioread32_rep(port->membase + UARTDM_RF, buf, 1); in msm_handle_rx_dm()
744 if (msm_port->break_detected && buf[i] == 0) { in msm_handle_rx_dm()
745 port->icount.brk++; in msm_handle_rx_dm()
747 msm_port->break_detected = false; in msm_handle_rx_dm()
752 if (!(port->read_status_mask & UART_SR_RX_BREAK)) in msm_handle_rx_dm()
755 spin_unlock(&port->lock); in msm_handle_rx_dm()
757 spin_lock(&port->lock); in msm_handle_rx_dm()
761 count -= r_count; in msm_handle_rx_dm()
764 spin_unlock(&port->lock); in msm_handle_rx_dm()
766 spin_lock(&port->lock); in msm_handle_rx_dm()
778 __must_hold(&port->lock) in msm_handle_rx()
780 struct tty_port *tport = &port->state->port; in msm_handle_rx()
788 port->icount.overrun++; in msm_handle_rx()
802 port->icount.brk++; in msm_handle_rx()
806 port->icount.frame++; in msm_handle_rx()
808 port->icount.rx++; in msm_handle_rx()
812 sr &= port->read_status_mask; in msm_handle_rx()
819 spin_unlock(&port->lock); in msm_handle_rx()
821 spin_lock(&port->lock); in msm_handle_rx()
826 spin_unlock(&port->lock); in msm_handle_rx()
828 spin_lock(&port->lock); in msm_handle_rx()
833 struct circ_buf *xmit = &port->state->xmit; in msm_handle_tx_pio()
839 if (msm_port->is_uartdm) in msm_handle_tx_pio()
840 tf = port->membase + UARTDM_TF; in msm_handle_tx_pio()
842 tf = port->membase + UART_TF; in msm_handle_tx_pio()
844 if (tx_count && msm_port->is_uartdm) in msm_handle_tx_pio()
854 if (msm_port->is_uartdm) in msm_handle_tx_pio()
855 num_chars = min(tx_count - tf_pointer, in msm_handle_tx_pio()
861 buf[i] = xmit->buf[xmit->tail + i]; in msm_handle_tx_pio()
862 port->icount.tx++; in msm_handle_tx_pio()
866 xmit->tail = (xmit->tail + num_chars) & (UART_XMIT_SIZE - 1); in msm_handle_tx_pio()
881 struct circ_buf *xmit = &msm_port->uart.state->xmit; in msm_handle_tx()
882 struct msm_dma *dma = &msm_port->tx_dma; in msm_handle_tx()
888 if (port->x_char) { in msm_handle_tx()
889 if (msm_port->is_uartdm) in msm_handle_tx()
890 tf = port->membase + UARTDM_TF; in msm_handle_tx()
892 tf = port->membase + UART_TF; in msm_handle_tx()
894 buf[0] = port->x_char; in msm_handle_tx()
896 if (msm_port->is_uartdm) in msm_handle_tx()
900 port->icount.tx++; in msm_handle_tx()
901 port->x_char = 0; in msm_handle_tx()
910 pio_count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); in msm_handle_tx()
911 dma_count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); in msm_handle_tx()
914 if (msm_port->is_uartdm > UARTDM_1P3) { in msm_handle_tx()
922 if (pio_count > port->fifosize) in msm_handle_tx()
923 pio_count = port->fifosize; in msm_handle_tx()
925 if (!dma->chan || dma_count < dma_min) in msm_handle_tx()
937 port->icount.cts++; in msm_handle_delta_cts()
938 wake_up_interruptible(&port->state->port.delta_msr_wait); in msm_handle_delta_cts()
945 struct msm_dma *dma = &msm_port->rx_dma; in msm_uart_irq()
950 spin_lock_irqsave(&port->lock, flags); in msm_uart_irq()
955 msm_port->break_detected = true; in msm_uart_irq()
960 if (dma->count) { in msm_uart_irq()
969 dmaengine_terminate_all(dma->chan); in msm_uart_irq()
970 } else if (msm_port->is_uartdm) { in msm_uart_irq()
981 msm_write(port, msm_port->imr, UART_IMR); /* restore interrupt */ in msm_uart_irq()
982 spin_unlock_irqrestore(&port->lock, flags); in msm_uart_irq()
1014 if (msm_port->is_uartdm) in msm_reset()
1076 target = clk_round_rate(msm_port->clk, 16 * baud); in msm_find_best_baud()
1082 if (entry->divisor <= divisor) { in msm_find_best_baud()
1083 result = target / entry->divisor / 16; in msm_find_best_baud()
1084 diff = abs(result - baud); in msm_find_best_baud()
1095 } else if (entry->divisor > divisor) { in msm_find_best_baud()
1097 target = clk_round_rate(msm_port->clk, old + 1); in msm_find_best_baud()
1126 spin_unlock_irqrestore(&port->lock, flags); in msm_set_baud_rate()
1129 clk_set_rate(msm_port->clk, rate); in msm_set_baud_rate()
1130 baud = rate / 16 / entry->divisor; in msm_set_baud_rate()
1132 spin_lock_irqsave(&port->lock, flags); in msm_set_baud_rate()
1134 port->uartclk = rate; in msm_set_baud_rate()
1136 msm_write(port, entry->code, UART_CSR); in msm_set_baud_rate()
1139 rxstale = entry->rxstale; in msm_set_baud_rate()
1141 if (msm_port->is_uartdm) { in msm_set_baud_rate()
1153 watermark = (port->fifosize * 3) / 4; in msm_set_baud_rate()
1166 msm_port->imr = UART_IMR_RXLEV | UART_IMR_RXSTALE | in msm_set_baud_rate()
1169 msm_write(port, msm_port->imr, UART_IMR); in msm_set_baud_rate()
1171 if (msm_port->is_uartdm) { in msm_set_baud_rate()
1184 clk_prepare_enable(msm_port->clk); in msm_init_clock()
1185 clk_prepare_enable(msm_port->pclk); in msm_init_clock()
1192 unsigned int data, rfr_level, mask; in msm_startup() local
1195 snprintf(msm_port->name, sizeof(msm_port->name), in msm_startup()
1196 "msm_serial%d", port->line); in msm_startup()
1200 if (likely(port->fifosize > 12)) in msm_startup()
1201 rfr_level = port->fifosize - 12; in msm_startup()
1203 rfr_level = port->fifosize; in msm_startup()
1206 data = msm_read(port, UART_MR1); in msm_startup()
1208 if (msm_port->is_uartdm) in msm_startup()
1213 data &= ~mask; in msm_startup()
1214 data &= ~UART_MR1_AUTO_RFR_LEVEL0; in msm_startup()
1215 data |= mask & (rfr_level << 2); in msm_startup()
1216 data |= UART_MR1_AUTO_RFR_LEVEL0 & rfr_level; in msm_startup()
1217 msm_write(port, data, UART_MR1); in msm_startup()
1219 if (msm_port->is_uartdm) { in msm_startup()
1220 msm_request_tx_dma(msm_port, msm_port->uart.mapbase); in msm_startup()
1221 msm_request_rx_dma(msm_port, msm_port->uart.mapbase); in msm_startup()
1224 ret = request_irq(port->irq, msm_uart_irq, IRQF_TRIGGER_HIGH, in msm_startup()
1225 msm_port->name, port); in msm_startup()
1232 if (msm_port->is_uartdm) in msm_startup()
1235 clk_disable_unprepare(msm_port->pclk); in msm_startup()
1236 clk_disable_unprepare(msm_port->clk); in msm_startup()
1245 msm_port->imr = 0; in msm_shutdown()
1248 if (msm_port->is_uartdm) in msm_shutdown()
1251 clk_disable_unprepare(msm_port->clk); in msm_shutdown()
1253 free_irq(port->irq, port); in msm_shutdown()
1260 struct msm_dma *dma = &msm_port->rx_dma; in msm_set_termios()
1264 spin_lock_irqsave(&port->lock, flags); in msm_set_termios()
1266 if (dma->chan) /* Terminate if any */ in msm_set_termios()
1278 if (termios->c_cflag & PARENB) { in msm_set_termios()
1279 if (termios->c_cflag & PARODD) in msm_set_termios()
1281 else if (termios->c_cflag & CMSPAR) in msm_set_termios()
1289 switch (termios->c_cflag & CSIZE) { in msm_set_termios()
1307 if (termios->c_cflag & CSTOPB) in msm_set_termios()
1318 if (termios->c_cflag & CRTSCTS) { in msm_set_termios()
1325 port->read_status_mask = 0; in msm_set_termios()
1326 if (termios->c_iflag & INPCK) in msm_set_termios()
1327 port->read_status_mask |= UART_SR_PAR_FRAME_ERR; in msm_set_termios()
1328 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK)) in msm_set_termios()
1329 port->read_status_mask |= UART_SR_RX_BREAK; in msm_set_termios()
1331 uart_update_timeout(port, termios->c_cflag, baud); in msm_set_termios()
1336 spin_unlock_irqrestore(&port->lock, flags); in msm_set_termios()
1346 struct platform_device *pdev = to_platform_device(port->dev); in msm_release_port()
1355 release_mem_region(port->mapbase, size); in msm_release_port()
1356 iounmap(port->membase); in msm_release_port()
1357 port->membase = NULL; in msm_release_port()
1362 struct platform_device *pdev = to_platform_device(port->dev); in msm_request_port()
1369 return -ENXIO; in msm_request_port()
1373 if (!request_mem_region(port->mapbase, size, "msm_serial")) in msm_request_port()
1374 return -EBUSY; in msm_request_port()
1376 port->membase = ioremap(port->mapbase, size); in msm_request_port()
1377 if (!port->membase) { in msm_request_port()
1378 ret = -EBUSY; in msm_request_port()
1385 release_mem_region(port->mapbase, size); in msm_request_port()
1394 port->type = PORT_MSM; in msm_config_port()
1403 if (unlikely(ser->type != PORT_UNKNOWN && ser->type != PORT_MSM)) in msm_verify_port()
1404 return -EINVAL; in msm_verify_port()
1405 if (unlikely(port->irq != ser->irq)) in msm_verify_port()
1406 return -EINVAL; in msm_verify_port()
1417 clk_prepare_enable(msm_port->clk); in msm_power()
1418 clk_prepare_enable(msm_port->pclk); in msm_power()
1421 clk_disable_unprepare(msm_port->clk); in msm_power()
1422 clk_disable_unprepare(msm_port->pclk); in msm_power()
1433 unsigned int rf_reg = msm_port->is_uartdm ? UARTDM_RF : UART_RF; in msm_poll_get_char_single()
1450 c = sp[sizeof(slop) - count]; in msm_poll_get_char_dm()
1451 count--; in msm_poll_get_char_dm()
1464 count--; in msm_poll_get_char_dm()
1476 count = sizeof(slop) - 1; in msm_poll_get_char_dm()
1492 if (msm_port->is_uartdm) in msm_poll_get_char()
1512 if (msm_port->is_uartdm) in msm_poll_put_char()
1520 msm_write(port, c, msm_port->is_uartdm ? UARTDM_TF : UART_TF); in msm_poll_put_char()
1604 tf = port->membase + UARTDM_TF; in __msm_console_write()
1606 tf = port->membase + UART_TF; in __msm_console_write()
1616 if (port->sysrq) in __msm_console_write()
1619 locked = spin_trylock(&port->lock); in __msm_console_write()
1621 spin_lock(&port->lock); in __msm_console_write()
1633 num_chars = min(count - i, (unsigned int)sizeof(buf)); in __msm_console_write()
1660 spin_unlock(&port->lock); in __msm_console_write()
1671 BUG_ON(co->index < 0 || co->index >= UART_NR); in msm_console_write()
1673 port = msm_get_port_from_line(co->index); in msm_console_write()
1676 __msm_console_write(port, s, count, msm_port->is_uartdm); in msm_console_write()
1687 if (unlikely(co->index >= UART_NR || co->index < 0)) in msm_console_setup()
1688 return -ENXIO; in msm_console_setup()
1690 port = msm_get_port_from_line(co->index); in msm_console_setup()
1692 if (unlikely(!port->membase)) in msm_console_setup()
1693 return -ENXIO; in msm_console_setup()
1700 pr_info("msm_serial: console setup on port #%d\n", port->line); in msm_console_setup()
1708 struct earlycon_device *dev = con->data; in msm_serial_early_write()
1710 __msm_console_write(&dev->port, s, n, false); in msm_serial_early_write()
1716 if (!device->port.membase) in msm_serial_early_console_setup()
1717 return -ENODEV; in msm_serial_early_console_setup()
1719 device->con->write = msm_serial_early_write; in msm_serial_early_console_setup()
1722 OF_EARLYCON_DECLARE(msm_serial, "qcom,msm-uart",
1728 struct earlycon_device *dev = con->data; in msm_serial_early_write_dm()
1730 __msm_console_write(&dev->port, s, n, true); in msm_serial_early_write_dm()
1737 if (!device->port.membase) in msm_serial_early_console_setup_dm()
1738 return -ENODEV; in msm_serial_early_console_setup_dm()
1740 device->con->write = msm_serial_early_write_dm; in msm_serial_early_console_setup_dm()
1743 OF_EARLYCON_DECLARE(msm_serial_dm, "qcom,msm-uartdm",
1754 .index = -1,
1755 .data = &msm_uart_driver,
1775 { .compatible = "qcom,msm-uartdm-v1.1", .data = (void *)UARTDM_1P1 },
1776 { .compatible = "qcom,msm-uartdm-v1.2", .data = (void *)UARTDM_1P2 },
1777 { .compatible = "qcom,msm-uartdm-v1.3", .data = (void *)UARTDM_1P3 },
1778 { .compatible = "qcom,msm-uartdm-v1.4", .data = (void *)UARTDM_1P4 },
1790 if (pdev->dev.of_node) in msm_serial_probe()
1791 line = of_alias_get_id(pdev->dev.of_node, "serial"); in msm_serial_probe()
1793 line = pdev->id; in msm_serial_probe()
1796 line = atomic_inc_return(&msm_uart_next_id) - 1; in msm_serial_probe()
1799 return -ENXIO; in msm_serial_probe()
1801 dev_info(&pdev->dev, "msm_serial: detected port #%d\n", line); in msm_serial_probe()
1804 port->dev = &pdev->dev; in msm_serial_probe()
1807 id = of_match_device(msm_uartdm_table, &pdev->dev); in msm_serial_probe()
1809 msm_port->is_uartdm = (unsigned long)id->data; in msm_serial_probe()
1811 msm_port->is_uartdm = 0; in msm_serial_probe()
1813 msm_port->clk = devm_clk_get(&pdev->dev, "core"); in msm_serial_probe()
1814 if (IS_ERR(msm_port->clk)) in msm_serial_probe()
1815 return PTR_ERR(msm_port->clk); in msm_serial_probe()
1817 if (msm_port->is_uartdm) { in msm_serial_probe()
1818 msm_port->pclk = devm_clk_get(&pdev->dev, "iface"); in msm_serial_probe()
1819 if (IS_ERR(msm_port->pclk)) in msm_serial_probe()
1820 return PTR_ERR(msm_port->pclk); in msm_serial_probe()
1823 port->uartclk = clk_get_rate(msm_port->clk); in msm_serial_probe()
1824 dev_info(&pdev->dev, "uartclk = %d\n", port->uartclk); in msm_serial_probe()
1828 return -ENXIO; in msm_serial_probe()
1829 port->mapbase = resource->start; in msm_serial_probe()
1833 return -ENXIO; in msm_serial_probe()
1834 port->irq = irq; in msm_serial_probe()
1835 port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_MSM_CONSOLE); in msm_serial_probe()
1852 { .compatible = "qcom,msm-uart" },
1853 { .compatible = "qcom,msm-uartdm" },
1862 uart_suspend_port(&msm_uart_driver, &port->uart); in msm_serial_suspend()
1871 uart_resume_port(&msm_uart_driver, &port->uart); in msm_serial_resume()