Lines Matching +full:sync +full:- +full:read
1 /* SPDX-License-Identifier: GPL-2.0 */
25 * of "escc" node (ie. ch-a or ch-b)
74 if (uap->flags & PMACZILOG_FLAG_IS_CHANNEL_A) in pmz_get_port_A()
76 return uap->mate; in pmz_get_port_A()
88 writeb(reg, port->control_reg); in read_zsreg()
89 return readb(port->control_reg); in read_zsreg()
95 writeb(reg, port->control_reg); in write_zsreg()
96 writeb(value, port->control_reg); in write_zsreg()
101 return readb(port->data_reg); in read_zsdata()
106 writeb(data, port->data_reg); in write_zsdata()
111 (void)readb(port->control_reg); in zssync()
118 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
179 #define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */
195 #define SYNC_ENAB 0 /* Sync Modes Enable */
201 #define MONSYNC 0 /* 8 Bit Sync character */
202 #define BISYNC 0x10 /* 16 bit sync character */
203 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */
204 #define EXTSYNC 0x30 /* External Sync Mode */
216 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
226 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
228 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */
231 #define ENEXREAD 0x40 /* Enable read of some write registers */
247 #define BIT6 1 /* 6 bit/8bit sync */
293 #define EN85C30 1 /* Enable some 85c30-enhanced registers */
297 #define SYNCIE 0x10 /* Sync/hunt IE */
303 /* Read Register 0 */
308 #define SYNC_HUNT 0x10 /* Sync/hunt */
313 /* Read Register 1 */
330 /* Read Register 2 (channel b only) - Interrupt vector */
341 /* Read Register 3 (interrupt pending register) ch a only */
349 /* Read Register 8 (receive data register) */
351 /* Read Register 10 (misc status bits) */
357 /* Read Register 12 (lower byte of baud rate generator constant) */
359 /* Read Register 13 (upper byte of baud rate generator constant) */
361 /* Read Register 15 (value of WR 15) */
371 #define ZS_IS_CONS(UP) ((UP)->flags & PMACZILOG_FLAG_IS_CONS)
372 #define ZS_IS_KGDB(UP) ((UP)->flags & PMACZILOG_FLAG_IS_KGDB)
373 #define ZS_IS_CHANNEL_A(UP) ((UP)->flags & PMACZILOG_FLAG_IS_CHANNEL_A)
374 #define ZS_REGS_HELD(UP) ((UP)->flags & PMACZILOG_FLAG_REGS_HELD)
375 #define ZS_TX_STOPPED(UP) ((UP)->flags & PMACZILOG_FLAG_TX_STOPPED)
376 #define ZS_TX_ACTIVE(UP) ((UP)->flags & PMACZILOG_FLAG_TX_ACTIVE)
377 #define ZS_WANTS_MODEM_STATUS(UP) ((UP)->flags & PMACZILOG_FLAG_MODEM_STATUS)
378 #define ZS_IS_IRDA(UP) ((UP)->flags & PMACZILOG_FLAG_IS_IRDA)
379 #define ZS_IS_INTMODEM(UP) ((UP)->flags & PMACZILOG_FLAG_IS_INTMODEM)
380 #define ZS_HAS_DMA(UP) ((UP)->flags & PMACZILOG_FLAG_HAS_DMA)
381 #define ZS_IS_OPEN(UP) ((UP)->flags & PMACZILOG_FLAG_IS_OPEN)
382 #define ZS_IS_EXTCLK(UP) ((UP)->flags & PMACZILOG_FLAG_IS_EXTCLK)