Lines Matching full:membase
203 uport->membase = devm_platform_ioremap_resource(pdev, 0); in qcom_geni_serial_request_port()
204 if (IS_ERR(uport->membase)) in qcom_geni_serial_request_port()
205 return PTR_ERR(uport->membase); in qcom_geni_serial_request_port()
206 port->se.base = uport->membase; in qcom_geni_serial_request_port()
226 geni_ios = readl(uport->membase + SE_GENI_IOS); in qcom_geni_serial_get_mctrl()
248 writel(uart_manual_rfr, uport->membase + SE_UART_MANUAL_RFR); in qcom_geni_serial_set_mctrl()
297 reg = readl(uport->membase + offset); in qcom_geni_serial_poll_bit()
310 writel(xmit_size, uport->membase + SE_UART_TX_TRANS_LEN); in qcom_geni_serial_setup_tx()
312 writel(m_cmd, uport->membase + SE_GENI_M_CMD0); in qcom_geni_serial_setup_tx()
323 writel(M_GENI_CMD_ABORT, uport->membase + in qcom_geni_serial_poll_tx_done()
329 writel(irq_clear, uport->membase + SE_GENI_M_IRQ_CLEAR); in qcom_geni_serial_poll_tx_done()
336 writel(S_GENI_CMD_ABORT, uport->membase + SE_GENI_S_CMD_CTRL_REG); in qcom_geni_serial_abort_rx()
339 writel(irq_clear, uport->membase + SE_GENI_S_IRQ_CLEAR); in qcom_geni_serial_abort_rx()
340 writel(FORCE_DEFAULT, uport->membase + GENI_FORCE_DEFAULT_REG); in qcom_geni_serial_abort_rx()
353 status = readl(uport->membase + SE_GENI_M_IRQ_STATUS); in qcom_geni_serial_get_char()
354 writel(status, uport->membase + SE_GENI_M_IRQ_CLEAR); in qcom_geni_serial_get_char()
356 status = readl(uport->membase + SE_GENI_S_IRQ_STATUS); in qcom_geni_serial_get_char()
357 writel(status, uport->membase + SE_GENI_S_IRQ_CLEAR); in qcom_geni_serial_get_char()
359 status = readl(uport->membase + SE_GENI_RX_FIFO_STATUS); in qcom_geni_serial_get_char()
377 readl(uport->membase + SE_GENI_RX_FIFOn); in qcom_geni_serial_get_char()
390 writel(DEF_TX_WM, uport->membase + SE_GENI_TX_WATERMARK_REG); in qcom_geni_serial_poll_put_char()
394 writel(c, uport->membase + SE_GENI_TX_FIFOn); in qcom_geni_serial_poll_put_char()
395 writel(M_TX_FIFO_WATERMARK_EN, uport->membase + SE_GENI_M_IRQ_CLEAR); in qcom_geni_serial_poll_put_char()
411 uport->membase + SE_GENI_TX_FIFOn); in qcom_geni_serial_wr_char()
434 writel(DEF_TX_WM, uport->membase + SE_GENI_TX_WATERMARK_REG); in __qcom_geni_serial_console_write()
452 writel(M_TX_FIFO_WATERMARK_EN, uport->membase + in __qcom_geni_serial_console_write()
461 uport->membase + SE_GENI_TX_FIFOn); in __qcom_geni_serial_console_write()
490 geni_status = readl(uport->membase + SE_GENI_STATUS); in qcom_geni_serial_console_write()
500 writel(M_CMD_ABORT_EN, uport->membase + in qcom_geni_serial_console_write()
503 writel(M_CMD_CANCEL_EN, uport->membase + SE_GENI_M_IRQ_CLEAR); in qcom_geni_serial_console_write()
512 irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN); in qcom_geni_serial_console_write()
514 uport->membase + SE_GENI_M_IRQ_EN); in qcom_geni_serial_console_write()
539 ioread32_rep(uport->membase + SE_GENI_RX_FIFOn, buf, 1); in handle_rx_console()
581 ioread32_rep(uport->membase + SE_GENI_RX_FIFOn, port->rx_fifo, words); in handle_rx_uart()
601 status = readl(uport->membase + SE_GENI_STATUS); in qcom_geni_serial_start_tx()
608 irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN); in qcom_geni_serial_start_tx()
611 writel(DEF_TX_WM, uport->membase + SE_GENI_TX_WATERMARK_REG); in qcom_geni_serial_start_tx()
612 writel(irq_en, uport->membase + SE_GENI_M_IRQ_EN); in qcom_geni_serial_start_tx()
621 irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN); in qcom_geni_serial_stop_tx()
623 writel(0, uport->membase + SE_GENI_TX_WATERMARK_REG); in qcom_geni_serial_stop_tx()
624 writel(irq_en, uport->membase + SE_GENI_M_IRQ_EN); in qcom_geni_serial_stop_tx()
625 status = readl(uport->membase + SE_GENI_STATUS); in qcom_geni_serial_stop_tx()
636 writel(M_CMD_ABORT_EN, uport->membase + SE_GENI_M_IRQ_CLEAR); in qcom_geni_serial_stop_tx()
638 writel(M_CMD_CANCEL_EN, uport->membase + SE_GENI_M_IRQ_CLEAR); in qcom_geni_serial_stop_tx()
647 status = readl(uport->membase + SE_GENI_STATUS); in qcom_geni_serial_start_rx()
653 irq_en = readl(uport->membase + SE_GENI_S_IRQ_EN); in qcom_geni_serial_start_rx()
655 writel(irq_en, uport->membase + SE_GENI_S_IRQ_EN); in qcom_geni_serial_start_rx()
657 irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN); in qcom_geni_serial_start_rx()
659 writel(irq_en, uport->membase + SE_GENI_M_IRQ_EN); in qcom_geni_serial_start_rx()
669 irq_en = readl(uport->membase + SE_GENI_S_IRQ_EN); in qcom_geni_serial_stop_rx()
671 writel(irq_en, uport->membase + SE_GENI_S_IRQ_EN); in qcom_geni_serial_stop_rx()
673 irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN); in qcom_geni_serial_stop_rx()
675 writel(irq_en, uport->membase + SE_GENI_M_IRQ_EN); in qcom_geni_serial_stop_rx()
677 status = readl(uport->membase + SE_GENI_STATUS); in qcom_geni_serial_stop_rx()
689 s_irq_status = readl(uport->membase + SE_GENI_S_IRQ_STATUS); in qcom_geni_serial_stop_rx()
693 writel(s_irq_status, uport->membase + SE_GENI_S_IRQ_CLEAR); in qcom_geni_serial_stop_rx()
695 status = readl(uport->membase + SE_GENI_STATUS); in qcom_geni_serial_stop_rx()
709 status = readl(uport->membase + SE_GENI_RX_FIFO_STATUS); in qcom_geni_serial_handle_rx()
739 status = readl(uport->membase + SE_GENI_TX_FIFO_STATUS); in qcom_geni_serial_handle_tx()
765 irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN); in qcom_geni_serial_handle_tx()
768 uport->membase + SE_GENI_M_IRQ_EN); in qcom_geni_serial_handle_tx()
785 iowrite32_rep(uport->membase + SE_GENI_TX_FIFOn, buf, 1); in qcom_geni_serial_handle_tx()
801 uport->membase + SE_GENI_M_IRQ_CLEAR); in qcom_geni_serial_handle_tx()
805 irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN); in qcom_geni_serial_handle_tx()
808 uport->membase + SE_GENI_M_IRQ_EN); in qcom_geni_serial_handle_tx()
831 m_irq_status = readl(uport->membase + SE_GENI_M_IRQ_STATUS); in qcom_geni_serial_isr()
832 s_irq_status = readl(uport->membase + SE_GENI_S_IRQ_STATUS); in qcom_geni_serial_isr()
833 geni_status = readl(uport->membase + SE_GENI_STATUS); in qcom_geni_serial_isr()
834 m_irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN); in qcom_geni_serial_isr()
835 writel(m_irq_status, uport->membase + SE_GENI_M_IRQ_CLEAR); in qcom_geni_serial_isr()
836 writel(s_irq_status, uport->membase + SE_GENI_S_IRQ_CLEAR); in qcom_geni_serial_isr()
919 writel(rxstale, uport->membase + SE_UART_RX_STALE_CNT); in qcom_geni_serial_port_setup()
921 pin_swap = readl(uport->membase + SE_UART_IO_MACRO_CTRL); in qcom_geni_serial_port_setup()
932 writel(pin_swap, uport->membase + SE_UART_IO_MACRO_CTRL); in qcom_geni_serial_port_setup()
1042 tx_trans_cfg = readl(uport->membase + SE_UART_TX_TRANS_CFG); in qcom_geni_serial_set_termios()
1043 tx_parity_cfg = readl(uport->membase + SE_UART_TX_PARITY_CFG); in qcom_geni_serial_set_termios()
1044 rx_trans_cfg = readl(uport->membase + SE_UART_RX_TRANS_CFG); in qcom_geni_serial_set_termios()
1045 rx_parity_cfg = readl(uport->membase + SE_UART_RX_PARITY_CFG); in qcom_geni_serial_set_termios()
1102 uport->membase + SE_UART_LOOPBACK_CFG); in qcom_geni_serial_set_termios()
1103 writel(tx_trans_cfg, uport->membase + SE_UART_TX_TRANS_CFG); in qcom_geni_serial_set_termios()
1104 writel(tx_parity_cfg, uport->membase + SE_UART_TX_PARITY_CFG); in qcom_geni_serial_set_termios()
1105 writel(rx_trans_cfg, uport->membase + SE_UART_RX_TRANS_CFG); in qcom_geni_serial_set_termios()
1106 writel(rx_parity_cfg, uport->membase + SE_UART_RX_PARITY_CFG); in qcom_geni_serial_set_termios()
1107 writel(bits_per_char, uport->membase + SE_UART_TX_WORD_LEN); in qcom_geni_serial_set_termios()
1108 writel(bits_per_char, uport->membase + SE_UART_RX_WORD_LEN); in qcom_geni_serial_set_termios()
1109 writel(stop_bit_len, uport->membase + SE_UART_TX_STOP_BIT_LEN); in qcom_geni_serial_set_termios()
1110 writel(ser_clk_cfg, uport->membase + GENI_SER_M_CLK_CFG); in qcom_geni_serial_set_termios()
1111 writel(ser_clk_cfg, uport->membase + GENI_SER_S_CLK_CFG); in qcom_geni_serial_set_termios()
1118 return !readl(uport->membase + SE_GENI_TX_FIFO_STATUS); in qcom_geni_serial_tx_empty()
1143 if (unlikely(!uport->membase)) in qcom_geni_console_setup()
1210 if (!uport->membase) in qcom_geni_serial_earlycon_setup()
1216 se.base = uport->membase; in qcom_geni_serial_earlycon_setup()
1237 writel(tx_trans_cfg, uport->membase + SE_UART_TX_TRANS_CFG); in qcom_geni_serial_earlycon_setup()
1238 writel(tx_parity_cfg, uport->membase + SE_UART_TX_PARITY_CFG); in qcom_geni_serial_earlycon_setup()
1239 writel(rx_trans_cfg, uport->membase + SE_UART_RX_TRANS_CFG); in qcom_geni_serial_earlycon_setup()
1240 writel(rx_parity_cfg, uport->membase + SE_UART_RX_PARITY_CFG); in qcom_geni_serial_earlycon_setup()
1241 writel(bits_per_char, uport->membase + SE_UART_TX_WORD_LEN); in qcom_geni_serial_earlycon_setup()
1242 writel(bits_per_char, uport->membase + SE_UART_RX_WORD_LEN); in qcom_geni_serial_earlycon_setup()
1243 writel(stop_bit_len, uport->membase + SE_UART_TX_STOP_BIT_LEN); in qcom_geni_serial_earlycon_setup()