Lines Matching +full:single +full:- +full:tt
1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (c) 2001-2002 by David Brownell
16 * To facilitate the strongest possible byte-order checking from "sparse"
46 * high-speed devices and full/low-speed devices lying behind a TT.
49 struct usb_device *udev; /* access to the TT */
53 u16 cs_mask; /* C-mask and S-mask bytes */
66 /* ehci_hcd->lock guards shared data against other CPUs:
92 * ehci-timer.c) in parallel with this list.
188 the change-suspend feature turned on */
194 /* per-HC memory pools (could be per-bus, but ...) */
233 unsigned has_ppcd:1; /* support per-port change bits */
258 /* platform-specific data -- must come last */
265 return (struct ehci_hcd *) (hcd->hcd_priv); in hcd_to_ehci()
272 /*-------------------------------------------------------------------------*/
276 /*-------------------------------------------------------------------------*/
283 * See Fig 3-6 "Queue Element Transfer Descriptor Block Diagram".
314 /* the rest is HCD-private */
321 /* mask NakCnt+T in qh->hw_alt_next */
326 /*-------------------------------------------------------------------------*/
328 /* type tag from {qh,itd,sitd,fstn}->hw_next */
335 * can be used on one system with SoC EHCI controller using big-endian
336 * descriptors as well as a normal little-endian PCI EHCI controller.
368 /*-------------------------------------------------------------------------*/
373 * See Fig 3-7 "Queue Head Structure Layout".
395 __hc32 hw_current; /* qtd list - see EHCI 3.6.4 */
407 /* the rest is HCD-private */
439 unsigned clearing_tt:1; /* Clear-TT-Buf in progress */
444 /*-------------------------------------------------------------------------*/
449 u64 bufp; /* itd->hw_bufp{,_hi}[pg] |= */
450 __hc32 transaction; /* itd->hw_transaction[i] |= */
457 * each packet is one logical usb transaction to the device (not TT),
458 * beginning at stream->next_uframe
468 * ehci_iso_stream - groups all (s)itds for this endpoint.
497 /* this is used to initialize sITD's tt info */
501 /*-------------------------------------------------------------------------*/
505 * Fig 3-4 "Isochronous Transaction Descriptor (iTD)"
516 #define EHCI_ISOC_XACTERR (1<<28) /* XactErr - transaction error */
525 /* the rest is HCD-private */
536 unsigned index[8]; /* in urb->iso_frame_desc */
539 /*-------------------------------------------------------------------------*/
543 * siTD, aka split-transaction isochronous Transfer Descriptor
544 * ... describe full speed iso xfers through TT in hubs
545 * see Figure 3-5 "Split-transaction Isochronous Transaction Descriptor (siTD)
550 /* uses bit field macros above - see EHCI 0.95 Table 3-8 */
551 __hc32 hw_fullspeed_ep; /* EHCI table 3-9 */
552 __hc32 hw_uframe; /* EHCI table 3-10 */
553 __hc32 hw_results; /* EHCI table 3-11 */
558 #define SITD_STS_ERR (1 << 6) /* error from TT */
567 __hc32 hw_buf[2]; /* EHCI table 3-12 */
568 __hc32 hw_backpointer; /* EHCI table 3-13 */
571 /* the rest is HCD-private */
582 /*-------------------------------------------------------------------------*/
588 * Manages split interrupt transactions (using TT) that span frame boundaries
597 /* the rest is HCD-private */
602 /*-------------------------------------------------------------------------*/
605 * USB-2.0 Specification Sections 11.14 and 11.18
608 * A hub can have a single TT for all its ports, or multiple TTs (one for each
609 * port). The bandwidth and budgeting information for the full/low-speed bus
610 * below each TT is self-contained and independent of the other TTs or the
611 * high-speed bus.
615 * the best-case estimate of the number of full-speed bytes allocated to an
618 * Removal of an endpoint invalidates a TT's budget. Instead of trying to
619 * keep an up-to-date record, we recompute the budget when it is needed.
626 struct list_head ps_list; /* Items using this TT */
628 int tt_port; /* TT port number */
631 /*-------------------------------------------------------------------------*/
641 /*-------------------------------------------------------------------------*/
647 * root hub. This is a non-standard feature. Each controller will need
652 #define ehci_is_TDI(e) (ehci_to_hcd(e)->has_tt)
659 switch ((portsc >> (ehci->has_hostpc ? 25 : 26)) & 3) { in ehci_port_speed()
679 /*-------------------------------------------------------------------------*/
682 /* Some Freescale processors have an erratum in which the TT
683 * port number in the queue head was 0..N-1 instead of 1..N.
685 #define ehci_has_fsl_portno_bug(e) ((e)->has_fsl_port_bug)
690 #define PORTSC_FSL_PFSC 24 /* Port Force Full-Speed Connect */
693 /* Some Freescale processors have an erratum (USB A-005275) in which
696 #define ehci_has_fsl_hs_errata(e) ((e)->has_fsl_hs_errata)
702 * Some Freescale/NXP processors have an erratum (USB A-005697)
706 #define ehci_has_fsl_susp_errata(e) ((e)->has_fsl_susp_errata)
710 * little-endian format, a minority (celleb companion chip) implement
719 * as fields of a 32-bit register.
723 #define ehci_big_endian_mmio(e) ((e)->big_endian_mmio)
724 #define ehci_big_endian_capbase(e) ((e)->big_endian_capbase)
731 * Big-endian read/write functions are arch-specific.
771 if (ehci->imx28_write_fix) in ehci_writel()
779 * On certain ppc-44x SoC there is a HW issue, that could only worked around with
788 hc_control = (readl_be(ehci->ohci_hcctrl_reg) & ~OHCI_CTRL_HCFS); in set_ohci_hcfs()
794 writel_be(hc_control, ehci->ohci_hcctrl_reg); in set_ohci_hcfs()
795 (void) readl_be(ehci->ohci_hcctrl_reg); in set_ohci_hcfs()
802 /*-------------------------------------------------------------------------*/
805 * The AMCC 440EPx not only implements its EHCI registers in big-endian
808 * EHCI controllers accessed through PCI work normally (little-endian
809 * everywhere), so we won't bother supporting a BE-only mode for now.
812 #define ehci_big_endian_desc(e) ((e)->big_endian_desc)
858 /*-------------------------------------------------------------------------*/
861 dev_dbg(ehci_to_hcd(ehci)->self.controller, fmt, ## args)
863 dev_err(ehci_to_hcd(ehci)->self.controller, fmt, ## args)
865 dev_info(ehci_to_hcd(ehci)->self.controller, fmt, ## args)
867 dev_warn(ehci_to_hcd(ehci)->self.controller, fmt, ## args)
869 /*-------------------------------------------------------------------------*/