Lines Matching +full:individual +full:- +full:port +full:- +full:switching
1 // SPDX-License-Identifier: GPL-2.0
16 #include "xhci-trace.h"
65 ssp_cap_size = sizeof(usb_bos_descriptor) - desc_size; in xhci_create_usb3_bos_desc()
68 for (i = 0; i < xhci->num_port_caps; i++) { in xhci_create_usb3_bos_desc()
69 if (xhci->port_caps[i].maj_rev == 0x03 && in xhci_create_usb3_bos_desc()
70 xhci->port_caps[i].min_rev >= 0x01) { in xhci_create_usb3_bos_desc()
72 port_cap = &xhci->port_caps[i]; in xhci_create_usb3_bos_desc()
79 if (port_cap->psi_count) { in xhci_create_usb3_bos_desc()
81 ssa_count = port_cap->psi_uid_count * 2; in xhci_create_usb3_bos_desc()
83 ssp_cap_size -= 16; /* skip copying the default SSA */ in xhci_create_usb3_bos_desc()
99 temp = readl(&xhci->cap_regs->hcc_params); in xhci_create_usb3_bos_desc()
104 if ((xhci->quirks & XHCI_LPM_SUPPORT)) { in xhci_create_usb3_bos_desc()
105 temp = readl(&xhci->cap_regs->hcs_params3); in xhci_create_usb3_bos_desc()
111 if (usb3_1 && port_cap->psi_count) { in xhci_create_usb3_bos_desc()
122 bm_attrib = (ssa_count - 1) & 0x1f; in xhci_create_usb3_bos_desc()
123 bm_attrib |= (port_cap->psi_uid_count - 1) << 5; in xhci_create_usb3_bos_desc()
136 for (i = 0; i < port_cap->psi_count; i++) { in xhci_create_usb3_bos_desc()
137 psi = port_cap->psi[i]; in xhci_create_usb3_bos_desc()
174 desc->bHubContrCurrent = 0; in xhci_common_hub_descriptor()
176 desc->bNbrPorts = ports; in xhci_common_hub_descriptor()
178 /* Bits 1:0 - support per-port power switching, or power always on */ in xhci_common_hub_descriptor()
179 if (HCC_PPC(xhci->hcc_params)) in xhci_common_hub_descriptor()
183 /* Bit 2 - root hubs are not part of a compound device */ in xhci_common_hub_descriptor()
184 /* Bits 4:3 - individual port over current protection */ in xhci_common_hub_descriptor()
186 /* Bits 6:5 - no TTs in root ports */ in xhci_common_hub_descriptor()
187 /* Bit 7 - no port indicators */ in xhci_common_hub_descriptor()
188 desc->wHubCharacteristics = cpu_to_le16(temp); in xhci_common_hub_descriptor()
202 rhub = &xhci->usb2_rhub; in xhci_usb2_hub_descriptor()
203 ports = rhub->num_ports; in xhci_usb2_hub_descriptor()
205 desc->bDescriptorType = USB_DT_HUB; in xhci_usb2_hub_descriptor()
207 desc->bDescLength = USB_DT_HUB_NONVAR_SIZE + 2 * temp; in xhci_usb2_hub_descriptor()
208 desc->bPwrOn2PwrGood = 10; /* xhci section 5.4.8 says 20ms */ in xhci_usb2_hub_descriptor()
211 * If the port doesn't exist within that byte, the bit is set to 0. in xhci_usb2_hub_descriptor()
215 portsc = readl(rhub->ports[i]->addr); in xhci_usb2_hub_descriptor()
221 * is reserved, and bit 1 is for port 1, etc. in xhci_usb2_hub_descriptor()
236 memset(desc->u.hs.DeviceRemovable, 0xff, in xhci_usb2_hub_descriptor()
237 sizeof(desc->u.hs.DeviceRemovable)); in xhci_usb2_hub_descriptor()
238 memset(desc->u.hs.PortPwrCtrlMask, 0xff, in xhci_usb2_hub_descriptor()
239 sizeof(desc->u.hs.PortPwrCtrlMask)); in xhci_usb2_hub_descriptor()
242 memset(&desc->u.hs.DeviceRemovable[i], port_removable[i], in xhci_usb2_hub_descriptor()
256 rhub = &xhci->usb3_rhub; in xhci_usb3_hub_descriptor()
257 ports = rhub->num_ports; in xhci_usb3_hub_descriptor()
259 desc->bDescriptorType = USB_DT_SS_HUB; in xhci_usb3_hub_descriptor()
260 desc->bDescLength = USB_DT_SS_HUB_SIZE; in xhci_usb3_hub_descriptor()
261 desc->bPwrOn2PwrGood = 50; /* usb 3.1 may fail if less than 100ms */ in xhci_usb3_hub_descriptor()
266 desc->u.ss.bHubHdrDecLat = 0; in xhci_usb3_hub_descriptor()
267 desc->u.ss.wHubDelay = 0; in xhci_usb3_hub_descriptor()
270 /* bit 0 is reserved, bit 1 is for port 1, etc. */ in xhci_usb3_hub_descriptor()
272 portsc = readl(rhub->ports[i]->addr); in xhci_usb3_hub_descriptor()
277 desc->u.ss.DeviceRemovable = cpu_to_le16(port_removable); in xhci_usb3_hub_descriptor()
284 if (hcd->speed >= HCD_USB3) in xhci_hub_descriptor()
308 * connect status, over-current status, port speed, and device removable.
309 * connect status and port speed are also sticky - meaning they're in
316 * link state, port power, port indicator state, "wake on" enable state
321 * bit 4 (port reset)
327 * port enable/disable, and
328 * change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
329 * over-current, reset, link state, and L1 change
344 * Given a port state, this function returns a value that would result in the
345 * port being in the same state, if the value was written to the port status
353 /* Save read-only status and port state */ in xhci_port_state_to_neutral()
358 * find slot id based on port number.
359 * @port: The one-based port number from one of the two split roothubs.
362 u16 port) in xhci_find_slot_id_by_port() argument
370 if (!xhci->devs[i] || !xhci->devs[i]->udev) in xhci_find_slot_id_by_port()
372 speed = xhci->devs[i]->udev->speed; in xhci_find_slot_id_by_port()
373 if (((speed >= USB_SPEED_SUPER) == (hcd->speed >= HCD_USB3)) in xhci_find_slot_id_by_port()
374 && xhci->devs[i]->fake_port == port) { in xhci_find_slot_id_by_port()
398 virt_dev = xhci->devs[slot_id]; in xhci_stop_device()
400 return -ENODEV; in xhci_stop_device()
406 return -ENOMEM; in xhci_stop_device()
408 spin_lock_irqsave(&xhci->lock, flags); in xhci_stop_device()
409 for (i = LAST_EP_INDEX; i > 0; i--) { in xhci_stop_device()
410 if (virt_dev->eps[i].ring && virt_dev->eps[i].ring->dequeue) { in xhci_stop_device()
414 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->out_ctx, i); in xhci_stop_device()
422 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_stop_device()
423 ret = -ENOMEM; in xhci_stop_device()
430 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_stop_device()
438 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_stop_device()
443 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_stop_device()
446 wait_for_completion(cmd->completion); in xhci_stop_device()
448 if (cmd->status == COMP_COMMAND_ABORTED || in xhci_stop_device()
449 cmd->status == COMP_COMMAND_RING_STOPPED) { in xhci_stop_device()
451 ret = -ETIME; in xhci_stop_device()
468 ep = &xhci->devs[slot_id]->eps[i]; in xhci_ring_device()
470 if (ep->ep_state & EP_HAS_STREAMS) { in xhci_ring_device()
471 for (s = 1; s < ep->stream_info->num_streams; s++) in xhci_ring_device()
473 } else if (ep->ring && ep->ring->dequeue) { in xhci_ring_device()
485 if (hcd->speed >= HCD_USB3) { in xhci_disable_port()
487 "SuperSpeed port.\n"); in xhci_disable_port()
491 if (xhci->quirks & XHCI_BROKEN_PORT_PED) { in xhci_disable_port()
493 "Broken Port Enabled/Disabled, ignoring port disable request.\n"); in xhci_disable_port()
497 /* Write 1 to disable the port */ in xhci_disable_port()
500 xhci_dbg(xhci, "disable port %d-%d, portsc: 0x%x\n", in xhci_disable_port()
501 hcd->self.busnum, wIndex + 1, port_status); in xhci_disable_port()
525 port_change_bit = "over-current"; in xhci_clear_port_change_bit()
551 xhci_dbg(xhci, "clear port%d %s change, portsc: 0x%x\n", in xhci_clear_port_change_bit()
559 if (hcd->speed >= HCD_USB3) in xhci_get_rhub()
560 return &xhci->usb3_rhub; in xhci_get_rhub()
561 return &xhci->usb2_rhub; in xhci_get_rhub()
565 * xhci_set_port_power() must be called with xhci->lock held.
566 * It will release and re-aquire the lock while calling ACPI
571 __must_hold(&xhci->lock) in xhci_set_port_power()
574 struct xhci_port *port; in xhci_set_port_power() local
578 port = rhub->ports[index]; in xhci_set_port_power()
579 temp = readl(port->addr); in xhci_set_port_power()
581 xhci_dbg(xhci, "set port power %d-%d %s, portsc: 0x%x\n", in xhci_set_port_power()
582 hcd->self.busnum, index + 1, on ? "ON" : "OFF", temp); in xhci_set_port_power()
588 writel(temp | PORT_POWER, port->addr); in xhci_set_port_power()
589 readl(port->addr); in xhci_set_port_power()
592 writel(temp & ~PORT_POWER, port->addr); in xhci_set_port_power()
595 spin_unlock_irqrestore(&xhci->lock, *flags); in xhci_set_port_power()
596 temp = usb_acpi_power_manageable(hcd->self.root_hub, in xhci_set_port_power()
599 usb_acpi_set_power_state(hcd->self.root_hub, in xhci_set_port_power()
601 spin_lock_irqsave(&xhci->lock, *flags); in xhci_set_port_power()
608 struct xhci_port *port; in xhci_port_set_test_mode() local
611 port = xhci->usb2_rhub.ports[wIndex]; in xhci_port_set_test_mode()
612 temp = readl(port->addr + PORTPMSC); in xhci_port_set_test_mode()
614 writel(temp, port->addr + PORTPMSC); in xhci_port_set_test_mode()
615 xhci->test_mode = test_mode; in xhci_port_set_test_mode()
622 __must_hold(&xhci->lock) in xhci_enter_test_mode()
628 spin_unlock_irqrestore(&xhci->lock, *flags); in xhci_enter_test_mode()
629 for (i = 1; i <= HCS_MAX_SLOTS(xhci->hcs_params1); i++) { in xhci_enter_test_mode()
630 if (!xhci->devs[i]) in xhci_enter_test_mode()
639 spin_lock_irqsave(&xhci->lock, *flags); in xhci_enter_test_mode()
641 xhci_dbg(xhci, "Disable all port (PP = 0)\n"); in xhci_enter_test_mode()
643 for (i = 0; i < xhci->usb3_rhub.num_ports; i++) in xhci_enter_test_mode()
644 xhci_set_port_power(xhci, xhci->shared_hcd, i, false, flags); in xhci_enter_test_mode()
646 for (i = 0; i < xhci->usb2_rhub.num_ports; i++) in xhci_enter_test_mode()
647 xhci_set_port_power(xhci, xhci->main_hcd, i, false, flags); in xhci_enter_test_mode()
654 pm_runtime_forbid(xhci_to_hcd(xhci)->self.controller); in xhci_enter_test_mode()
656 /* Port is selected by wIndex. port_id = wIndex + 1 */ in xhci_enter_test_mode()
667 if (!xhci->test_mode) { in xhci_exit_test_mode()
671 if (xhci->test_mode == USB_TEST_FORCE_ENABLE && in xhci_exit_test_mode()
672 !(xhci->xhc_state & XHCI_STATE_HALTED)) { in xhci_exit_test_mode()
677 pm_runtime_allow(xhci_to_hcd(xhci)->self.controller); in xhci_exit_test_mode()
678 xhci->test_mode = 0; in xhci_exit_test_mode()
682 void xhci_set_link_state(struct xhci_hcd *xhci, struct xhci_port *port, in xhci_set_link_state() argument
688 portsc = readl(port->addr); in xhci_set_link_state()
692 writel(temp, port->addr); in xhci_set_link_state()
694 xhci_dbg(xhci, "Set port %d-%d link state, portsc: 0x%x, write 0x%x", in xhci_set_link_state()
695 port->rhub->hcd->self.busnum, port->hcd_portnum + 1, in xhci_set_link_state()
700 struct xhci_port *port, u16 wake_mask) in xhci_set_remote_wake_mask() argument
704 temp = readl(port->addr); in xhci_set_remote_wake_mask()
722 writel(temp, port->addr); in xhci_set_remote_wake_mask()
725 /* Test and clear port RWC bit */
726 void xhci_test_and_clear_bit(struct xhci_hcd *xhci, struct xhci_port *port, in xhci_test_and_clear_bit() argument
731 temp = readl(port->addr); in xhci_test_and_clear_bit()
735 writel(temp, port->addr); in xhci_test_and_clear_bit()
739 /* Updates Link Status for super Speed port */
746 * should be performed on port in xhci_hub_report_usb3_link_state()
749 /* The CAS bit can be set while the port is in xhci_hub_report_usb3_link_state()
760 /* Return also connection bit - in xhci_hub_report_usb3_link_state()
761 * hub state machine resets port in xhci_hub_report_usb3_link_state()
777 * If CAS bit isn't set but the Port is already at in xhci_hub_report_usb3_link_state()
779 * notices the Compliance state and resets the port. in xhci_hub_report_usb3_link_state()
781 * in which sometimes the port enters compliance mode in xhci_hub_report_usb3_link_state()
782 * caused by a delay on the host-device negotiation. in xhci_hub_report_usb3_link_state()
784 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && in xhci_hub_report_usb3_link_state()
797 * the compliance mode timer is deleted. A port won't enter
803 u32 all_ports_seen_u0 = ((1 << xhci->usb3_rhub.num_ports) - 1); in xhci_del_comp_mod_timer()
806 if (!(xhci->quirks & XHCI_COMP_MODE_QUIRK)) in xhci_del_comp_mod_timer()
809 if ((xhci->port_status_u0 != all_ports_seen_u0) && port_in_u0) { in xhci_del_comp_mod_timer()
810 xhci->port_status_u0 |= 1 << wIndex; in xhci_del_comp_mod_timer()
811 if (xhci->port_status_u0 == all_ports_seen_u0) { in xhci_del_comp_mod_timer()
812 del_timer_sync(&xhci->comp_mode_recovery_timer); in xhci_del_comp_mod_timer()
821 static int xhci_handle_usb2_port_link_resume(struct xhci_port *port, in xhci_handle_usb2_port_link_resume() argument
831 hcd = port->rhub->hcd; in xhci_handle_usb2_port_link_resume()
832 bus_state = &port->rhub->bus_state; in xhci_handle_usb2_port_link_resume()
834 wIndex = port->hcd_portnum; in xhci_handle_usb2_port_link_resume()
837 return -EINVAL; in xhci_handle_usb2_port_link_resume()
839 /* did port event handler already start resume timing? */ in xhci_handle_usb2_port_link_resume()
840 if (!port->resume_timestamp) { in xhci_handle_usb2_port_link_resume()
842 if (test_bit(wIndex, &bus_state->resuming_ports)) { in xhci_handle_usb2_port_link_resume()
850 /* port resume was discovered now and here, in xhci_handle_usb2_port_link_resume()
856 set_bit(wIndex, &bus_state->resuming_ports); in xhci_handle_usb2_port_link_resume()
857 port->resume_timestamp = timeout; in xhci_handle_usb2_port_link_resume()
858 mod_timer(&hcd->rh_timer, timeout); in xhci_handle_usb2_port_link_resume()
859 usb_hcd_start_port_resume(&hcd->self, wIndex); in xhci_handle_usb2_port_link_resume()
862 } else if (time_after_eq(jiffies, port->resume_timestamp)) { in xhci_handle_usb2_port_link_resume()
865 xhci_dbg(xhci, "resume USB2 port %d-%d\n", in xhci_handle_usb2_port_link_resume()
866 hcd->self.busnum, wIndex + 1); in xhci_handle_usb2_port_link_resume()
868 port->resume_timestamp = 0; in xhci_handle_usb2_port_link_resume()
869 clear_bit(wIndex, &bus_state->resuming_ports); in xhci_handle_usb2_port_link_resume()
871 reinit_completion(&port->rexit_done); in xhci_handle_usb2_port_link_resume()
872 port->rexit_active = true; in xhci_handle_usb2_port_link_resume()
874 xhci_test_and_clear_bit(xhci, port, PORT_PLC); in xhci_handle_usb2_port_link_resume()
875 xhci_set_link_state(xhci, port, XDEV_U0); in xhci_handle_usb2_port_link_resume()
877 spin_unlock_irqrestore(&xhci->lock, *flags); in xhci_handle_usb2_port_link_resume()
879 &port->rexit_done, in xhci_handle_usb2_port_link_resume()
881 spin_lock_irqsave(&xhci->lock, *flags); in xhci_handle_usb2_port_link_resume()
888 return -ENODEV; in xhci_handle_usb2_port_link_resume()
892 int port_status = readl(port->addr); in xhci_handle_usb2_port_link_resume()
894 xhci_warn(xhci, "Port resume timed out, port %d-%d: 0x%x\n", in xhci_handle_usb2_port_link_resume()
895 hcd->self.busnum, wIndex + 1, port_status); in xhci_handle_usb2_port_link_resume()
899 * usbcore. It will be cleared later once the port is in xhci_handle_usb2_port_link_resume()
904 usb_hcd_end_port_resume(&hcd->self, wIndex); in xhci_handle_usb2_port_link_resume()
905 bus_state->port_c_suspend |= 1 << wIndex; in xhci_handle_usb2_port_link_resume()
906 bus_state->suspended_ports &= ~(1 << wIndex); in xhci_handle_usb2_port_link_resume()
928 static void xhci_get_usb3_port_status(struct xhci_port *port, u32 *status, in xhci_get_usb3_port_status() argument
937 bus_state = &port->rhub->bus_state; in xhci_get_usb3_port_status()
938 xhci = hcd_to_xhci(port->rhub->hcd); in xhci_get_usb3_port_status()
939 hcd = port->rhub->hcd; in xhci_get_usb3_port_status()
941 portnum = port->hcd_portnum; in xhci_get_usb3_port_status()
945 * Port link change with port in resume state should not be in xhci_get_usb3_port_status()
948 * cause usbcore clearing PLC first and port change event in xhci_get_usb3_port_status()
968 if (bus_state->port_remote_wakeup & (1 << portnum)) { in xhci_get_usb3_port_status()
969 bus_state->port_remote_wakeup &= ~(1 << portnum); in xhci_get_usb3_port_status()
970 usb_hcd_end_port_resume(&hcd->self, portnum); in xhci_get_usb3_port_status()
972 bus_state->suspended_ports &= ~(1 << portnum); in xhci_get_usb3_port_status()
979 static void xhci_get_usb2_port_status(struct xhci_port *port, u32 *status, in xhci_get_usb2_port_status() argument
987 bus_state = &port->rhub->bus_state; in xhci_get_usb2_port_status()
989 portnum = port->hcd_portnum; in xhci_get_usb2_port_status()
995 /* link state is only valid if port is powered */ in xhci_get_usb2_port_status()
1001 if (bus_state->suspended_ports & (1 << portnum)) { in xhci_get_usb2_port_status()
1002 bus_state->suspended_ports &= ~(1 << portnum); in xhci_get_usb2_port_status()
1003 bus_state->port_c_suspend |= 1 << portnum; in xhci_get_usb2_port_status()
1007 err = xhci_handle_usb2_port_link_resume(port, portsc, in xhci_get_usb2_port_status()
1011 else if (port->resume_timestamp || port->rexit_active) in xhci_get_usb2_port_status()
1017 * Clear usb2 resume signalling variables if port is no longer suspended in xhci_get_usb2_port_status()
1018 * or resuming. Port either resumed to U0/U1/U2, disconnected, or in a in xhci_get_usb2_port_status()
1022 if (port->resume_timestamp || in xhci_get_usb2_port_status()
1023 test_bit(portnum, &bus_state->resuming_ports)) { in xhci_get_usb2_port_status()
1024 port->resume_timestamp = 0; in xhci_get_usb2_port_status()
1025 clear_bit(portnum, &bus_state->resuming_ports); in xhci_get_usb2_port_status()
1026 usb_hcd_end_port_resume(&port->rhub->hcd->self, portnum); in xhci_get_usb2_port_status()
1028 port->rexit_active = 0; in xhci_get_usb2_port_status()
1029 bus_state->suspended_ports &= ~(1 << portnum); in xhci_get_usb2_port_status()
1034 * Converts a raw xHCI port status into the format that external USB 2.0 or USB
1038 * - Mark a port as being done with device resume,
1040 * - Stop the Synopsys redriver Compliance Mode polling.
1041 * - Drop and reacquire the xHCI lock, in order to wait for port resume.
1047 __releases(&xhci->lock) in xhci_get_port_status()
1048 __acquires(&xhci->lock) in xhci_get_port_status()
1052 struct xhci_port *port; in xhci_get_port_status() local
1055 port = rhub->ports[wIndex]; in xhci_get_port_status()
1079 /* USB2 and USB3 specific bits, including Port Link State */ in xhci_get_port_status()
1080 if (hcd->speed >= HCD_USB3) in xhci_get_port_status()
1081 xhci_get_usb3_port_status(port, &status, raw_port_status); in xhci_get_port_status()
1083 xhci_get_usb2_port_status(port, &status, raw_port_status, in xhci_get_port_status()
1086 if (bus_state->port_c_suspend & (1 << wIndex)) in xhci_get_port_status()
1108 struct xhci_port *port; in xhci_hub_control() local
1112 ports = rhub->ports; in xhci_hub_control()
1113 max_ports = rhub->num_ports; in xhci_hub_control()
1114 bus_state = &rhub->bus_state; in xhci_hub_control()
1117 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1120 /* No power source, over-current reported per port */ in xhci_hub_control()
1128 if (hcd->speed >= HCD_USB3 && in xhci_hub_control()
1142 if (hcd->speed < HCD_USB3) in xhci_hub_control()
1146 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1152 wIndex--; in xhci_hub_control()
1153 port = ports[portnum1 - 1]; in xhci_hub_control()
1154 temp = readl(port->addr); in xhci_hub_control()
1157 retval = -ENODEV; in xhci_hub_control()
1166 xhci_dbg(xhci, "Get port status %d-%d read: 0x%x, return 0x%x", in xhci_hub_control()
1167 hcd->self.busnum, portnum1, temp, status); in xhci_hub_control()
1170 /* if USB 3.1 extended port status return additional 4 bytes */ in xhci_hub_control()
1174 if (hcd->speed < HCD_USB31 || wLength != 8) { in xhci_hub_control()
1175 xhci_err(xhci, "get ext port status invalid parameter\n"); in xhci_hub_control()
1176 retval = -EINVAL; in xhci_hub_control()
1179 port_li = readl(port->addr + PORTLI); in xhci_hub_control()
1198 port = ports[portnum1 - 1]; in xhci_hub_control()
1199 wIndex--; in xhci_hub_control()
1200 temp = readl(port->addr); in xhci_hub_control()
1203 retval = -ENODEV; in xhci_hub_control()
1207 /* FIXME: What new port features do we need to support? */ in xhci_hub_control()
1210 temp = readl(port->addr); in xhci_hub_control()
1212 /* Resume the port to U0 first */ in xhci_hub_control()
1213 xhci_set_link_state(xhci, port, XDEV_U0); in xhci_hub_control()
1214 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1216 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1219 * a port unless the port reports that it is in the in xhci_hub_control()
1222 temp = readl(port->addr); in xhci_hub_control()
1225 xhci_warn(xhci, "USB core suspending port %d-%d not in U0/U1/U2\n", in xhci_hub_control()
1226 hcd->self.busnum, portnum1); in xhci_hub_control()
1237 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1239 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1241 xhci_set_link_state(xhci, port, XDEV_U3); in xhci_hub_control()
1243 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1245 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1247 temp = readl(port->addr); in xhci_hub_control()
1248 bus_state->suspended_ports |= 1 << wIndex; in xhci_hub_control()
1251 temp = readl(port->addr); in xhci_hub_control()
1252 /* Disable port */ in xhci_hub_control()
1254 xhci_dbg(xhci, "Disable port %d-%d\n", in xhci_hub_control()
1255 hcd->self.busnum, portnum1); in xhci_hub_control()
1264 writel(temp | PORT_PE, port->addr); in xhci_hub_control()
1265 temp = readl(port->addr); in xhci_hub_control()
1269 /* Put link in RxDetect (enable port) */ in xhci_hub_control()
1271 xhci_dbg(xhci, "Enable port %d-%d\n", in xhci_hub_control()
1272 hcd->self.busnum, portnum1); in xhci_hub_control()
1273 xhci_set_link_state(xhci, port, link_state); in xhci_hub_control()
1274 temp = readl(port->addr); in xhci_hub_control()
1280 * root hub port's transition to compliance mode upon in xhci_hub_control()
1293 if (!HCC2_CTC(xhci->hcc_params2)) { in xhci_hub_control()
1294 xhci_dbg(xhci, "CTC flag is 0, port already supports entering compliance mode\n"); in xhci_hub_control()
1299 xhci_warn(xhci, "Can't set compliance mode when port is connected\n"); in xhci_hub_control()
1303 xhci_dbg(xhci, "Enable compliance mode transition for port %d-%d\n", in xhci_hub_control()
1304 hcd->self.busnum, portnum1); in xhci_hub_control()
1305 xhci_set_link_state(xhci, port, link_state); in xhci_hub_control()
1307 temp = readl(port->addr); in xhci_hub_control()
1310 /* Port must be enabled */ in xhci_hub_control()
1312 retval = -ENODEV; in xhci_hub_control()
1315 /* Can't set port link state above '3' (U3) */ in xhci_hub_control()
1317 xhci_warn(xhci, "Cannot set port %d-%d link state %d\n", in xhci_hub_control()
1318 hcd->self.busnum, portnum1, link_state); in xhci_hub_control()
1340 reinit_completion(&port->u3exit_done); in xhci_hub_control()
1343 xhci_set_link_state(xhci, port, USB_SS_PORT_LS_U0); in xhci_hub_control()
1349 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1350 if (!wait_for_completion_timeout(&port->u3exit_done, in xhci_hub_control()
1352 xhci_dbg(xhci, "missing U0 port change event for port %d-%d\n", in xhci_hub_control()
1353 hcd->self.busnum, portnum1); in xhci_hub_control()
1354 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1355 temp = readl(port->addr); in xhci_hub_control()
1366 spin_unlock_irqrestore(&xhci->lock, in xhci_hub_control()
1369 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1371 xhci_set_link_state(xhci, port, USB_SS_PORT_LS_U3); in xhci_hub_control()
1372 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1373 while (retries--) { in xhci_hub_control()
1375 temp = readl(port->addr); in xhci_hub_control()
1379 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1380 temp = readl(port->addr); in xhci_hub_control()
1381 bus_state->suspended_ports |= 1 << wIndex; in xhci_hub_control()
1386 * Turn on ports, even if there isn't per-port switching. in xhci_hub_control()
1395 writel(temp, port->addr); in xhci_hub_control()
1397 temp = readl(port->addr); in xhci_hub_control()
1398 xhci_dbg(xhci, "set port reset, actual port %d-%d status = 0x%x\n", in xhci_hub_control()
1399 hcd->self.busnum, portnum1, temp); in xhci_hub_control()
1402 xhci_set_remote_wake_mask(xhci, port, wake_mask); in xhci_hub_control()
1403 temp = readl(port->addr); in xhci_hub_control()
1404 xhci_dbg(xhci, "set port remote wake mask, actual port %d-%d status = 0x%x\n", in xhci_hub_control()
1405 hcd->self.busnum, portnum1, temp); in xhci_hub_control()
1409 writel(temp, port->addr); in xhci_hub_control()
1410 temp = readl(port->addr); in xhci_hub_control()
1413 if (hcd->speed < HCD_USB3) in xhci_hub_control()
1415 temp = readl(port->addr + PORTPMSC); in xhci_hub_control()
1418 writel(temp, port->addr + PORTPMSC); in xhci_hub_control()
1421 if (hcd->speed < HCD_USB3) in xhci_hub_control()
1423 temp = readl(port->addr + PORTPMSC); in xhci_hub_control()
1426 writel(temp, port->addr + PORTPMSC); in xhci_hub_control()
1429 /* 4.19.6 Port Test Modes (USB2 Test Mode) */ in xhci_hub_control()
1430 if (hcd->speed != HCD_USB2) in xhci_hub_control()
1442 temp = readl(port->addr); in xhci_hub_control()
1448 port = ports[portnum1 - 1]; in xhci_hub_control()
1450 wIndex--; in xhci_hub_control()
1451 temp = readl(port->addr); in xhci_hub_control()
1454 retval = -ENODEV; in xhci_hub_control()
1457 /* FIXME: What new port features do we need to support? */ in xhci_hub_control()
1461 temp = readl(port->addr); in xhci_hub_control()
1470 set_bit(wIndex, &bus_state->resuming_ports); in xhci_hub_control()
1471 usb_hcd_start_port_resume(&hcd->self, wIndex); in xhci_hub_control()
1472 xhci_set_link_state(xhci, port, XDEV_RESUME); in xhci_hub_control()
1473 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1475 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1476 xhci_set_link_state(xhci, port, XDEV_U0); in xhci_hub_control()
1477 clear_bit(wIndex, &bus_state->resuming_ports); in xhci_hub_control()
1478 usb_hcd_end_port_resume(&hcd->self, wIndex); in xhci_hub_control()
1480 bus_state->port_c_suspend |= 1 << wIndex; in xhci_hub_control()
1491 bus_state->port_c_suspend &= ~(1 << wIndex); in xhci_hub_control()
1501 port->addr, temp); in xhci_hub_control()
1505 port->addr, temp); in xhci_hub_control()
1520 retval = -EPIPE; in xhci_hub_control()
1522 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1528 * Ports are 0-indexed from the HCD point of view,
1529 * and 1-indexed from the USB core pointer of view.
1531 * Note that the status change bits will be cleared as soon as a port status
1548 ports = rhub->ports; in xhci_hub_status_data()
1549 max_ports = rhub->num_ports; in xhci_hub_status_data()
1550 bus_state = &rhub->bus_state; in xhci_hub_status_data()
1557 * Inform the usbcore about resume-in-progress by returning in xhci_hub_status_data()
1558 * a non-zero value even if there are no status changes. in xhci_hub_status_data()
1560 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_status_data()
1562 status = bus_state->resuming_ports; in xhci_hub_status_data()
1568 if (xhci->run_graceperiod) { in xhci_hub_status_data()
1569 if (time_before(jiffies, xhci->run_graceperiod)) in xhci_hub_status_data()
1572 xhci->run_graceperiod = 0; in xhci_hub_status_data()
1577 /* For each port, did anything change? If so, set that bit in buf. */ in xhci_hub_status_data()
1579 temp = readl(ports[i]->addr); in xhci_hub_status_data()
1582 retval = -ENODEV; in xhci_hub_status_data()
1588 (bus_state->port_c_suspend & 1 << i) || in xhci_hub_status_data()
1589 (ports[i]->resume_timestamp && time_after_eq( in xhci_hub_status_data()
1590 jiffies, ports[i]->resume_timestamp))) { in xhci_hub_status_data()
1600 xhci_dbg(xhci, "%s: stopping port polling.\n", __func__); in xhci_hub_status_data()
1601 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags); in xhci_hub_status_data()
1603 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_status_data()
1621 ports = rhub->ports; in xhci_bus_suspend()
1622 max_ports = rhub->num_ports; in xhci_bus_suspend()
1623 bus_state = &rhub->bus_state; in xhci_bus_suspend()
1624 wake_enabled = hcd->self.root_hub->do_remote_wakeup; in xhci_bus_suspend()
1626 spin_lock_irqsave(&xhci->lock, flags); in xhci_bus_suspend()
1629 if (bus_state->resuming_ports || /* USB2 */ in xhci_bus_suspend()
1630 bus_state->port_remote_wakeup) { /* USB3 */ in xhci_bus_suspend()
1631 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_suspend()
1632 xhci_dbg(xhci, "suspend failed because a port is resuming\n"); in xhci_bus_suspend()
1633 return -EBUSY; in xhci_bus_suspend()
1640 bus_state->bus_suspended = 0; in xhci_bus_suspend()
1642 while (port_index--) { in xhci_bus_suspend()
1646 t1 = readl(ports[port_index]->addr); in xhci_bus_suspend()
1651 * Give a USB3 port in link training time to finish, but don't in xhci_bus_suspend()
1652 * prevent suspend as port might be stuck in xhci_bus_suspend()
1654 if ((hcd->speed >= HCD_USB3) && retries-- && in xhci_bus_suspend()
1656 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_suspend()
1658 spin_lock_irqsave(&xhci->lock, flags); in xhci_bus_suspend()
1659 xhci_dbg(xhci, "port %d-%d polling in bus suspend, waiting\n", in xhci_bus_suspend()
1660 hcd->self.busnum, port_index + 1); in xhci_bus_suspend()
1663 /* bail out if port detected a over-current condition */ in xhci_bus_suspend()
1665 bus_state->bus_suspended = 0; in xhci_bus_suspend()
1666 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_suspend()
1667 xhci_dbg(xhci, "Bus suspend bailout, port over-current detected\n"); in xhci_bus_suspend()
1668 return -EBUSY; in xhci_bus_suspend()
1673 bus_state->bus_suspended = 0; in xhci_bus_suspend()
1674 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_suspend()
1675 xhci_dbg(xhci, "Bus suspend bailout, port connect change\n"); in xhci_bus_suspend()
1676 return -EBUSY; in xhci_bus_suspend()
1678 xhci_dbg(xhci, "port %d-%d not suspended\n", in xhci_bus_suspend()
1679 hcd->self.busnum, port_index + 1); in xhci_bus_suspend()
1682 set_bit(port_index, &bus_state->bus_suspended); in xhci_bus_suspend()
1697 if ((xhci->quirks & XHCI_U2_DISABLE_WAKE) && in xhci_bus_suspend()
1698 (hcd->speed < HCD_USB3)) { in xhci_bus_suspend()
1699 if (usb_amd_pt_check_port(hcd->self.controller, in xhci_bus_suspend()
1711 /* write port settings, stopping and suspending ports if needed */ in xhci_bus_suspend()
1713 while (port_index--) { in xhci_bus_suspend()
1716 if (test_bit(port_index, &bus_state->bus_suspended)) { in xhci_bus_suspend()
1722 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_suspend()
1724 spin_lock_irqsave(&xhci->lock, flags); in xhci_bus_suspend()
1727 writel(portsc_buf[port_index], ports[port_index]->addr); in xhci_bus_suspend()
1729 hcd->state = HC_STATE_SUSPENDED; in xhci_bus_suspend()
1730 bus_state->next_statechange = jiffies + msecs_to_jiffies(10); in xhci_bus_suspend()
1731 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_suspend()
1733 if (bus_state->bus_suspended) in xhci_bus_suspend()
1740 * Workaround for missing Cold Attach Status (CAS) if device re-plugged in S3.
1742 * See Intel 100/c230 series PCH specification update Doc #332692-006 Errata #8
1744 static bool xhci_port_missing_cas_quirk(struct xhci_port *port) in xhci_port_missing_cas_quirk() argument
1748 portsc = readl(port->addr); in xhci_port_missing_cas_quirk()
1758 /* clear wakeup/change bits, and do a warm port reset */ in xhci_port_missing_cas_quirk()
1761 writel(portsc, port->addr); in xhci_port_missing_cas_quirk()
1763 readl(port->addr); in xhci_port_missing_cas_quirk()
1781 ports = rhub->ports; in xhci_bus_resume()
1782 max_ports = rhub->num_ports; in xhci_bus_resume()
1783 bus_state = &rhub->bus_state; in xhci_bus_resume()
1785 if (time_before(jiffies, bus_state->next_statechange)) in xhci_bus_resume()
1788 spin_lock_irqsave(&xhci->lock, flags); in xhci_bus_resume()
1790 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_resume()
1791 return -ESHUTDOWN; in xhci_bus_resume()
1795 temp = readl(&xhci->op_regs->command); in xhci_bus_resume()
1797 writel(temp, &xhci->op_regs->command); in xhci_bus_resume()
1800 if (hcd->speed >= HCD_USB3) in xhci_bus_resume()
1806 while (port_index--) { in xhci_bus_resume()
1807 portsc = readl(ports[port_index]->addr); in xhci_bus_resume()
1810 if ((xhci->quirks & XHCI_MISSING_CAS) && in xhci_bus_resume()
1811 (hcd->speed >= HCD_USB3) && in xhci_bus_resume()
1813 xhci_dbg(xhci, "reset stuck port %d-%d\n", in xhci_bus_resume()
1814 hcd->self.busnum, port_index + 1); in xhci_bus_resume()
1815 clear_bit(port_index, &bus_state->bus_suspended); in xhci_bus_resume()
1819 if (test_bit(port_index, &bus_state->bus_suspended)) in xhci_bus_resume()
1832 &bus_state->bus_suspended); in xhci_bus_resume()
1837 writel(portsc, ports[port_index]->addr); in xhci_bus_resume()
1841 if (hcd->speed < HCD_USB3) { in xhci_bus_resume()
1842 if (bus_state->bus_suspended) { in xhci_bus_resume()
1843 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_resume()
1845 spin_lock_irqsave(&xhci->lock, flags); in xhci_bus_resume()
1847 for_each_set_bit(port_index, &bus_state->bus_suspended, in xhci_bus_resume()
1857 for_each_set_bit(port_index, &bus_state->bus_suspended, BITS_PER_LONG) { in xhci_bus_resume()
1858 sret = xhci_handshake(ports[port_index]->addr, PORT_PLC, in xhci_bus_resume()
1861 xhci_warn(xhci, "port %d-%d resume PLC timeout\n", in xhci_bus_resume()
1862 hcd->self.busnum, port_index + 1); in xhci_bus_resume()
1870 (void) readl(&xhci->op_regs->command); in xhci_bus_resume()
1872 bus_state->next_statechange = jiffies + msecs_to_jiffies(5); in xhci_bus_resume()
1873 /* re-enable irqs */ in xhci_bus_resume()
1874 temp = readl(&xhci->op_regs->command); in xhci_bus_resume()
1876 writel(temp, &xhci->op_regs->command); in xhci_bus_resume()
1877 temp = readl(&xhci->op_regs->command); in xhci_bus_resume()
1879 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_resume()
1887 /* USB3 port wakeups are reported via usb_wakeup_notification() */ in xhci_get_resuming_ports()
1888 return rhub->bus_state.resuming_ports; /* USB2 ports only */ in xhci_get_resuming_ports()