Lines Matching +full:little +full:- +full:endian
39 * further describe the buffer's format - for example tiling or compression.
42 * ----------------
56 * vendor-namespaced, and as such the relationship between a fourcc code and a
58 * may preserve meaning - such as number of planes - from the fourcc code,
72 #define DRM_FORMAT_BIG_ENDIAN (1U<<31) /* format is big endian instead of little endian */
84 #define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /* [15:0] R little endian */
87 #define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8') /* [15:0] R:G 8:8 little endian */
88 #define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8') /* [15:0] G:R 8:8 little endian */
91 #define DRM_FORMAT_RG1616 fourcc_code('R', 'G', '3', '2') /* [31:0] R:G 16:16 little endian */
92 #define DRM_FORMAT_GR1616 fourcc_code('G', 'R', '3', '2') /* [31:0] G:R 16:16 little endian */
99 #define DRM_FORMAT_XRGB4444 fourcc_code('X', 'R', '1', '2') /* [15:0] x:R:G:B 4:4:4:4 little endian…
100 #define DRM_FORMAT_XBGR4444 fourcc_code('X', 'B', '1', '2') /* [15:0] x:B:G:R 4:4:4:4 little endian…
101 #define DRM_FORMAT_RGBX4444 fourcc_code('R', 'X', '1', '2') /* [15:0] R:G:B:x 4:4:4:4 little endian…
102 #define DRM_FORMAT_BGRX4444 fourcc_code('B', 'X', '1', '2') /* [15:0] B:G:R:x 4:4:4:4 little endian…
104 #define DRM_FORMAT_ARGB4444 fourcc_code('A', 'R', '1', '2') /* [15:0] A:R:G:B 4:4:4:4 little endian…
105 #define DRM_FORMAT_ABGR4444 fourcc_code('A', 'B', '1', '2') /* [15:0] A:B:G:R 4:4:4:4 little endian…
106 #define DRM_FORMAT_RGBA4444 fourcc_code('R', 'A', '1', '2') /* [15:0] R:G:B:A 4:4:4:4 little endian…
107 #define DRM_FORMAT_BGRA4444 fourcc_code('B', 'A', '1', '2') /* [15:0] B:G:R:A 4:4:4:4 little endian…
109 #define DRM_FORMAT_XRGB1555 fourcc_code('X', 'R', '1', '5') /* [15:0] x:R:G:B 1:5:5:5 little endian…
110 #define DRM_FORMAT_XBGR1555 fourcc_code('X', 'B', '1', '5') /* [15:0] x:B:G:R 1:5:5:5 little endian…
111 #define DRM_FORMAT_RGBX5551 fourcc_code('R', 'X', '1', '5') /* [15:0] R:G:B:x 5:5:5:1 little endian…
112 #define DRM_FORMAT_BGRX5551 fourcc_code('B', 'X', '1', '5') /* [15:0] B:G:R:x 5:5:5:1 little endian…
114 #define DRM_FORMAT_ARGB1555 fourcc_code('A', 'R', '1', '5') /* [15:0] A:R:G:B 1:5:5:5 little endian…
115 #define DRM_FORMAT_ABGR1555 fourcc_code('A', 'B', '1', '5') /* [15:0] A:B:G:R 1:5:5:5 little endian…
116 #define DRM_FORMAT_RGBA5551 fourcc_code('R', 'A', '1', '5') /* [15:0] R:G:B:A 5:5:5:1 little endian…
117 #define DRM_FORMAT_BGRA5551 fourcc_code('B', 'A', '1', '5') /* [15:0] B:G:R:A 5:5:5:1 little endian…
119 #define DRM_FORMAT_RGB565 fourcc_code('R', 'G', '1', '6') /* [15:0] R:G:B 5:6:5 little endian */
120 #define DRM_FORMAT_BGR565 fourcc_code('B', 'G', '1', '6') /* [15:0] B:G:R 5:6:5 little endian */
123 #define DRM_FORMAT_RGB888 fourcc_code('R', 'G', '2', '4') /* [23:0] R:G:B little endian */
124 #define DRM_FORMAT_BGR888 fourcc_code('B', 'G', '2', '4') /* [23:0] B:G:R little endian */
127 #define DRM_FORMAT_XRGB8888 fourcc_code('X', 'R', '2', '4') /* [31:0] x:R:G:B 8:8:8:8 little endian…
128 #define DRM_FORMAT_XBGR8888 fourcc_code('X', 'B', '2', '4') /* [31:0] x:B:G:R 8:8:8:8 little endian…
129 #define DRM_FORMAT_RGBX8888 fourcc_code('R', 'X', '2', '4') /* [31:0] R:G:B:x 8:8:8:8 little endian…
130 #define DRM_FORMAT_BGRX8888 fourcc_code('B', 'X', '2', '4') /* [31:0] B:G:R:x 8:8:8:8 little endian…
132 #define DRM_FORMAT_ARGB8888 fourcc_code('A', 'R', '2', '4') /* [31:0] A:R:G:B 8:8:8:8 little endian…
133 #define DRM_FORMAT_ABGR8888 fourcc_code('A', 'B', '2', '4') /* [31:0] A:B:G:R 8:8:8:8 little endian…
134 #define DRM_FORMAT_RGBA8888 fourcc_code('R', 'A', '2', '4') /* [31:0] R:G:B:A 8:8:8:8 little endian…
135 #define DRM_FORMAT_BGRA8888 fourcc_code('B', 'A', '2', '4') /* [31:0] B:G:R:A 8:8:8:8 little endian…
137 …RM_FORMAT_XRGB2101010 fourcc_code('X', 'R', '3', '0') /* [31:0] x:R:G:B 2:10:10:10 little endian */
138 …RM_FORMAT_XBGR2101010 fourcc_code('X', 'B', '3', '0') /* [31:0] x:B:G:R 2:10:10:10 little endian */
139 …RM_FORMAT_RGBX1010102 fourcc_code('R', 'X', '3', '0') /* [31:0] R:G:B:x 10:10:10:2 little endian */
140 …RM_FORMAT_BGRX1010102 fourcc_code('B', 'X', '3', '0') /* [31:0] B:G:R:x 10:10:10:2 little endian */
142 …RM_FORMAT_ARGB2101010 fourcc_code('A', 'R', '3', '0') /* [31:0] A:R:G:B 2:10:10:10 little endian */
143 …RM_FORMAT_ABGR2101010 fourcc_code('A', 'B', '3', '0') /* [31:0] A:B:G:R 2:10:10:10 little endian */
144 …RM_FORMAT_RGBA1010102 fourcc_code('R', 'A', '3', '0') /* [31:0] R:G:B:A 10:10:10:2 little endian */
145 …RM_FORMAT_BGRA1010102 fourcc_code('B', 'A', '3', '0') /* [31:0] B:G:R:A 10:10:10:2 little endian */
149 * IEEE 754-2008 binary16 half-precision float
152 …FORMAT_XRGB16161616F fourcc_code('X', 'R', '4', 'H') /* [63:0] x:R:G:B 16:16:16:16 little endian */
153 …FORMAT_XBGR16161616F fourcc_code('X', 'B', '4', 'H') /* [63:0] x:B:G:R 16:16:16:16 little endian */
155 …FORMAT_ARGB16161616F fourcc_code('A', 'R', '4', 'H') /* [63:0] A:R:G:B 16:16:16:16 little endian */
156 …FORMAT_ABGR16161616F fourcc_code('A', 'B', '4', 'H') /* [63:0] A:B:G:R 16:16:16:16 little endian */
159 …e DRM_FORMAT_YUYV fourcc_code('Y', 'U', 'Y', 'V') /* [31:0] Cr0:Y1:Cb0:Y0 8:8:8:8 little endian */
160 …e DRM_FORMAT_YVYU fourcc_code('Y', 'V', 'Y', 'U') /* [31:0] Cb0:Y1:Cr0:Y0 8:8:8:8 little endian */
161 …e DRM_FORMAT_UYVY fourcc_code('U', 'Y', 'V', 'Y') /* [31:0] Y1:Cr0:Y0:Cb0 8:8:8:8 little endian */
162 …e DRM_FORMAT_VYUY fourcc_code('V', 'Y', 'U', 'Y') /* [31:0] Y1:Cb0:Y0:Cr0 8:8:8:8 little endian */
164 #define DRM_FORMAT_AYUV fourcc_code('A', 'Y', 'U', 'V') /* [31:0] A:Y:Cb:Cr 8:8:8:8 little endian …
165 …ne DRM_FORMAT_XYUV8888 fourcc_code('X', 'Y', 'U', 'V') /* [31:0] X:Y:Cb:Cr 8:8:8:8 little endian */
166 #define DRM_FORMAT_VUY888 fourcc_code('V', 'U', '2', '4') /* [23:0] Cr:Cb:Y 8:8:8 little endian */
167 …010 fourcc_code('V', 'U', '3', '0') /* Y followed by U then V, 10:10:10. Non-linear modifier only …
171 * 16-xx padding occupy lsb
173 …', '2', '1', '0') /* [63:0] Cr0:0:Y1:0:Cb0:0:Y0:0 10:6:10:6:10:6:10:6 little endian per 2 Y pixels…
174 …', '2', '1', '2') /* [63:0] Cr0:0:Y1:0:Cb0:0:Y0:0 12:4:12:4:12:4:12:4 little endian per 2 Y pixels…
175 … fourcc_code('Y', '2', '1', '6') /* [63:0] Cr0:Y1:Cb0:Y0 16:16:16:16 little endian per 2 Y pixels…
179 * 16-xx padding occupy lsb except Y410
181 …FORMAT_Y410 fourcc_code('Y', '4', '1', '0') /* [31:0] A:Cr:Y:Cb 2:10:10:10 little endian */
182 … fourcc_code('Y', '4', '1', '2') /* [63:0] A:0:Cr:0:Y:0:Cb:0 12:4:12:4:12:4:12:4 little endian */
183 …ORMAT_Y416 fourcc_code('Y', '4', '1', '6') /* [63:0] A:Cr:Y:Cb 16:16:16:16 little endian */
185 …_FORMAT_XVYU2101010 fourcc_code('X', 'V', '3', '0') /* [31:0] X:Cr:Y:Cb 2:10:10:10 little endian */
186 …16 fourcc_code('X', 'V', '3', '6') /* [63:0] X:0:Cr:0:Y:0:Cb:0 12:4:12:4:12:4:12:4 little endian */
187 …ORMAT_XVYU16161616 fourcc_code('X', 'V', '4', '8') /* [63:0] X:Cr:Y:Cb 16:16:16:16 little endian */
193 …:0] A3:A2:Y3:0:Cr0:0:Y2:0:A1:A0:Y1:0:Cb0:0:Y0:0 1:1:8:2:8:2:8:2:1:1:8:2:8:2:8:2 little endian */
195 …:0] X3:X2:Y3:0:Cr0:0:Y2:0:X1:X0:Y1:0:Cb0:0:Y0:0 1:1:8:2:8:2:8:2:1:1:8:2:8:2:8:2 little endian */
198 /* [63:0] A3:A2:Y3:Cr0:Y2:A1:A0:Y1:Cb0:Y0 1:1:10:10:10:1:1:10:10:10 little endian */
200 /* [63:0] X3:X2:Y3:Cr0:Y2:X1:X0:Y1:Cb0:Y0 1:1:10:10:10:1:1:10:10:10 little endian */
204 * 1-plane YUV 4:2:0
207 * These formats can only be used with a non-Linear modifier.
229 * index 1 = Cr:Cb plane, [15:0] Cr:Cb little endian
231 * index 1 = Cb:Cr plane, [15:0] Cb:Cr little endian
237 #define DRM_FORMAT_NV24 fourcc_code('N', 'V', '2', '4') /* non-subsampled Cr:Cb plane */
238 #define DRM_FORMAT_NV42 fourcc_code('N', 'V', '4', '2') /* non-subsampled Cb:Cr plane */
241 * index 0 = Y plane, [39:0] Y3:Y2:Y1:Y0 little endian
242 * index 1 = Cr:Cb plane, [39:0] Cr1:Cb1:Cr0:Cb0 little endian
248 * index 0 = Y plane, [15:0] Y:x [10:6] little endian
249 * index 1 = Cr:Cb plane, [31:0] Cr:x:Cb:x [10:6:10:6] little endian
255 * index 0 = Y plane, [15:0] Y:x [10:6] little endian
256 * index 1 = Cr:Cb plane, [31:0] Cr:x:Cb:x [10:6:10:6] little endian
262 * index 0 = Y plane, [15:0] Y:x [12:4] little endian
263 * index 1 = Cr:Cb plane, [31:0] Cr:x:Cb:x [12:4:12:4] little endian
269 * index 0 = Y plane, [15:0] Y little endian
270 * index 1 = Cr:Cb plane, [31:0] Cr:Cb [16:16] little endian
276 * index 0 = Y plane, [31:0] x:Y2:Y1:Y0 2:10:10:10 little endian
277 * index 1 = Cr:Cb plane, [63:0] x:Cr2:Cb2:Cr1:x:Cb1:Cr0:Cb0 [2:10:10:10:2:10:10:10] little endian
281 /* 3 plane non-subsampled (444) YCbCr
283 * index 0: Y plane, [15:0] Y:x [10:6] little endian
284 * index 1: Cb plane, [15:0] Cb:x [10:6] little endian
285 * index 2: Cr plane, [15:0] Cr:x [10:6] little endian
289 /* 3 plane non-subsampled (444) YCrCb
291 * index 0: Y plane, [15:0] Y:x [10:6] little endian
292 * index 1: Cr plane, [15:0] Cr:x [10:6] little endian
293 * index 2: Cb plane, [15:0] Cb:x [10:6] little endian
314 #define DRM_FORMAT_YUV444 fourcc_code('Y', 'U', '2', '4') /* non-subsampled Cb (1) and Cr (2) plane…
315 #define DRM_FORMAT_YVU444 fourcc_code('Y', 'V', '2', '4') /* non-subsampled Cr (1) and Cb (2) plane…
321 * Format modifiers describe, typically, a re-ordering or modification
325 * The upper 8 bits of the format modifier are a vendor-id as assigned
345 #define DRM_FORMAT_RESERVED ((1ULL << 56) - 1)
359 * DRM_FORMAT_MOD_GENERIC_* definitions are used to provide vendor-neutral names
361 * compatibility, in cases where a vendor-specific definition already exists and
366 * generic layouts (such as pixel re-ordering), which may have
367 * independently-developed support across multiple vendors.
370 * vendor-specific modifier, a new 'GENERIC' vendor or modifier using vendor
397 * which tells the driver to also take driver-internal information into account
405 * Intel X-tiling layout
408 * in row-major layout. Within the tile bytes are laid out row-major, with
409 * a platform-dependent stride. On top of that the memory can apply
410 * platform-depending swizzling of some higher address bits into bit6.
414 * cross-driver sharing. It exists since on a given platform it does uniquely
415 * identify the layout in a simple way for i915-specific userspace, which
422 * Intel Y-tiling layout
425 * in row-major layout. Within the tile bytes are laid out in OWORD (16 bytes)
426 * chunks column-major, with a platform-dependent height. On top of that the
427 * memory can apply platform-depending swizzling of some higher address bits
432 * cross-driver sharing. It exists since on a given platform it does uniquely
433 * identify the layout in a simple way for i915-specific userspace, which
440 * Intel Yf-tiling layout
442 * This is a tiled layout using 4Kb tiles in row-major layout.
443 * Within the tile pixels are laid out in 16 256 byte units / sub-tiles which
444 * are arranged in four groups (two wide, two high) with column-major layout.
446 * out as 2x2 column-major.
458 * The main surface will be plane index 0 and must be Y/Yf-tiled,
475 * Intel color control surfaces (CCS) for Gen-12 render compression.
477 * The main surface is Y-tiled and at plane index 0, the CCS is linear and
481 * Y-tile widths.
486 * Intel color control surfaces (CCS) for Gen-12 media compression
488 * The main surface is Y-tiled and at plane index 0, the CCS is linear and
492 * Y-tile widths. For semi-planar formats like NV12, CCS planes follow the
499 * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks
501 * Macroblocks are laid in a Z-shape, and each pixel data is following the
506 * - multiple of 128 pixels for the width
507 * - multiple of 32 pixels for the height
509 * For more information: see https://linuxtv.org/downloads/v4l-dvb-apis/re32.html
514 * Tiled, 16 (pixels) x 16 (lines) - sized macroblocks
516 * This is a simple tiled layout using tiles of 16x16 pixels in a row-major
526 * Implementation may be platform and base-format specific.
540 * This is a simple tiled layout using tiles of 4x4 pixels in a row-major
546 * Vivante 64x64 super-tiling layout
548 * This is a tiled layout using 64x64 pixel super-tiles, where each super-tile
549 * contains 8x4 groups of 2x4 tiles of 4x4 pixels (like above) each, all in row-
553 * https://github.com/etnaviv/etna_viv/blob/master/doc/hardware.md#texture-tiling
558 * Vivante 4x4 tiling layout for dual-pipe
562 * compared to the non-split tiled layout.
567 * Vivante 64x64 super-tiling layout for dual-pipe
569 * Same as the 64x64 super-tiling layout, except every second 4x4 pixel tile
571 * therefore halved compared to the non-split super-tiled layout.
599 * ---- ----- -----------------------------------------------------------------
603 * DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK()-based modifiers.
605 * 4:4 - Must be 1, to indicate block-linear layout. Necessary for
607 * DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK()-based modifiers.
609 * 8:5 - Reserved (To support 3D-surfaces with variable log2(depth) block
617 * 11:9 - Reserved (To support 2D-array textures with variable array stride
638 * 0 = Gob Height 8, Fermi - Volta, Tegra K1+ Page Kind mapping
639 * 1 = Gob Height 4, G80 - GT2XX Page Kind mapping
649 * 0 = Tegra K1 - Tegra Parker/TX2 Layout.
665 * 55:25 - Reserved for future use. Must be zero.
677 * with block-linear layouts, is remapped within drivers to the value 0xfe,
678 * which corresponds to the "generic" kind used for simple single-sample
679 * uncompressed color formats on Fermi - Volta GPUs.
696 * Within a GOB, data is ordered as 16B x 2 lines sectors laid in Z-shape.
739 ((1ULL << __fourcc_mod_broadcom_param_bits) - 1)))
741 ((m) & ~(((1ULL << __fourcc_mod_broadcom_param_bits) - 1) << \
750 * - 64b utiles of pixels in a raster-order grid according to cpp. It's 4x4
753 * - 1k subtiles made of a 4x4 raster-order grid of 64b utiles (so usually
756 * - 4k tiles made of a 2x2 grid of 1k subtiles (so usually 32x32 pixels). On
760 * - an image made of 4k tiles in rows either left-to-right (even rows of 4k
761 * tiles) or right-to-left (odd rows of 4k tiles).
784 * and UV. Some SAND-using hardware stores UV in a separate tiled
828 * the assumption is that a no-XOR tiling modifier will be created.
836 * It provides fine-grained random access and minimizes the amount of data
841 * and different devices or use-cases may support different combinations.
873 * Multiple superblock sizes are only valid for multi-plane YCbCr formats.
890 * AFBC block-split
911 * AFBC copy-block restrict
913 * Buffers with this flag must obey the copy-block restriction. The restriction
914 * is such that there are no copy-blocks referring across the border of 8x8
934 * Indicates that the buffer makes use of solid-color blocks, whereby bandwidth
940 * AFBC double-buffer
942 * Indicates that the buffer is allocated in a layout safe for front-buffer
950 * Indicates that the buffer includes per-superblock content hints.
967 * Arm 16x16 Block U-Interleaved modifier
986 * both in row-major order.
1000 * The underlying storage is considered to be 3 components, 8bit or 10-bit
1002 * - DRM_FORMAT_YUV420_8BIT
1003 * - DRM_FORMAT_YUV420_10BIT
1027 * - a body content organized in 64x32 superblocks with 4096 bytes per
1029 * - a 32 bytes per 128x64 header block
1047 * be accessible by the user-space clients, but only accessible by the
1050 * The user-space clients should expect a failure while trying to mmap
1051 * the DMA-BUF handle returned by the producer.