Lines Matching +full:codec +full:- +full:0
1 // SPDX-License-Identifier: GPL-2.0-or-later
37 #define FLOAT_ZERO 0x00000000
38 #define FLOAT_ONE 0x3f800000
39 #define FLOAT_TWO 0x40000000
40 #define FLOAT_THREE 0x40400000
41 #define FLOAT_FIVE 0x40a00000
42 #define FLOAT_SIX 0x40c00000
43 #define FLOAT_EIGHT 0x41000000
44 #define FLOAT_MINUS_5 0xc0a00000
46 #define UNSOL_TAG_DSP 0x16
55 #define MASTERCONTROL 0x80
59 #define WIDGET_CHIP_CTRL 0x15
60 #define WIDGET_DSP_CTRL 0x16
70 #define SCP_SET 0
74 #define DESKTOP_EFX_FILE "ctefx-desktop.bin"
75 #define R3DI_EFX_FILE "ctefx-r3di.bin"
107 #define VNODE_START_NID 0x80
115 #define VNODES_COUNT (VNODE_END_NID - VNODE_START_NID)
117 #define EFFECT_START_NID 0x90
126 #define OUT_EFFECTS_COUNT (OUT_EFFECT_END_NID - OUT_EFFECT_START_NID)
134 #define IN_EFFECTS_COUNT (IN_EFFECT_END_NID - IN_EFFECT_START_NID)
154 #define EFFECTS_COUNT (EFFECT_END_NID - EFFECT_START_NID)
163 * X-bass.
170 #define DSP_CAPTURE_INIT_LATENCY 0
181 int direct; /* 0:output; 1:input*/
182 int params; /* number of default non-on/off params */
187 #define EFX_DIR_OUT 0
193 .mid = 0x96,
194 .reqs = {0, 1},
197 .def_vals = {0x3F800000, 0x3F2B851F}
201 .mid = 0x96,
205 .def_vals = {0x3F800000, 0x3F266666}
209 .mid = 0x96,
213 .def_vals = {0x00000000, 0x3F000000}
217 .mid = 0x96,
221 .def_vals = {0x3F800000, 0x3F3D70A4, 0x00000000}
223 { .name = "X-Bass",
225 .mid = 0x96,
229 .def_vals = {0x3F800000, 0x42A00000, 0x3F000000}
233 .mid = 0x96,
238 .def_vals = {0x00000000, 0x00000000, 0x00000000, 0x00000000,
239 0x00000000, 0x00000000, 0x00000000, 0x00000000,
240 0x00000000, 0x00000000, 0x00000000, 0x00000000}
244 .mid = 0x95,
245 .reqs = {0, 1, 2, 3},
248 .def_vals = {0x00000000, 0x3F3A9692, 0x00000000, 0x00000000}
252 .mid = 0x95,
256 .def_vals = {0x3F800000, 0x3D7DF3B6, 0x41F00000, 0x41F00000}
260 .mid = 0x95,
264 .def_vals = {0x00000000, 0x3F3D70A4}
268 .mid = 0x95,
272 .def_vals = {0x3F800000, 0x3F000000}
276 .mid = 0x95,
280 .def_vals = {0x00000000, 0x43C80000, 0x44AF0000, 0x44FA0000,
281 0x3F800000, 0x3F800000, 0x3F800000, 0x00000000,
282 0x00000000}
290 #define TUNING_CTL_START_NID 0xC0
304 #define TUNING_CTLS_COUNT (TUNING_CTL_END_NID - TUNING_CTL_START_NID)
313 int direct; /* 0:output; 1:input*/
321 .mid = 0x95,
324 .def_val = 0x41F00000
329 .mid = 0x95,
332 .def_val = 0x3F3D70A4
337 .mid = 0x96,
340 .def_val = 0x00000000
345 .mid = 0x96,
348 .def_val = 0x00000000
353 .mid = 0x96,
356 .def_val = 0x00000000
361 .mid = 0x96,
364 .def_val = 0x00000000
369 .mid = 0x96,
372 .def_val = 0x00000000
377 .mid = 0x96,
380 .def_val = 0x00000000
385 .mid = 0x96,
388 .def_val = 0x00000000
393 .mid = 0x96,
396 .def_val = 0x00000000
401 .mid = 0x96,
404 .def_val = 0x00000000
409 .mid = 0x96,
412 .def_val = 0x00000000
435 .mid = 0x95,
441 .vals = { 0x00000000, 0x43C80000, 0x44AF0000,
442 0x44FA0000, 0x3F800000, 0x3F800000,
443 0x3F800000, 0x00000000, 0x00000000 }
446 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
447 0x44FA0000, 0x3F19999A, 0x3F866666,
448 0x3F800000, 0x00000000, 0x00000000 }
451 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
452 0x450AC000, 0x4017AE14, 0x3F6B851F,
453 0x3F800000, 0x00000000, 0x00000000 }
456 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
457 0x44FA0000, 0x40400000, 0x3F28F5C3,
458 0x3F800000, 0x00000000, 0x00000000 }
461 .vals = { 0x3F800000, 0x44324000, 0x44BB8000,
462 0x44E10000, 0x3FB33333, 0x3FB9999A,
463 0x3F800000, 0x3E3A2E43, 0x00000000 }
466 .vals = { 0x3F800000, 0x43EA0000, 0x44A52000,
467 0x45098000, 0x3F266666, 0x3FC00000,
468 0x3F800000, 0x00000000, 0x00000000 }
471 .vals = { 0x3F800000, 0x43C70000, 0x44AE6000,
472 0x45193000, 0x3F8E147B, 0x3F75C28F,
473 0x3F800000, 0x00000000, 0x00000000 }
476 .vals = { 0x3F800000, 0x43930000, 0x44BEE000,
477 0x45007000, 0x3F451EB8, 0x3F7851EC,
478 0x3F800000, 0x00000000, 0x00000000 }
481 .vals = { 0x3F800000, 0x43BFC5AC, 0x44B28FDF,
482 0x451F6000, 0x3F266666, 0x3FA7D945,
483 0x3F800000, 0x3CF5C28F, 0x00000000 }
486 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
487 0x44FA0000, 0x3FB2718B, 0x3F800000,
488 0xBC07010E, 0x00000000, 0x00000000 }
491 .vals = { 0x3F800000, 0x43C20000, 0x44906000,
492 0x44E70000, 0x3F4CCCCD, 0x3F8A3D71,
493 0x3F0A3D71, 0x00000000, 0x00000000 }
496 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
497 0x44FA0000, 0x3F800000, 0x3F800000,
498 0x3E4CCCCD, 0x00000000, 0x00000000 }
501 .vals = { 0x3F800000, 0x43A9C5AC, 0x44AA4FDF,
502 0x44FFC000, 0x3EDBB56F, 0x3F99C4CA,
503 0x3F800000, 0x00000000, 0x00000000 }
506 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
507 0x44FA0000, 0x3F800000, 0x3F1A043C,
508 0x3F800000, 0x00000000, 0x00000000 }
531 .mid = 0x96,
538 .vals = { 0x00000000, 0x00000000, 0x00000000,
539 0x00000000, 0x00000000, 0x00000000,
540 0x00000000, 0x00000000, 0x00000000,
541 0x00000000, 0x00000000 }
544 .vals = { 0x00000000, 0x00000000, 0x3F8CCCCD,
545 0x40000000, 0x00000000, 0x00000000,
546 0x00000000, 0x00000000, 0x40000000,
547 0x40000000, 0x40000000 }
550 .vals = { 0x00000000, 0x00000000, 0x40C00000,
551 0x40C00000, 0x40466666, 0x00000000,
552 0x00000000, 0x00000000, 0x00000000,
553 0x40466666, 0x40466666 }
556 .vals = { 0x00000000, 0xBF99999A, 0x00000000,
557 0x3FA66666, 0x3FA66666, 0x3F8CCCCD,
558 0x00000000, 0x00000000, 0x40000000,
559 0x40466666, 0x40800000 }
562 .vals = { 0x00000000, 0xBF99999A, 0x40000000,
563 0x40466666, 0x40866666, 0xBF99999A,
564 0xBF99999A, 0x00000000, 0x00000000,
565 0x40800000, 0x40800000 }
568 .vals = { 0x00000000, 0x00000000, 0x00000000,
569 0x3F8CCCCD, 0x40800000, 0x40800000,
570 0x40800000, 0x00000000, 0x3F8CCCCD,
571 0x40466666, 0x40466666 }
574 .vals = { 0x00000000, 0x00000000, 0x40000000,
575 0x40000000, 0x00000000, 0x00000000,
576 0x00000000, 0x3F8CCCCD, 0x40000000,
577 0x40000000, 0x40000000 }
580 .vals = { 0x00000000, 0xBFCCCCCD, 0x00000000,
581 0x40000000, 0x40000000, 0x00000000,
582 0xBF99999A, 0xBF99999A, 0x00000000,
583 0x40466666, 0x40C00000 }
586 .vals = { 0x00000000, 0xBF99999A, 0xBF99999A,
587 0x3F8CCCCD, 0x40000000, 0xBF99999A,
588 0xBF99999A, 0x00000000, 0x00000000,
589 0x40800000, 0x40800000 }
592 .vals = { 0x00000000, 0xC0000000, 0xBF99999A,
593 0xBF99999A, 0x00000000, 0x40466666,
594 0x40800000, 0x40466666, 0x00000000,
595 0x00000000, 0x3F8CCCCD }
600 * DSP reqs for handling full-range speakers/bass redirection. If a speaker is
604 * enabled. X-Bass must be disabled when using these.
607 SPEAKER_BASS_REDIRECT = 0x15,
608 SPEAKER_BASS_REDIRECT_XOVER_FREQ = 0x16,
609 /* Between 0x16-0x1a are the X-Bass reqs. */
610 SPEAKER_FULL_RANGE_FRONT_L_R = 0x1a,
611 SPEAKER_FULL_RANGE_CENTER_LFE = 0x1b,
612 SPEAKER_FULL_RANGE_REAR_L_R = 0x1c,
613 SPEAKER_FULL_RANGE_SURROUND_L_R = 0x1d,
614 SPEAKER_BASS_REDIRECT_SUB_GAIN = 0x1e,
619 * module ID 0x96, the output effects module.
625 * connect software, the QUERY_SPEAKER_EQ_ADDRESS req on mid 0x80 is
635 SPEAKER_TUNING_USE_SPEAKER_EQ = 0x1f,
636 SPEAKER_TUNING_ENABLE_CENTER_EQ = 0x20,
637 SPEAKER_TUNING_FRONT_LEFT_VOL_LEVEL = 0x21,
638 SPEAKER_TUNING_FRONT_RIGHT_VOL_LEVEL = 0x22,
639 SPEAKER_TUNING_CENTER_VOL_LEVEL = 0x23,
640 SPEAKER_TUNING_LFE_VOL_LEVEL = 0x24,
641 SPEAKER_TUNING_REAR_LEFT_VOL_LEVEL = 0x25,
642 SPEAKER_TUNING_REAR_RIGHT_VOL_LEVEL = 0x26,
643 SPEAKER_TUNING_SURROUND_LEFT_VOL_LEVEL = 0x27,
644 SPEAKER_TUNING_SURROUND_RIGHT_VOL_LEVEL = 0x28,
649 SPEAKER_TUNING_FRONT_LEFT_INVERT = 0x29,
650 SPEAKER_TUNING_FRONT_RIGHT_INVERT = 0x2a,
651 SPEAKER_TUNING_CENTER_INVERT = 0x2b,
652 SPEAKER_TUNING_LFE_INVERT = 0x2c,
653 SPEAKER_TUNING_REAR_LEFT_INVERT = 0x2d,
654 SPEAKER_TUNING_REAR_RIGHT_INVERT = 0x2e,
655 SPEAKER_TUNING_SURROUND_LEFT_INVERT = 0x2f,
656 SPEAKER_TUNING_SURROUND_RIGHT_INVERT = 0x30,
658 SPEAKER_TUNING_FRONT_LEFT_DELAY = 0x31,
659 SPEAKER_TUNING_FRONT_RIGHT_DELAY = 0x32,
660 SPEAKER_TUNING_CENTER_DELAY = 0x33,
661 SPEAKER_TUNING_LFE_DELAY = 0x34,
662 SPEAKER_TUNING_REAR_LEFT_DELAY = 0x35,
663 SPEAKER_TUNING_REAR_RIGHT_DELAY = 0x36,
664 SPEAKER_TUNING_SURROUND_LEFT_DELAY = 0x37,
665 SPEAKER_TUNING_SURROUND_RIGHT_DELAY = 0x38,
667 SPEAKER_TUNING_MAIN_VOLUME = 0x39,
668 SPEAKER_TUNING_MUTE = 0x3a,
709 #define DSP_VOL_OUT 0
720 .mid = 0x32,
724 .mid = 0x37,
738 .group = { 0x30, 0x30, 0x48, 0x48, 0x48, 0x30 },
739 .target = { 0x2e, 0x30, 0x0d, 0x17, 0x19, 0x32 },
741 .vals = { { 0x00, 0x00, 0x40, 0x00, 0x00, 0x3f },
743 { 0x3f, 0x3f, 0x00, 0x00, 0x00, 0x00 } },
747 .group = { 0x30, 0x30, 0x48, 0x48, 0x48, 0x30 },
748 .target = { 0x2e, 0x30, 0x0d, 0x17, 0x19, 0x32 },
750 .vals = { { 0x00, 0x00, 0x40, 0x00, 0x00, 0x3f },
752 { 0x3f, 0x3f, 0x00, 0x00, 0x02, 0x00 } },
763 { .name = "Low (16-31",
764 .vals = { 0xff, 0x2c, 0xf5, 0x32 }
766 { .name = "Medium (32-149",
767 .vals = { 0x38, 0xa8, 0x3e, 0x4c }
769 { .name = "High (150-600",
770 .vals = { 0xff, 0xff, 0xff, 0x7f }
781 .val = 0xa0
784 .val = 0xc0
787 .val = 0x80
793 VENDOR_DSPIO_SCP_WRITE_DATA_LOW = 0x000,
794 VENDOR_DSPIO_SCP_WRITE_DATA_HIGH = 0x100,
796 VENDOR_DSPIO_STATUS = 0xF01,
797 VENDOR_DSPIO_SCP_POST_READ_DATA = 0x702,
798 VENDOR_DSPIO_SCP_READ_DATA = 0xF02,
799 VENDOR_DSPIO_DSP_INIT = 0x703,
800 VENDOR_DSPIO_SCP_POST_COUNT_QUERY = 0x704,
801 VENDOR_DSPIO_SCP_READ_COUNT = 0xF04,
804 VENDOR_CHIPIO_ADDRESS_LOW = 0x000,
805 VENDOR_CHIPIO_ADDRESS_HIGH = 0x100,
806 VENDOR_CHIPIO_STREAM_FORMAT = 0x200,
807 VENDOR_CHIPIO_DATA_LOW = 0x300,
808 VENDOR_CHIPIO_DATA_HIGH = 0x400,
810 VENDOR_CHIPIO_8051_WRITE_DIRECT = 0x500,
811 VENDOR_CHIPIO_8051_READ_DIRECT = 0xD00,
813 VENDOR_CHIPIO_GET_PARAMETER = 0xF00,
814 VENDOR_CHIPIO_STATUS = 0xF01,
815 VENDOR_CHIPIO_HIC_POST_READ = 0x702,
816 VENDOR_CHIPIO_HIC_READ_DATA = 0xF03,
818 VENDOR_CHIPIO_8051_DATA_WRITE = 0x707,
819 VENDOR_CHIPIO_8051_DATA_READ = 0xF07,
820 VENDOR_CHIPIO_8051_PMEM_READ = 0xF08,
821 VENDOR_CHIPIO_8051_IRAM_WRITE = 0x709,
822 VENDOR_CHIPIO_8051_IRAM_READ = 0xF09,
824 VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE = 0x70A,
825 VENDOR_CHIPIO_CT_EXTENSIONS_GET = 0xF0A,
827 VENDOR_CHIPIO_PLL_PMU_WRITE = 0x70C,
828 VENDOR_CHIPIO_PLL_PMU_READ = 0xF0C,
829 VENDOR_CHIPIO_8051_ADDRESS_LOW = 0x70D,
830 VENDOR_CHIPIO_8051_ADDRESS_HIGH = 0x70E,
831 VENDOR_CHIPIO_FLAG_SET = 0x70F,
832 VENDOR_CHIPIO_FLAGS_GET = 0xF0F,
833 VENDOR_CHIPIO_PARAM_SET = 0x710,
834 VENDOR_CHIPIO_PARAM_GET = 0xF10,
836 VENDOR_CHIPIO_PORT_ALLOC_CONFIG_SET = 0x711,
837 VENDOR_CHIPIO_PORT_ALLOC_SET = 0x712,
838 VENDOR_CHIPIO_PORT_ALLOC_GET = 0xF12,
839 VENDOR_CHIPIO_PORT_FREE_SET = 0x713,
841 VENDOR_CHIPIO_PARAM_EX_ID_GET = 0xF17,
842 VENDOR_CHIPIO_PARAM_EX_ID_SET = 0x717,
843 VENDOR_CHIPIO_PARAM_EX_VALUE_GET = 0xF18,
844 VENDOR_CHIPIO_PARAM_EX_VALUE_SET = 0x718,
846 VENDOR_CHIPIO_DMIC_CTL_SET = 0x788,
847 VENDOR_CHIPIO_DMIC_CTL_GET = 0xF88,
848 VENDOR_CHIPIO_DMIC_PIN_SET = 0x789,
849 VENDOR_CHIPIO_DMIC_PIN_GET = 0xF89,
850 VENDOR_CHIPIO_DMIC_MCLK_SET = 0x78A,
851 VENDOR_CHIPIO_DMIC_MCLK_GET = 0xF8A,
853 VENDOR_CHIPIO_EAPD_SEL_SET = 0x78D
861 CONTROL_FLAG_C_MGR = 0,
866 /* Tracker for the SPDIF-in path is bypassed/enabled */
884 /* Decode Loop (DSP->SRC->DSP) is disabled/enabled */
886 /* De-emphasis filter on DAC-1 disabled/enabled */
888 /* De-emphasis filter on DAC-2 disabled/enabled */
890 /* De-emphasis filter on DAC-3 disabled/enabled */
892 /* High-pass filter on ADC_B disabled/enabled */
894 /* High-pass filter on ADC_C disabled/enabled */
918 /* 0: None, 1: Mic1In*/
920 /* 0: force HDA, 1: allow DSP if HDA Spdif1Out stream is idle */
931 * sense given the fact the AE-5 uses it and has the ASI flag set.
966 VENDOR_STATUS_DSPIO_OK = 0x00,
968 VENDOR_STATUS_DSPIO_BUSY = 0x01,
970 VENDOR_STATUS_DSPIO_SCP_COMMAND_QUEUE_FULL = 0x02,
972 VENDOR_STATUS_DSPIO_SCP_RESPONSE_QUEUE_EMPTY = 0x03
980 VENDOR_STATUS_CHIPIO_OK = 0x00,
982 VENDOR_STATUS_CHIPIO_BUSY = 0x01
989 SR_6_000 = 0x00,
990 SR_8_000 = 0x01,
991 SR_9_600 = 0x02,
992 SR_11_025 = 0x03,
993 SR_16_000 = 0x04,
994 SR_22_050 = 0x05,
995 SR_24_000 = 0x06,
996 SR_32_000 = 0x07,
997 SR_44_100 = 0x08,
998 SR_48_000 = 0x09,
999 SR_88_200 = 0x0A,
1000 SR_96_000 = 0x0B,
1001 SR_144_000 = 0x0C,
1002 SR_176_400 = 0x0D,
1003 SR_192_000 = 0x0E,
1004 SR_384_000 = 0x0F,
1006 SR_COUNT = 0x10,
1008 SR_RATE_UNKNOWN = 0x1F
1012 DSP_DOWNLOAD_FAILED = -1,
1013 DSP_DOWNLOAD_INIT = 0,
1019 #define get_hdafmt_chs(fmt) (fmt & 0xf)
1020 #define get_hdafmt_bits(fmt) ((fmt >> 4) & 0x7)
1021 #define get_hdafmt_rate(fmt) ((fmt >> 8) & 0x7f)
1022 #define get_hdafmt_type(fmt) ((fmt >> 15) & 0x1)
1095 /* AE-5 Control values */
1101 struct hda_codec *codec; member
1110 * AE-5 all use PCI region 2 to toggle GPIO and other currently unknown
1148 #define ca0132_quirk(spec) ((spec)->quirk)
1149 #define ca0132_use_pci_mmio(spec) ((spec)->use_pci_mmio)
1150 #define ca0132_use_alt_functions(spec) ((spec)->use_alt_functions)
1151 #define ca0132_use_alt_controls(spec) ((spec)->use_alt_controls)
1160 { 0x0b, 0x90170110 }, /* Builtin Speaker */
1161 { 0x0c, 0x411111f0 }, /* N/A */
1162 { 0x0d, 0x411111f0 }, /* N/A */
1163 { 0x0e, 0x411111f0 }, /* N/A */
1164 { 0x0f, 0x0321101f }, /* HP */
1165 { 0x10, 0x411111f0 }, /* Headset? disabled for now */
1166 { 0x11, 0x03a11021 }, /* Mic */
1167 { 0x12, 0xd5a30140 }, /* Builtin Mic */
1168 { 0x13, 0x411111f0 }, /* N/A */
1169 { 0x18, 0x411111f0 }, /* N/A */
1175 { 0x0b, 0x01017010 }, /* Port G -- Lineout FRONT L/R */
1176 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1177 { 0x0d, 0x014510f0 }, /* Digital Out */
1178 { 0x0e, 0x01c510f0 }, /* SPDIF In */
1179 { 0x0f, 0x0221701f }, /* Port A -- BackPanel HP */
1180 { 0x10, 0x01017012 }, /* Port D -- Center/LFE or FP Hp */
1181 { 0x11, 0x01017014 }, /* Port B -- LineMicIn2 / Rear L/R */
1182 { 0x12, 0x01a170f0 }, /* Port C -- LineIn1 */
1183 { 0x13, 0x908700f0 }, /* What U Hear In*/
1184 { 0x18, 0x50d000f0 }, /* N/A */
1190 { 0x0b, 0x01047110 }, /* Port G -- Lineout FRONT L/R */
1191 { 0x0c, 0x414510f0 }, /* SPDIF Out 1 - Disabled*/
1192 { 0x0d, 0x014510f0 }, /* Digital Out */
1193 { 0x0e, 0x41c520f0 }, /* SPDIF In - Disabled*/
1194 { 0x0f, 0x0122711f }, /* Port A -- BackPanel HP */
1195 { 0x10, 0x01017111 }, /* Port D -- Center/LFE */
1196 { 0x11, 0x01017114 }, /* Port B -- LineMicIn2 / Rear L/R */
1197 { 0x12, 0x01a271f0 }, /* Port C -- LineIn1 */
1198 { 0x13, 0x908700f0 }, /* What U Hear In*/
1199 { 0x18, 0x50d000f0 }, /* N/A */
1205 { 0x0b, 0x01014110 }, /* Port G -- Lineout FRONT L/R */
1206 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1207 { 0x0d, 0x014510f0 }, /* Digital Out */
1208 { 0x0e, 0x01c520f0 }, /* SPDIF In */
1209 { 0x0f, 0x0221401f }, /* Port A -- BackPanel HP */
1210 { 0x10, 0x01016011 }, /* Port D -- Center/LFE or FP Hp */
1211 { 0x11, 0x01011014 }, /* Port B -- LineMicIn2 / Rear L/R */
1212 { 0x12, 0x02a090f0 }, /* Port C -- LineIn1 */
1213 { 0x13, 0x908700f0 }, /* What U Hear In*/
1214 { 0x18, 0x50d000f0 }, /* N/A */
1218 /* Sound Blaster AE-5 pin configs taken from Windows Driver */
1220 { 0x0b, 0x01017010 }, /* Port G -- Lineout FRONT L/R */
1221 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1222 { 0x0d, 0x014510f0 }, /* Digital Out */
1223 { 0x0e, 0x01c510f0 }, /* SPDIF In */
1224 { 0x0f, 0x01017114 }, /* Port A -- Rear L/R. */
1225 { 0x10, 0x01017012 }, /* Port D -- Center/LFE or FP Hp */
1226 { 0x11, 0x012170ff }, /* Port B -- LineMicIn2 / Rear Headphone */
1227 { 0x12, 0x01a170f0 }, /* Port C -- LineIn1 */
1228 { 0x13, 0x908700f0 }, /* What U Hear In*/
1229 { 0x18, 0x50d000f0 }, /* N/A */
1235 { 0x0b, 0x01014110 }, /* Port G -- Lineout FRONT L/R */
1236 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1237 { 0x0d, 0x014510f0 }, /* Digital Out */
1238 { 0x0e, 0x41c520f0 }, /* SPDIF In */
1239 { 0x0f, 0x0221401f }, /* Port A -- BackPanel HP */
1240 { 0x10, 0x01016011 }, /* Port D -- Center/LFE or FP Hp */
1241 { 0x11, 0x01011014 }, /* Port B -- LineMicIn2 / Rear L/R */
1242 { 0x12, 0x02a090f0 }, /* Port C -- LineIn1 */
1243 { 0x13, 0x908700f0 }, /* What U Hear In*/
1244 { 0x18, 0x500000f0 }, /* N/A */
1249 { 0x0b, 0x01017010 },
1250 { 0x0c, 0x014510f0 },
1251 { 0x0d, 0x414510f0 },
1252 { 0x0e, 0x01c520f0 },
1253 { 0x0f, 0x01017114 },
1254 { 0x10, 0x01017011 },
1255 { 0x11, 0x018170ff },
1256 { 0x12, 0x01a170f0 },
1257 { 0x13, 0x908700f0 },
1258 { 0x18, 0x500000f0 },
1263 SND_PCI_QUIRK(0x1028, 0x057b, "Alienware M17x R4", QUIRK_ALIENWARE_M17XR4),
1264 SND_PCI_QUIRK(0x1028, 0x0685, "Alienware 15 2015", QUIRK_ALIENWARE),
1265 SND_PCI_QUIRK(0x1028, 0x0688, "Alienware 17 2015", QUIRK_ALIENWARE),
1266 SND_PCI_QUIRK(0x1028, 0x0708, "Alienware 15 R2 2016", QUIRK_ALIENWARE),
1267 SND_PCI_QUIRK(0x1102, 0x0010, "Sound Blaster Z", QUIRK_SBZ),
1268 SND_PCI_QUIRK(0x1102, 0x0023, "Sound Blaster Z", QUIRK_SBZ),
1269 SND_PCI_QUIRK(0x1102, 0x0027, "Sound Blaster Z", QUIRK_SBZ),
1270 SND_PCI_QUIRK(0x1102, 0x0033, "Sound Blaster ZxR", QUIRK_SBZ),
1271 SND_PCI_QUIRK(0x1458, 0xA016, "Recon3Di", QUIRK_R3DI),
1272 SND_PCI_QUIRK(0x1458, 0xA026, "Gigabyte G1.Sniper Z97", QUIRK_R3DI),
1273 SND_PCI_QUIRK(0x1458, 0xA036, "Gigabyte GA-Z170X-Gaming 7", QUIRK_R3DI),
1274 SND_PCI_QUIRK(0x3842, 0x1038, "EVGA X99 Classified", QUIRK_R3DI),
1275 SND_PCI_QUIRK(0x3842, 0x104b, "EVGA X299 Dark", QUIRK_R3DI),
1276 SND_PCI_QUIRK(0x3842, 0x1055, "EVGA Z390 DARK", QUIRK_R3DI),
1277 SND_PCI_QUIRK(0x1102, 0x0013, "Recon3D", QUIRK_R3D),
1278 SND_PCI_QUIRK(0x1102, 0x0018, "Recon3D", QUIRK_R3D),
1279 SND_PCI_QUIRK(0x1102, 0x0051, "Sound Blaster AE-5", QUIRK_AE5),
1280 SND_PCI_QUIRK(0x1102, 0x0191, "Sound Blaster AE-5 Plus", QUIRK_AE5),
1281 SND_PCI_QUIRK(0x1102, 0x0081, "Sound Blaster AE-7", QUIRK_AE7),
1289 unsigned int dac2port; /* ParamID 0x0d value. */
1324 { .dac2port = 0x24,
1328 .mmio_gpio_count = 0,
1329 .scp_cmds_count = 0,
1333 { .dac2port = 0x21,
1336 .hda_gpio_set = 0,
1337 .mmio_gpio_count = 0,
1338 .scp_cmds_count = 0,
1347 { .dac2port = 0x24,
1352 .scp_cmds_count = 0,
1356 { .dac2port = 0x21,
1360 .mmio_gpio_set = { 0 },
1361 .scp_cmds_count = 0,
1370 { .dac2port = 0x18,
1374 .mmio_gpio_set = { 0, 1, 1 },
1375 .scp_cmds_count = 0,
1378 { .dac2port = 0x12,
1382 .mmio_gpio_set = { 1, 1, 0 },
1383 .scp_cmds_count = 0,
1392 { .dac2port = 0x24,
1396 .mmio_gpio_set = { 1, 1, 0 },
1397 .scp_cmds_count = 0,
1401 { .dac2port = 0x21,
1405 .mmio_gpio_set = { 0, 1, 1 },
1406 .scp_cmds_count = 0,
1415 { .dac2port = 0xa4,
1417 .mmio_gpio_count = 0,
1419 .scp_cmd_mid = { 0x96, 0x96 },
1424 .chipio_write_addr = 0x0018b03c,
1425 .chipio_write_data = 0x00000012
1428 { .dac2port = 0xa1,
1430 .mmio_gpio_count = 0,
1432 .scp_cmd_mid = { 0x96, 0x96 },
1437 .chipio_write_addr = 0x0018b03c,
1438 .chipio_write_data = 0x00000012
1446 { .dac2port = 0x58,
1449 .mmio_gpio_pin = { 0 },
1452 .scp_cmd_mid = { 0x96, 0x96 },
1457 .chipio_write_addr = 0x0018b03c,
1458 .chipio_write_data = 0x00000000
1461 { .dac2port = 0x58,
1464 .mmio_gpio_pin = { 0 },
1467 .scp_cmd_mid = { 0x96, 0x96 },
1472 .chipio_write_addr = 0x0018b03c,
1473 .chipio_write_data = 0x00000010
1479 * CA0132 codec access
1481 static unsigned int codec_send_command(struct hda_codec *codec, hda_nid_t nid, in codec_send_command() argument
1485 response = snd_hda_codec_read(codec, nid, 0, verb, parm); in codec_send_command()
1488 return ((response == -1) ? -1 : 0); in codec_send_command()
1491 static int codec_set_converter_format(struct hda_codec *codec, hda_nid_t nid, in codec_set_converter_format() argument
1494 return codec_send_command(codec, nid, VENDOR_CHIPIO_STREAM_FORMAT, in codec_set_converter_format()
1495 converter_format & 0xffff, res); in codec_set_converter_format()
1498 static int codec_set_converter_stream_channel(struct hda_codec *codec, in codec_set_converter_stream_channel() argument
1502 unsigned char converter_stream_channel = 0; in codec_set_converter_stream_channel()
1504 converter_stream_channel = (stream << 4) | (channel & 0x0f); in codec_set_converter_stream_channel()
1505 return codec_send_command(codec, nid, AC_VERB_SET_CHANNEL_STREAMID, in codec_set_converter_stream_channel()
1510 static int chipio_send(struct hda_codec *codec, in chipio_send() argument
1519 res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in chipio_send()
1522 return 0; in chipio_send()
1526 return -EIO; in chipio_send()
1530 * Write chip address through the vendor widget -- NOT protected by the Mutex!
1532 static int chipio_write_address(struct hda_codec *codec, in chipio_write_address() argument
1535 struct ca0132_spec *spec = codec->spec; in chipio_write_address()
1538 if (spec->curr_chip_addx == chip_addx) in chipio_write_address()
1539 return 0; in chipio_write_address()
1542 res = chipio_send(codec, VENDOR_CHIPIO_ADDRESS_LOW, in chipio_write_address()
1543 chip_addx & 0xffff); in chipio_write_address()
1545 if (res != -EIO) { in chipio_write_address()
1547 res = chipio_send(codec, VENDOR_CHIPIO_ADDRESS_HIGH, in chipio_write_address()
1551 spec->curr_chip_addx = (res < 0) ? ~0U : chip_addx; in chipio_write_address()
1557 * Write data through the vendor widget -- NOT protected by the Mutex!
1559 static int chipio_write_data(struct hda_codec *codec, unsigned int data) in chipio_write_data() argument
1561 struct ca0132_spec *spec = codec->spec; in chipio_write_data()
1565 res = chipio_send(codec, VENDOR_CHIPIO_DATA_LOW, data & 0xffff); in chipio_write_data()
1567 if (res != -EIO) { in chipio_write_data()
1569 res = chipio_send(codec, VENDOR_CHIPIO_DATA_HIGH, in chipio_write_data()
1575 spec->curr_chip_addx = (res != -EIO) ? in chipio_write_data()
1576 (spec->curr_chip_addx + 4) : ~0U; in chipio_write_data()
1581 * Write multiple data through the vendor widget -- NOT protected by the Mutex!
1583 static int chipio_write_data_multiple(struct hda_codec *codec, in chipio_write_data_multiple() argument
1587 int status = 0; in chipio_write_data_multiple()
1590 codec_dbg(codec, "chipio_write_data null ptr\n"); in chipio_write_data_multiple()
1591 return -EINVAL; in chipio_write_data_multiple()
1594 while ((count-- != 0) && (status == 0)) in chipio_write_data_multiple()
1595 status = chipio_write_data(codec, *data++); in chipio_write_data_multiple()
1602 * Read data through the vendor widget -- NOT protected by the Mutex!
1604 static int chipio_read_data(struct hda_codec *codec, unsigned int *data) in chipio_read_data() argument
1606 struct ca0132_spec *spec = codec->spec; in chipio_read_data()
1610 res = chipio_send(codec, VENDOR_CHIPIO_HIC_POST_READ, 0); in chipio_read_data()
1612 if (res != -EIO) { in chipio_read_data()
1614 res = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in chipio_read_data()
1617 if (res != -EIO) { in chipio_read_data()
1619 *data = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in chipio_read_data()
1621 0); in chipio_read_data()
1626 spec->curr_chip_addx = (res != -EIO) ? in chipio_read_data()
1627 (spec->curr_chip_addx + 4) : ~0U; in chipio_read_data()
1635 static int chipio_write(struct hda_codec *codec, in chipio_write() argument
1638 struct ca0132_spec *spec = codec->spec; in chipio_write()
1641 mutex_lock(&spec->chipio_mutex); in chipio_write()
1644 err = chipio_write_address(codec, chip_addx); in chipio_write()
1645 if (err < 0) in chipio_write()
1648 err = chipio_write_data(codec, data); in chipio_write()
1649 if (err < 0) in chipio_write()
1653 mutex_unlock(&spec->chipio_mutex); in chipio_write()
1661 static int chipio_write_no_mutex(struct hda_codec *codec, in chipio_write_no_mutex() argument
1668 err = chipio_write_address(codec, chip_addx); in chipio_write_no_mutex()
1669 if (err < 0) in chipio_write_no_mutex()
1672 err = chipio_write_data(codec, data); in chipio_write_no_mutex()
1673 if (err < 0) in chipio_write_no_mutex()
1684 static int chipio_write_multiple(struct hda_codec *codec, in chipio_write_multiple() argument
1689 struct ca0132_spec *spec = codec->spec; in chipio_write_multiple()
1692 mutex_lock(&spec->chipio_mutex); in chipio_write_multiple()
1693 status = chipio_write_address(codec, chip_addx); in chipio_write_multiple()
1694 if (status < 0) in chipio_write_multiple()
1697 status = chipio_write_data_multiple(codec, data, count); in chipio_write_multiple()
1699 mutex_unlock(&spec->chipio_mutex); in chipio_write_multiple()
1708 static int chipio_read(struct hda_codec *codec, in chipio_read() argument
1711 struct ca0132_spec *spec = codec->spec; in chipio_read()
1714 mutex_lock(&spec->chipio_mutex); in chipio_read()
1717 err = chipio_write_address(codec, chip_addx); in chipio_read()
1718 if (err < 0) in chipio_read()
1721 err = chipio_read_data(codec, data); in chipio_read()
1722 if (err < 0) in chipio_read()
1726 mutex_unlock(&spec->chipio_mutex); in chipio_read()
1733 static void chipio_set_control_flag(struct hda_codec *codec, in chipio_set_control_flag() argument
1740 flag_bit = (flag_state ? 1 : 0); in chipio_set_control_flag()
1742 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_flag()
1749 static void chipio_set_control_param(struct hda_codec *codec, in chipio_set_control_param() argument
1752 struct ca0132_spec *spec = codec->spec; in chipio_set_control_param()
1757 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param()
1760 mutex_lock(&spec->chipio_mutex); in chipio_set_control_param()
1761 if (chipio_send(codec, VENDOR_CHIPIO_STATUS, 0) == 0) { in chipio_set_control_param()
1762 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param()
1765 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param()
1769 mutex_unlock(&spec->chipio_mutex); in chipio_set_control_param()
1776 static void chipio_set_control_param_no_mutex(struct hda_codec *codec, in chipio_set_control_param_no_mutex() argument
1783 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param_no_mutex()
1786 if (chipio_send(codec, VENDOR_CHIPIO_STATUS, 0) == 0) { in chipio_set_control_param_no_mutex()
1787 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param_no_mutex()
1790 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param_no_mutex()
1800 static void chipio_set_stream_source_dest(struct hda_codec *codec, in chipio_set_stream_source_dest() argument
1803 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_source_dest()
1805 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_source_dest()
1807 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_source_dest()
1814 static void chipio_set_stream_channels(struct hda_codec *codec, in chipio_set_stream_channels() argument
1817 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_channels()
1819 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_channels()
1826 static void chipio_set_stream_control(struct hda_codec *codec, in chipio_set_stream_control() argument
1829 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_control()
1831 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_control()
1839 static void chipio_set_conn_rate_no_mutex(struct hda_codec *codec, in chipio_set_conn_rate_no_mutex() argument
1842 chipio_set_control_param_no_mutex(codec, in chipio_set_conn_rate_no_mutex()
1844 chipio_set_control_param_no_mutex(codec, in chipio_set_conn_rate_no_mutex()
1851 static void chipio_set_conn_rate(struct hda_codec *codec, in chipio_set_conn_rate() argument
1854 chipio_set_control_param(codec, CONTROL_PARAM_CONN_POINT_ID, connid); in chipio_set_conn_rate()
1855 chipio_set_control_param(codec, CONTROL_PARAM_CONN_POINT_SAMPLE_RATE, in chipio_set_conn_rate()
1862 * 0x80-0xFF.
1864 static void chipio_8051_write_direct(struct hda_codec *codec, in chipio_8051_write_direct() argument
1870 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, verb, addr); in chipio_8051_write_direct()
1876 static void chipio_enable_clocks(struct hda_codec *codec) in chipio_enable_clocks() argument
1878 struct ca0132_spec *spec = codec->spec; in chipio_enable_clocks()
1880 mutex_lock(&spec->chipio_mutex); in chipio_enable_clocks()
1881 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_enable_clocks()
1882 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0); in chipio_enable_clocks()
1883 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_enable_clocks()
1884 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xff); in chipio_enable_clocks()
1885 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_enable_clocks()
1887 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_enable_clocks()
1888 VENDOR_CHIPIO_PLL_PMU_WRITE, 0x0b); in chipio_enable_clocks()
1889 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_enable_clocks()
1891 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_enable_clocks()
1892 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xff); in chipio_enable_clocks()
1893 mutex_unlock(&spec->chipio_mutex); in chipio_enable_clocks()
1899 static int dspio_send(struct hda_codec *codec, unsigned int reg, in dspio_send() argument
1907 res = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, reg, data); in dspio_send()
1908 if ((res >= 0) && (res != VENDOR_STATUS_DSPIO_BUSY)) in dspio_send()
1913 return -EIO; in dspio_send()
1919 static void dspio_write_wait(struct hda_codec *codec) in dspio_write_wait() argument
1925 status = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, in dspio_write_wait()
1926 VENDOR_DSPIO_STATUS, 0); in dspio_write_wait()
1937 static int dspio_write(struct hda_codec *codec, unsigned int scp_data) in dspio_write() argument
1939 struct ca0132_spec *spec = codec->spec; in dspio_write()
1942 dspio_write_wait(codec); in dspio_write()
1944 mutex_lock(&spec->chipio_mutex); in dspio_write()
1945 status = dspio_send(codec, VENDOR_DSPIO_SCP_WRITE_DATA_LOW, in dspio_write()
1946 scp_data & 0xffff); in dspio_write()
1947 if (status < 0) in dspio_write()
1950 status = dspio_send(codec, VENDOR_DSPIO_SCP_WRITE_DATA_HIGH, in dspio_write()
1952 if (status < 0) in dspio_write()
1956 status = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, in dspio_write()
1957 VENDOR_DSPIO_STATUS, 0); in dspio_write()
1959 mutex_unlock(&spec->chipio_mutex); in dspio_write()
1962 -EIO : 0; in dspio_write()
1968 static int dspio_write_multiple(struct hda_codec *codec, in dspio_write_multiple() argument
1971 int status = 0; in dspio_write_multiple()
1975 return -EINVAL; in dspio_write_multiple()
1977 count = 0; in dspio_write_multiple()
1979 status = dspio_write(codec, *buffer++); in dspio_write_multiple()
1980 if (status != 0) in dspio_write_multiple()
1988 static int dspio_read(struct hda_codec *codec, unsigned int *data) in dspio_read() argument
1992 status = dspio_send(codec, VENDOR_DSPIO_SCP_POST_READ_DATA, 0); in dspio_read()
1993 if (status == -EIO) in dspio_read()
1996 status = dspio_send(codec, VENDOR_DSPIO_STATUS, 0); in dspio_read()
1997 if (status == -EIO || in dspio_read()
1999 return -EIO; in dspio_read()
2001 *data = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, in dspio_read()
2002 VENDOR_DSPIO_SCP_READ_DATA, 0); in dspio_read()
2004 return 0; in dspio_read()
2007 static int dspio_read_multiple(struct hda_codec *codec, unsigned int *buffer, in dspio_read_multiple() argument
2010 int status = 0; in dspio_read_multiple()
2017 return -1; in dspio_read_multiple()
2019 count = 0; in dspio_read_multiple()
2021 status = dspio_read(codec, buffer++); in dspio_read_multiple()
2022 if (status != 0) in dspio_read_multiple()
2028 if (status == 0) { in dspio_read_multiple()
2030 status = dspio_read(codec, &dummy); in dspio_read_multiple()
2031 if (status != 0) in dspio_read_multiple()
2050 unsigned int header = 0; in make_scp_header()
2052 header = (data_size & 0x1f) << 27; in make_scp_header()
2053 header |= (error_flag & 0x01) << 26; in make_scp_header()
2054 header |= (resp_flag & 0x01) << 25; in make_scp_header()
2055 header |= (device_flag & 0x01) << 24; in make_scp_header()
2056 header |= (req & 0x7f) << 17; in make_scp_header()
2057 header |= (get_flag & 0x01) << 16; in make_scp_header()
2058 header |= (source_id & 0xff) << 8; in make_scp_header()
2059 header |= target_id & 0xff; in make_scp_header()
2075 *data_size = (header >> 27) & 0x1f; in extract_scp_header()
2077 *error_flag = (header >> 26) & 0x01; in extract_scp_header()
2079 *resp_flag = (header >> 25) & 0x01; in extract_scp_header()
2081 *device_flag = (header >> 24) & 0x01; in extract_scp_header()
2083 *req = (header >> 17) & 0x7f; in extract_scp_header()
2085 *get_flag = (header >> 16) & 0x01; in extract_scp_header()
2087 *source_id = (header >> 8) & 0xff; in extract_scp_header()
2089 *target_id = header & 0xff; in extract_scp_header()
2100 static void dspio_clear_response_queue(struct hda_codec *codec) in dspio_clear_response_queue() argument
2103 unsigned int dummy = 0; in dspio_clear_response_queue()
2108 status = dspio_read(codec, &dummy); in dspio_clear_response_queue()
2109 } while (status == 0 && time_before(jiffies, timeout)); in dspio_clear_response_queue()
2112 static int dspio_get_response_data(struct hda_codec *codec) in dspio_get_response_data() argument
2114 struct ca0132_spec *spec = codec->spec; in dspio_get_response_data()
2115 unsigned int data = 0; in dspio_get_response_data()
2118 if (dspio_read(codec, &data) < 0) in dspio_get_response_data()
2119 return -EIO; in dspio_get_response_data()
2121 if ((data & 0x00ffffff) == spec->wait_scp_header) { in dspio_get_response_data()
2122 spec->scp_resp_header = data; in dspio_get_response_data()
2123 spec->scp_resp_count = data >> 27; in dspio_get_response_data()
2124 count = spec->wait_num_data; in dspio_get_response_data()
2125 dspio_read_multiple(codec, spec->scp_resp_data, in dspio_get_response_data()
2126 &spec->scp_resp_count, count); in dspio_get_response_data()
2127 return 0; in dspio_get_response_data()
2130 return -EIO; in dspio_get_response_data()
2136 static int dspio_send_scp_message(struct hda_codec *codec, in dspio_send_scp_message() argument
2143 struct ca0132_spec *spec = codec->spec; in dspio_send_scp_message()
2144 int status = -1; in dspio_send_scp_message()
2145 unsigned int scp_send_size = 0; in dspio_send_scp_message()
2154 *bytes_returned = 0; in dspio_send_scp_message()
2164 return -EINVAL; in dspio_send_scp_message()
2168 return -EINVAL; in dspio_send_scp_message()
2170 spec->wait_scp_header = *((unsigned int *)send_buf); in dspio_send_scp_message()
2175 spec->wait_scp_header &= 0xffff0000; in dspio_send_scp_message()
2176 spec->wait_scp_header |= (resp_src_id << 8) | (resp_target_id); in dspio_send_scp_message()
2177 spec->wait_num_data = return_buf_size/sizeof(unsigned int) - 1; in dspio_send_scp_message()
2178 spec->wait_scp = 1; in dspio_send_scp_message()
2182 status = dspio_write_multiple(codec, (unsigned int *)send_buf, in dspio_send_scp_message()
2184 if (status < 0) { in dspio_send_scp_message()
2185 spec->wait_scp = 0; in dspio_send_scp_message()
2191 memset(return_buf, 0, return_buf_size); in dspio_send_scp_message()
2194 } while (spec->wait_scp && time_before(jiffies, timeout)); in dspio_send_scp_message()
2196 if (!spec->wait_scp) { in dspio_send_scp_message()
2198 memcpy(&ret_msg->hdr, &spec->scp_resp_header, 4); in dspio_send_scp_message()
2199 memcpy(&ret_msg->data, spec->scp_resp_data, in dspio_send_scp_message()
2200 spec->wait_num_data); in dspio_send_scp_message()
2201 *bytes_returned = (spec->scp_resp_count + 1) * 4; in dspio_send_scp_message()
2202 status = 0; in dspio_send_scp_message()
2204 status = -EIO; in dspio_send_scp_message()
2206 spec->wait_scp = 0; in dspio_send_scp_message()
2214 * @codec: the HDA codec
2226 static int dspio_scp(struct hda_codec *codec, in dspio_scp() argument
2230 int status = 0; in dspio_scp()
2236 memset(&scp_send, 0, sizeof(scp_send)); in dspio_scp()
2237 memset(&scp_reply, 0, sizeof(scp_reply)); in dspio_scp()
2239 if ((len != 0 && data == NULL) || (len > SCP_MAX_DATA_WORDS)) in dspio_scp()
2240 return -EINVAL; in dspio_scp()
2243 codec_dbg(codec, "dspio_scp get but has no buffer\n"); in dspio_scp()
2244 return -EINVAL; in dspio_scp()
2247 if (reply != NULL && (reply_len == NULL || (*reply_len == 0))) { in dspio_scp()
2248 codec_dbg(codec, "dspio_scp bad resp buf len parms\n"); in dspio_scp()
2249 return -EINVAL; in dspio_scp()
2253 0, 0, 0, len/sizeof(unsigned int)); in dspio_scp()
2254 if (data != NULL && len > 0) { in dspio_scp()
2259 ret_bytes = 0; in dspio_scp()
2261 status = dspio_send_scp_message(codec, (unsigned char *)&scp_send, in dspio_scp()
2265 if (status < 0) { in dspio_scp()
2266 codec_dbg(codec, "dspio_scp: send scp msg failed\n"); in dspio_scp()
2278 return 0; in dspio_scp()
2281 ret_size = (ret_bytes - sizeof(scp_reply.hdr)) in dspio_scp()
2285 codec_dbg(codec, "reply too long for buf\n"); in dspio_scp()
2286 return -EINVAL; in dspio_scp()
2288 codec_dbg(codec, "RetLen and HdrLen .NE.\n"); in dspio_scp()
2289 return -EINVAL; in dspio_scp()
2291 codec_dbg(codec, "NULL reply\n"); in dspio_scp()
2292 return -EINVAL; in dspio_scp()
2298 codec_dbg(codec, "reply ill-formed or errflag set\n"); in dspio_scp()
2299 return -EIO; in dspio_scp()
2308 static int dspio_set_param(struct hda_codec *codec, int mod_id, in dspio_set_param() argument
2311 return dspio_scp(codec, mod_id, src_id, req, SCP_SET, data, len, NULL, in dspio_set_param()
2315 static int dspio_set_uint_param(struct hda_codec *codec, int mod_id, in dspio_set_uint_param() argument
2318 return dspio_set_param(codec, mod_id, 0x20, req, &data, in dspio_set_uint_param()
2322 static int dspio_set_uint_param_no_source(struct hda_codec *codec, int mod_id, in dspio_set_uint_param_no_source() argument
2325 return dspio_set_param(codec, mod_id, 0x00, req, &data, in dspio_set_uint_param_no_source()
2332 static int dspio_alloc_dma_chan(struct hda_codec *codec, unsigned int *dma_chan) in dspio_alloc_dma_chan() argument
2334 int status = 0; in dspio_alloc_dma_chan()
2337 codec_dbg(codec, " dspio_alloc_dma_chan() -- begin\n"); in dspio_alloc_dma_chan()
2338 status = dspio_scp(codec, MASTERCONTROL, 0x20, in dspio_alloc_dma_chan()
2339 MASTERCONTROL_ALLOC_DMA_CHAN, SCP_GET, NULL, 0, in dspio_alloc_dma_chan()
2342 if (status < 0) { in dspio_alloc_dma_chan()
2343 codec_dbg(codec, "dspio_alloc_dma_chan: SCP Failed\n"); in dspio_alloc_dma_chan()
2347 if ((*dma_chan + 1) == 0) { in dspio_alloc_dma_chan()
2348 codec_dbg(codec, "no free dma channels to allocate\n"); in dspio_alloc_dma_chan()
2349 return -EBUSY; in dspio_alloc_dma_chan()
2352 codec_dbg(codec, "dspio_alloc_dma_chan: chan=%d\n", *dma_chan); in dspio_alloc_dma_chan()
2353 codec_dbg(codec, " dspio_alloc_dma_chan() -- complete\n"); in dspio_alloc_dma_chan()
2361 static int dspio_free_dma_chan(struct hda_codec *codec, unsigned int dma_chan) in dspio_free_dma_chan() argument
2363 int status = 0; in dspio_free_dma_chan()
2364 unsigned int dummy = 0; in dspio_free_dma_chan()
2366 codec_dbg(codec, " dspio_free_dma_chan() -- begin\n"); in dspio_free_dma_chan()
2367 codec_dbg(codec, "dspio_free_dma_chan: chan=%d\n", dma_chan); in dspio_free_dma_chan()
2369 status = dspio_scp(codec, MASTERCONTROL, 0x20, in dspio_free_dma_chan()
2373 if (status < 0) { in dspio_free_dma_chan()
2374 codec_dbg(codec, "dspio_free_dma_chan: SCP Failed\n"); in dspio_free_dma_chan()
2378 codec_dbg(codec, " dspio_free_dma_chan() -- complete\n"); in dspio_free_dma_chan()
2386 static int dsp_set_run_state(struct hda_codec *codec) in dsp_set_run_state() argument
2392 err = chipio_read(codec, DSP_DBGCNTL_INST_OFFSET, &dbg_ctrl_reg); in dsp_set_run_state()
2393 if (err < 0) in dsp_set_run_state()
2399 if (halt_state != 0) { in dsp_set_run_state()
2402 err = chipio_write(codec, DSP_DBGCNTL_INST_OFFSET, in dsp_set_run_state()
2404 if (err < 0) in dsp_set_run_state()
2409 err = chipio_write(codec, DSP_DBGCNTL_INST_OFFSET, in dsp_set_run_state()
2411 if (err < 0) in dsp_set_run_state()
2415 return 0; in dsp_set_run_state()
2421 static int dsp_reset(struct hda_codec *codec) in dsp_reset() argument
2426 codec_dbg(codec, "dsp_reset\n"); in dsp_reset()
2428 res = dspio_send(codec, VENDOR_DSPIO_DSP_INIT, 0); in dsp_reset()
2429 retry--; in dsp_reset()
2430 } while (res == -EIO && retry); in dsp_reset()
2433 codec_dbg(codec, "dsp_reset timeout\n"); in dsp_reset()
2434 return -EIO; in dsp_reset()
2437 return 0; in dsp_reset()
2464 static bool dsp_is_dma_active(struct hda_codec *codec, unsigned int dma_chan) in dsp_is_dma_active() argument
2468 chipio_read(codec, DSPDMAC_CHNLSTART_INST_OFFSET, &dma_chnlstart_reg); in dsp_is_dma_active()
2471 (DSPDMAC_CHNLSTART_EN_LOBIT + dma_chan))) != 0); in dsp_is_dma_active()
2474 static int dsp_dma_setup_common(struct hda_codec *codec, in dsp_dma_setup_common() argument
2480 int status = 0; in dsp_dma_setup_common()
2486 codec_dbg(codec, "-- dsp_dma_setup_common() -- Begin ---------\n"); in dsp_dma_setup_common()
2489 codec_dbg(codec, "dma chan num invalid\n"); in dsp_dma_setup_common()
2490 return -EINVAL; in dsp_dma_setup_common()
2493 if (dsp_is_dma_active(codec, dma_chan)) { in dsp_dma_setup_common()
2494 codec_dbg(codec, "dma already active\n"); in dsp_dma_setup_common()
2495 return -EBUSY; in dsp_dma_setup_common()
2501 codec_dbg(codec, "invalid chip addr\n"); in dsp_dma_setup_common()
2502 return -ENXIO; in dsp_dma_setup_common()
2506 active = 0; in dsp_dma_setup_common()
2508 codec_dbg(codec, " dsp_dma_setup_common() start reg pgm\n"); in dsp_dma_setup_common()
2511 status = chipio_read(codec, DSPDMAC_CHNLPROP_INST_OFFSET, in dsp_dma_setup_common()
2514 if (status < 0) { in dsp_dma_setup_common()
2515 codec_dbg(codec, "read CHNLPROP Reg fail\n"); in dsp_dma_setup_common()
2518 codec_dbg(codec, "dsp_dma_setup_common() Read CHNLPROP\n"); in dsp_dma_setup_common()
2528 status = chipio_write(codec, DSPDMAC_CHNLPROP_INST_OFFSET, chnl_prop); in dsp_dma_setup_common()
2529 if (status < 0) { in dsp_dma_setup_common()
2530 codec_dbg(codec, "write CHNLPROP Reg fail\n"); in dsp_dma_setup_common()
2533 codec_dbg(codec, " dsp_dma_setup_common() Write CHNLPROP\n"); in dsp_dma_setup_common()
2536 status = chipio_read(codec, DSPDMAC_ACTIVE_INST_OFFSET, in dsp_dma_setup_common()
2539 if (status < 0) { in dsp_dma_setup_common()
2540 codec_dbg(codec, "read ACTIVE Reg fail\n"); in dsp_dma_setup_common()
2543 codec_dbg(codec, "dsp_dma_setup_common() Read ACTIVE\n"); in dsp_dma_setup_common()
2549 status = chipio_write(codec, DSPDMAC_ACTIVE_INST_OFFSET, active); in dsp_dma_setup_common()
2550 if (status < 0) { in dsp_dma_setup_common()
2551 codec_dbg(codec, "write ACTIVE Reg fail\n"); in dsp_dma_setup_common()
2555 codec_dbg(codec, " dsp_dma_setup_common() Write ACTIVE\n"); in dsp_dma_setup_common()
2557 status = chipio_write(codec, DSPDMAC_AUDCHSEL_INST_OFFSET(dma_chan), in dsp_dma_setup_common()
2559 if (status < 0) { in dsp_dma_setup_common()
2560 codec_dbg(codec, "write AUDCHSEL Reg fail\n"); in dsp_dma_setup_common()
2563 codec_dbg(codec, " dsp_dma_setup_common() Write AUDCHSEL\n"); in dsp_dma_setup_common()
2565 status = chipio_write(codec, DSPDMAC_IRQCNT_INST_OFFSET(dma_chan), in dsp_dma_setup_common()
2567 if (status < 0) { in dsp_dma_setup_common()
2568 codec_dbg(codec, "write IRQCNT Reg fail\n"); in dsp_dma_setup_common()
2571 codec_dbg(codec, " dsp_dma_setup_common() Write IRQCNT\n"); in dsp_dma_setup_common()
2573 codec_dbg(codec, in dsp_dma_setup_common()
2574 "ChipA=0x%x,DspA=0x%x,dmaCh=%u, " in dsp_dma_setup_common()
2575 "CHSEL=0x%x,CHPROP=0x%x,Active=0x%x\n", in dsp_dma_setup_common()
2579 codec_dbg(codec, "-- dsp_dma_setup_common() -- Complete ------\n"); in dsp_dma_setup_common()
2581 return 0; in dsp_dma_setup_common()
2585 * Setup the DSP DMA per-transfer-specific registers
2587 static int dsp_dma_setup(struct hda_codec *codec, in dsp_dma_setup() argument
2592 int status = 0; in dsp_dma_setup()
2599 unsigned int dma_cfg = 0; in dsp_dma_setup()
2600 unsigned int adr_ofs = 0; in dsp_dma_setup()
2601 unsigned int xfr_cnt = 0; in dsp_dma_setup()
2602 const unsigned int max_dma_count = 1 << (DSPDMAC_XFRCNT_BCNT_HIBIT - in dsp_dma_setup()
2605 codec_dbg(codec, "-- dsp_dma_setup() -- Begin ---------\n"); in dsp_dma_setup()
2608 codec_dbg(codec, "count too big\n"); in dsp_dma_setup()
2609 return -EINVAL; in dsp_dma_setup()
2614 codec_dbg(codec, "invalid chip addr\n"); in dsp_dma_setup()
2615 return -ENXIO; in dsp_dma_setup()
2618 codec_dbg(codec, " dsp_dma_setup() start reg pgm\n"); in dsp_dma_setup()
2621 incr_field = 0; in dsp_dma_setup()
2632 status = chipio_write(codec, DSPDMAC_DMACFG_INST_OFFSET(dma_chan), in dsp_dma_setup()
2634 if (status < 0) { in dsp_dma_setup()
2635 codec_dbg(codec, "write DMACFG Reg fail\n"); in dsp_dma_setup()
2638 codec_dbg(codec, " dsp_dma_setup() Write DMACFG\n"); in dsp_dma_setup()
2640 adr_ofs = (count - 1) << (DSPDMAC_DSPADROFS_BOFS_LOBIT + in dsp_dma_setup()
2641 (code ? 0 : 1)); in dsp_dma_setup()
2643 status = chipio_write(codec, DSPDMAC_DSPADROFS_INST_OFFSET(dma_chan), in dsp_dma_setup()
2645 if (status < 0) { in dsp_dma_setup()
2646 codec_dbg(codec, "write DSPADROFS Reg fail\n"); in dsp_dma_setup()
2649 codec_dbg(codec, " dsp_dma_setup() Write DSPADROFS\n"); in dsp_dma_setup()
2651 base_cnt = (count - 1) << DSPDMAC_XFRCNT_BCNT_LOBIT; in dsp_dma_setup()
2653 cur_cnt = (count - 1) << DSPDMAC_XFRCNT_CCNT_LOBIT; in dsp_dma_setup()
2657 status = chipio_write(codec, in dsp_dma_setup()
2659 if (status < 0) { in dsp_dma_setup()
2660 codec_dbg(codec, "write XFRCNT Reg fail\n"); in dsp_dma_setup()
2663 codec_dbg(codec, " dsp_dma_setup() Write XFRCNT\n"); in dsp_dma_setup()
2665 codec_dbg(codec, in dsp_dma_setup()
2666 "ChipA=0x%x, cnt=0x%x, DMACFG=0x%x, " in dsp_dma_setup()
2667 "ADROFS=0x%x, XFRCNT=0x%x\n", in dsp_dma_setup()
2670 codec_dbg(codec, "-- dsp_dma_setup() -- Complete ---------\n"); in dsp_dma_setup()
2672 return 0; in dsp_dma_setup()
2678 static int dsp_dma_start(struct hda_codec *codec, in dsp_dma_start() argument
2681 unsigned int reg = 0; in dsp_dma_start()
2682 int status = 0; in dsp_dma_start()
2684 codec_dbg(codec, "-- dsp_dma_start() -- Begin ---------\n"); in dsp_dma_start()
2687 status = chipio_read(codec, in dsp_dma_start()
2690 if (status < 0) { in dsp_dma_start()
2691 codec_dbg(codec, "read CHNLSTART reg fail\n"); in dsp_dma_start()
2694 codec_dbg(codec, "-- dsp_dma_start() Read CHNLSTART\n"); in dsp_dma_start()
2700 status = chipio_write(codec, DSPDMAC_CHNLSTART_INST_OFFSET, in dsp_dma_start()
2702 if (status < 0) { in dsp_dma_start()
2703 codec_dbg(codec, "write CHNLSTART reg fail\n"); in dsp_dma_start()
2706 codec_dbg(codec, "-- dsp_dma_start() -- Complete ---------\n"); in dsp_dma_start()
2714 static int dsp_dma_stop(struct hda_codec *codec, in dsp_dma_stop() argument
2717 unsigned int reg = 0; in dsp_dma_stop()
2718 int status = 0; in dsp_dma_stop()
2720 codec_dbg(codec, "-- dsp_dma_stop() -- Begin ---------\n"); in dsp_dma_stop()
2723 status = chipio_read(codec, in dsp_dma_stop()
2726 if (status < 0) { in dsp_dma_stop()
2727 codec_dbg(codec, "read CHNLSTART reg fail\n"); in dsp_dma_stop()
2730 codec_dbg(codec, "-- dsp_dma_stop() Read CHNLSTART\n"); in dsp_dma_stop()
2735 status = chipio_write(codec, DSPDMAC_CHNLSTART_INST_OFFSET, in dsp_dma_stop()
2737 if (status < 0) { in dsp_dma_stop()
2738 codec_dbg(codec, "write CHNLSTART reg fail\n"); in dsp_dma_stop()
2741 codec_dbg(codec, "-- dsp_dma_stop() -- Complete ---------\n"); in dsp_dma_stop()
2749 * @codec: the HDA codec
2757 static int dsp_allocate_router_ports(struct hda_codec *codec, in dsp_allocate_router_ports() argument
2763 int status = 0; in dsp_allocate_router_ports()
2767 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_allocate_router_ports()
2768 if (status < 0) in dsp_allocate_router_ports()
2772 val |= (ports_per_channel - 1) << 4; in dsp_allocate_router_ports()
2773 val |= num_chans - 1; in dsp_allocate_router_ports()
2775 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in dsp_allocate_router_ports()
2779 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in dsp_allocate_router_ports()
2783 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_allocate_router_ports()
2784 if (status < 0) in dsp_allocate_router_ports()
2787 res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in dsp_allocate_router_ports()
2788 VENDOR_CHIPIO_PORT_ALLOC_GET, 0); in dsp_allocate_router_ports()
2792 return (res < 0) ? res : 0; in dsp_allocate_router_ports()
2798 static int dsp_free_router_ports(struct hda_codec *codec) in dsp_free_router_ports() argument
2800 int status = 0; in dsp_free_router_ports()
2802 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_free_router_ports()
2803 if (status < 0) in dsp_free_router_ports()
2806 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in dsp_free_router_ports()
2810 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_free_router_ports()
2818 static int dsp_allocate_ports(struct hda_codec *codec, in dsp_allocate_ports() argument
2824 codec_dbg(codec, " dsp_allocate_ports() -- begin\n"); in dsp_allocate_ports()
2827 codec_dbg(codec, "bad rate multiple\n"); in dsp_allocate_ports()
2828 return -EINVAL; in dsp_allocate_ports()
2831 status = dsp_allocate_router_ports(codec, num_chans, in dsp_allocate_ports()
2832 rate_multi, 0, port_map); in dsp_allocate_ports()
2834 codec_dbg(codec, " dsp_allocate_ports() -- complete\n"); in dsp_allocate_ports()
2839 static int dsp_allocate_ports_format(struct hda_codec *codec, in dsp_allocate_ports_format() argument
2846 unsigned int sample_rate_div = ((get_hdafmt_rate(fmt) >> 0) & 3) + 1; in dsp_allocate_ports_format()
2851 codec_dbg(codec, "bad rate multiple\n"); in dsp_allocate_ports_format()
2852 return -EINVAL; in dsp_allocate_ports_format()
2857 status = dsp_allocate_ports(codec, num_chans, rate_multi, port_map); in dsp_allocate_ports_format()
2865 static int dsp_free_ports(struct hda_codec *codec) in dsp_free_ports() argument
2869 codec_dbg(codec, " dsp_free_ports() -- begin\n"); in dsp_free_ports()
2871 status = dsp_free_router_ports(codec); in dsp_free_ports()
2872 if (status < 0) { in dsp_free_ports()
2873 codec_dbg(codec, "free router ports fail\n"); in dsp_free_ports()
2876 codec_dbg(codec, " dsp_free_ports() -- complete\n"); in dsp_free_ports()
2885 struct hda_codec *codec; member
2893 DMA_STATE_STOP = 0,
2897 static int dma_convert_to_hda_format(struct hda_codec *codec, in dma_convert_to_hda_format() argument
2905 channels, SNDRV_PCM_FORMAT_S32_LE, 32, 0); in dma_convert_to_hda_format()
2910 return 0; in dma_convert_to_hda_format()
2918 struct hda_codec *codec = dma->codec; in dma_reset() local
2919 struct ca0132_spec *spec = codec->spec; in dma_reset()
2922 if (dma->dmab->area) in dma_reset()
2923 snd_hda_codec_load_dsp_cleanup(codec, dma->dmab); in dma_reset()
2925 status = snd_hda_codec_load_dsp_prepare(codec, in dma_reset()
2926 dma->m_converter_format, in dma_reset()
2927 dma->buf_size, in dma_reset()
2928 dma->dmab); in dma_reset()
2929 if (status < 0) in dma_reset()
2931 spec->dsp_stream_id = status; in dma_reset()
2932 return 0; in dma_reset()
2947 return 0; in dma_set_state()
2950 snd_hda_codec_load_dsp_trigger(dma->codec, cmd); in dma_set_state()
2951 return 0; in dma_set_state()
2956 return dma->dmab->bytes; in dma_get_buffer_size()
2961 return dma->dmab->area; in dma_get_buffer_addr()
2968 memcpy(dma->dmab->area, data, count); in dma_xfer()
2969 return 0; in dma_xfer()
2977 *format = dma->m_converter_format; in dma_get_converter_format()
2982 struct ca0132_spec *spec = dma->codec->spec; in dma_get_stream_id()
2984 return spec->dsp_stream_id; in dma_get_stream_id()
2994 static const u32 g_magic_value = 0x4c46584d;
2995 static const u32 g_chip_addr_magic_value = 0xFFFFFF01;
2999 return p->magic == g_magic_value; in is_valid()
3004 return g_chip_addr_magic_value == p->chip_addr; in is_hci_prog_list_seg()
3009 return p->count == 0; in is_last()
3014 return struct_size(p, data, p->count); in dsp_sizeof()
3026 #define INVALID_DMA_CHANNEL (~0U)
3033 static int dspxfr_hci_write(struct hda_codec *codec, in dspxfr_hci_write() argument
3040 if (fls == NULL || fls->chip_addr != g_chip_addr_magic_value) { in dspxfr_hci_write()
3041 codec_dbg(codec, "hci_write invalid params\n"); in dspxfr_hci_write()
3042 return -EINVAL; in dspxfr_hci_write()
3045 count = fls->count; in dspxfr_hci_write()
3046 data = (u32 *)(fls->data); in dspxfr_hci_write()
3048 status = chipio_write(codec, data[0], data[1]); in dspxfr_hci_write()
3049 if (status < 0) { in dspxfr_hci_write()
3050 codec_dbg(codec, "hci_write chipio failed\n"); in dspxfr_hci_write()
3053 count -= 2; in dspxfr_hci_write()
3056 return 0; in dspxfr_hci_write()
3060 * Write a block of data into DSP code or data RAM using pre-allocated
3063 * @codec: the HDA codec
3065 * @reloc: Relocation address for loading single-segment overlays, or 0 for
3074 static int dspxfr_one_seg(struct hda_codec *codec, in dspxfr_one_seg() argument
3082 int status = 0; in dspxfr_one_seg()
3103 return -EINVAL; in dspxfr_one_seg()
3110 codec_dbg(codec, "hci_write\n"); in dspxfr_one_seg()
3111 return dspxfr_hci_write(codec, hci_write); in dspxfr_one_seg()
3114 if (fls == NULL || dma_engine == NULL || port_map_mask == 0) { in dspxfr_one_seg()
3115 codec_dbg(codec, "Invalid Params\n"); in dspxfr_one_seg()
3116 return -EINVAL; in dspxfr_one_seg()
3119 data = fls->data; in dspxfr_one_seg()
3120 chip_addx = fls->chip_addr; in dspxfr_one_seg()
3121 words_to_write = fls->count; in dspxfr_one_seg()
3124 return hci_write ? dspxfr_hci_write(codec, hci_write) : 0; in dspxfr_one_seg()
3126 chip_addx = (chip_addx & (0xFFFF0000 << 2)) + (reloc << 2); in dspxfr_one_seg()
3131 codec_dbg(codec, "Invalid chip_addx Params\n"); in dspxfr_one_seg()
3132 return -EINVAL; in dspxfr_one_seg()
3141 codec_dbg(codec, "dma_engine buffer NULL\n"); in dspxfr_one_seg()
3142 return -EINVAL; in dspxfr_one_seg()
3146 sample_rate_div = ((get_hdafmt_rate(hda_format) >> 0) & 3) + 1; in dspxfr_one_seg()
3150 hda_frame_size_words = ((sample_rate_div == 0) ? 0 : in dspxfr_one_seg()
3153 if (hda_frame_size_words == 0) { in dspxfr_one_seg()
3154 codec_dbg(codec, "frmsz zero\n"); in dspxfr_one_seg()
3155 return -EINVAL; in dspxfr_one_seg()
3161 buffer_size_words -= buffer_size_words % hda_frame_size_words; in dspxfr_one_seg()
3162 codec_dbg(codec, in dspxfr_one_seg()
3163 "chpadr=0x%08x frmsz=%u nchan=%u " in dspxfr_one_seg()
3169 codec_dbg(codec, "dspxfr_one_seg:failed\n"); in dspxfr_one_seg()
3170 return -EINVAL; in dspxfr_one_seg()
3179 words_to_write -= remainder_words; in dspxfr_one_seg()
3181 while (words_to_write != 0) { in dspxfr_one_seg()
3183 codec_dbg(codec, "dspxfr (seg loop)cnt=%u rs=%u remainder=%u\n", in dspxfr_one_seg()
3187 status = dsp_dma_stop(codec, dma_chan, ovly); in dspxfr_one_seg()
3188 if (status < 0) in dspxfr_one_seg()
3190 status = dsp_dma_setup_common(codec, chip_addx, in dspxfr_one_seg()
3192 if (status < 0) in dspxfr_one_seg()
3197 status = dsp_dma_setup(codec, chip_addx, in dspxfr_one_seg()
3199 if (status < 0) in dspxfr_one_seg()
3201 status = dsp_dma_start(codec, dma_chan, ovly); in dspxfr_one_seg()
3202 if (status < 0) in dspxfr_one_seg()
3204 if (!dsp_is_dma_active(codec, dma_chan)) { in dspxfr_one_seg()
3205 codec_dbg(codec, "dspxfr:DMA did not start\n"); in dspxfr_one_seg()
3206 return -EIO; in dspxfr_one_seg()
3209 if (status < 0) in dspxfr_one_seg()
3211 if (remainder_words != 0) { in dspxfr_one_seg()
3212 status = chipio_write_multiple(codec, in dspxfr_one_seg()
3216 if (status < 0) in dspxfr_one_seg()
3218 remainder_words = 0; in dspxfr_one_seg()
3221 status = dspxfr_hci_write(codec, hci_write); in dspxfr_one_seg()
3222 if (status < 0) in dspxfr_one_seg()
3229 dma_active = dsp_is_dma_active(codec, dma_chan); in dspxfr_one_seg()
3237 codec_dbg(codec, "+++++ DMA complete\n"); in dspxfr_one_seg()
3241 if (status < 0) in dspxfr_one_seg()
3246 words_to_write -= run_size_words; in dspxfr_one_seg()
3249 if (remainder_words != 0) { in dspxfr_one_seg()
3250 status = chipio_write_multiple(codec, chip_addx_remainder, in dspxfr_one_seg()
3260 * @codec: the HDA codec
3262 * @reloc: Relocation address for loading single-segment overlays, or 0 for
3270 static int dspxfr_image(struct hda_codec *codec, in dspxfr_image() argument
3277 struct ca0132_spec *spec = codec->spec; in dspxfr_image()
3279 unsigned short hda_format = 0; in dspxfr_image()
3281 unsigned char stream_id = 0; in dspxfr_image()
3287 return -EINVAL; in dspxfr_image()
3291 return -ENOMEM; in dspxfr_image()
3293 dma_engine->dmab = kzalloc(sizeof(*dma_engine->dmab), GFP_KERNEL); in dspxfr_image()
3294 if (!dma_engine->dmab) { in dspxfr_image()
3296 return -ENOMEM; in dspxfr_image()
3299 dma_engine->codec = codec; in dspxfr_image()
3300 dma_convert_to_hda_format(codec, sample_rate, channels, &hda_format); in dspxfr_image()
3301 dma_engine->m_converter_format = hda_format; in dspxfr_image()
3302 dma_engine->buf_size = (ovly ? DSP_DMA_WRITE_BUFLEN_OVLY : in dspxfr_image()
3305 dma_chan = ovly ? INVALID_DMA_CHANNEL : 0; in dspxfr_image()
3307 status = codec_set_converter_format(codec, WIDGET_CHIP_CTRL, in dspxfr_image()
3310 if (status < 0) { in dspxfr_image()
3311 codec_dbg(codec, "set converter format fail\n"); in dspxfr_image()
3315 status = snd_hda_codec_load_dsp_prepare(codec, in dspxfr_image()
3316 dma_engine->m_converter_format, in dspxfr_image()
3317 dma_engine->buf_size, in dspxfr_image()
3318 dma_engine->dmab); in dspxfr_image()
3319 if (status < 0) in dspxfr_image()
3321 spec->dsp_stream_id = status; in dspxfr_image()
3324 status = dspio_alloc_dma_chan(codec, &dma_chan); in dspxfr_image()
3325 if (status < 0) { in dspxfr_image()
3326 codec_dbg(codec, "alloc dmachan fail\n"); in dspxfr_image()
3332 port_map_mask = 0; in dspxfr_image()
3333 status = dsp_allocate_ports_format(codec, hda_format, in dspxfr_image()
3335 if (status < 0) { in dspxfr_image()
3336 codec_dbg(codec, "alloc ports fail\n"); in dspxfr_image()
3341 status = codec_set_converter_stream_channel(codec, in dspxfr_image()
3342 WIDGET_CHIP_CTRL, stream_id, 0, &response); in dspxfr_image()
3343 if (status < 0) { in dspxfr_image()
3344 codec_dbg(codec, "set stream chan fail\n"); in dspxfr_image()
3350 codec_dbg(codec, "FLS check fail\n"); in dspxfr_image()
3351 status = -EINVAL; in dspxfr_image()
3354 status = dspxfr_one_seg(codec, fls_data, reloc, in dspxfr_image()
3357 if (status < 0) in dspxfr_image()
3367 if (port_map_mask != 0) in dspxfr_image()
3368 status = dsp_free_ports(codec); in dspxfr_image()
3370 if (status < 0) in dspxfr_image()
3373 status = codec_set_converter_stream_channel(codec, in dspxfr_image()
3374 WIDGET_CHIP_CTRL, 0, 0, &response); in dspxfr_image()
3378 dspio_free_dma_chan(codec, dma_chan); in dspxfr_image()
3380 if (dma_engine->dmab->area) in dspxfr_image()
3381 snd_hda_codec_load_dsp_cleanup(codec, dma_engine->dmab); in dspxfr_image()
3382 kfree(dma_engine->dmab); in dspxfr_image()
3391 static void dspload_post_setup(struct hda_codec *codec) in dspload_post_setup() argument
3393 struct ca0132_spec *spec = codec->spec; in dspload_post_setup()
3394 codec_dbg(codec, "---- dspload_post_setup ------\n"); in dspload_post_setup()
3397 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x18), 0x08080080); in dspload_post_setup()
3398 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x19), 0x3f800000); in dspload_post_setup()
3401 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x29), 0x00000002); in dspload_post_setup()
3406 * dspload_image - Download DSP from a DSP Image Fast Load structure.
3408 * @codec: the HDA codec
3411 * @reloc: Relocation address for loading single-segment overlays, or 0 for
3414 * @router_chans: number of audio router channels to be allocated (0 means use
3418 * linear, non-constant sized element array of structures, each of which
3423 static int dspload_image(struct hda_codec *codec, in dspload_image() argument
3430 int status = 0; in dspload_image()
3434 codec_dbg(codec, "---- dspload_image begin ------\n"); in dspload_image()
3435 if (router_chans == 0) { in dspload_image()
3451 codec_dbg(codec, "Ready to program DMA\n"); in dspload_image()
3453 status = dsp_reset(codec); in dspload_image()
3455 if (status < 0) in dspload_image()
3458 codec_dbg(codec, "dsp_reset() complete\n"); in dspload_image()
3459 status = dspxfr_image(codec, fls, reloc, sample_rate, channels, in dspload_image()
3462 if (status < 0) in dspload_image()
3465 codec_dbg(codec, "dspxfr_image() complete\n"); in dspload_image()
3467 dspload_post_setup(codec); in dspload_image()
3468 status = dsp_set_run_state(codec); in dspload_image()
3471 codec_dbg(codec, "LOAD FINISHED\n"); in dspload_image()
3472 } while (0); in dspload_image()
3478 static bool dspload_is_loaded(struct hda_codec *codec) in dspload_is_loaded() argument
3480 unsigned int data = 0; in dspload_is_loaded()
3481 int status = 0; in dspload_is_loaded()
3483 status = chipio_read(codec, 0x40004, &data); in dspload_is_loaded()
3484 if ((status < 0) || (data != 1)) in dspload_is_loaded()
3490 #define dspload_is_loaded(codec) false argument
3493 static bool dspload_wait_loaded(struct hda_codec *codec) in dspload_wait_loaded() argument
3498 if (dspload_is_loaded(codec)) { in dspload_wait_loaded()
3499 codec_info(codec, "ca0132 DSP downloaded and running\n"); in dspload_wait_loaded()
3505 codec_err(codec, "ca0132 failed to download DSP\n"); in dspload_wait_loaded()
3510 * ca0113 related functions. The ca0113 acts as the HDA bus for the pci-e
3516 * For cards with PCI-E region2 (Sound Blaster Z/ZxR, Recon3D, and AE-5)
3517 * the mmio address 0x320 is used to set GPIO pins. The format for the data
3520 * AE-5 note: The AE-5 seems to use pins 2 and 3 to somehow set the color value
3521 * of the on-card LED. It seems to use pin 2 for data, then toggles 3 to on and
3524 static void ca0113_mmio_gpio_set(struct hda_codec *codec, unsigned int gpio_pin, in ca0113_mmio_gpio_set() argument
3527 struct ca0132_spec *spec = codec->spec; in ca0113_mmio_gpio_set()
3530 gpio_data = gpio_pin & 0xF; in ca0113_mmio_gpio_set()
3531 gpio_data |= ((enable << 8) & 0x100); in ca0113_mmio_gpio_set()
3533 writew(gpio_data, spec->mem_base + 0x320); in ca0113_mmio_gpio_set()
3537 * Special pci region2 commands that are only used by the AE-5. They follow
3542 * target-id, and value.
3544 static void ca0113_mmio_command_set(struct hda_codec *codec, unsigned int group, in ca0113_mmio_command_set() argument
3547 struct ca0132_spec *spec = codec->spec; in ca0113_mmio_command_set()
3550 writel(0x0000007e, spec->mem_base + 0x210); in ca0113_mmio_command_set()
3551 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3552 writel(0x0000005a, spec->mem_base + 0x210); in ca0113_mmio_command_set()
3553 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3554 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3556 writel(0x00800005, spec->mem_base + 0x20c); in ca0113_mmio_command_set()
3557 writel(group, spec->mem_base + 0x804); in ca0113_mmio_command_set()
3559 writel(0x00800005, spec->mem_base + 0x20c); in ca0113_mmio_command_set()
3560 write_val = (target & 0xff); in ca0113_mmio_command_set()
3564 writel(write_val, spec->mem_base + 0x204); in ca0113_mmio_command_set()
3570 readl(spec->mem_base + 0x860); in ca0113_mmio_command_set()
3571 readl(spec->mem_base + 0x854); in ca0113_mmio_command_set()
3572 readl(spec->mem_base + 0x840); in ca0113_mmio_command_set()
3574 writel(0x00800004, spec->mem_base + 0x20c); in ca0113_mmio_command_set()
3575 writel(0x00000000, spec->mem_base + 0x210); in ca0113_mmio_command_set()
3576 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3577 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3583 static void ca0113_mmio_command_set_type2(struct hda_codec *codec, in ca0113_mmio_command_set_type2() argument
3586 struct ca0132_spec *spec = codec->spec; in ca0113_mmio_command_set_type2()
3589 writel(0x0000007e, spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3590 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3591 writel(0x0000005a, spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3592 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3593 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3595 writel(0x00800003, spec->mem_base + 0x20c); in ca0113_mmio_command_set_type2()
3596 writel(group, spec->mem_base + 0x804); in ca0113_mmio_command_set_type2()
3598 writel(0x00800005, spec->mem_base + 0x20c); in ca0113_mmio_command_set_type2()
3599 write_val = (target & 0xff); in ca0113_mmio_command_set_type2()
3603 writel(write_val, spec->mem_base + 0x204); in ca0113_mmio_command_set_type2()
3605 readl(spec->mem_base + 0x860); in ca0113_mmio_command_set_type2()
3606 readl(spec->mem_base + 0x854); in ca0113_mmio_command_set_type2()
3607 readl(spec->mem_base + 0x840); in ca0113_mmio_command_set_type2()
3609 writel(0x00800004, spec->mem_base + 0x20c); in ca0113_mmio_command_set_type2()
3610 writel(0x00000000, spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3611 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3612 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3623 static void ca0132_gpio_init(struct hda_codec *codec) in ca0132_gpio_init() argument
3625 struct ca0132_spec *spec = codec->spec; in ca0132_gpio_init()
3631 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ca0132_gpio_init()
3632 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in ca0132_gpio_init()
3633 snd_hda_codec_write(codec, 0x01, 0, 0x790, 0x23); in ca0132_gpio_init()
3636 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ca0132_gpio_init()
3637 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x5B); in ca0132_gpio_init()
3646 static void ca0132_gpio_setup(struct hda_codec *codec) in ca0132_gpio_setup() argument
3648 struct ca0132_spec *spec = codec->spec; in ca0132_gpio_setup()
3652 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3653 AC_VERB_SET_GPIO_DIRECTION, 0x07); in ca0132_gpio_setup()
3654 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3655 AC_VERB_SET_GPIO_MASK, 0x07); in ca0132_gpio_setup()
3656 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3657 AC_VERB_SET_GPIO_DATA, 0x04); in ca0132_gpio_setup()
3658 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3659 AC_VERB_SET_GPIO_DATA, 0x06); in ca0132_gpio_setup()
3662 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3663 AC_VERB_SET_GPIO_DIRECTION, 0x1E); in ca0132_gpio_setup()
3664 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3665 AC_VERB_SET_GPIO_MASK, 0x1F); in ca0132_gpio_setup()
3666 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3667 AC_VERB_SET_GPIO_DATA, 0x0C); in ca0132_gpio_setup()
3679 /* Bit 1 - Switch between front/rear mic. 0 = rear, 1 = front */
3681 /* Bit 2 - Switch between headphone/line out. 0 = Headphone, 1 = Line */
3696 /* Set GPIO bit 1 to 0 for rear mic */
3697 R3DI_REAR_MIC = 0,
3703 /* Set GPIO bit 2 to 0 for headphone */
3704 R3DI_HEADPHONE_OUT = 0,
3710 R3DI_DSP_DOWNLOADING = 0,
3716 static void r3di_gpio_mic_set(struct hda_codec *codec, in r3di_gpio_mic_set() argument
3722 cur_gpio = snd_hda_codec_read(codec, 0x01, 0, AC_VERB_GET_GPIO_DATA, 0); in r3di_gpio_mic_set()
3732 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_mic_set()
3736 static void r3di_gpio_dsp_status_set(struct hda_codec *codec, in r3di_gpio_dsp_status_set() argument
3742 cur_gpio = snd_hda_codec_read(codec, 0x01, 0, AC_VERB_GET_GPIO_DATA, 0); in r3di_gpio_dsp_status_set()
3747 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_dsp_status_set()
3751 /* Set DOWNLOADING bit to 0. */ in r3di_gpio_dsp_status_set()
3754 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_dsp_status_set()
3761 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_dsp_status_set()
3769 struct hda_codec *codec, in ca0132_playback_pcm_prepare() argument
3774 struct ca0132_spec *spec = codec->spec; in ca0132_playback_pcm_prepare()
3776 snd_hda_codec_setup_stream(codec, spec->dacs[0], stream_tag, 0, format); in ca0132_playback_pcm_prepare()
3778 return 0; in ca0132_playback_pcm_prepare()
3782 struct hda_codec *codec, in ca0132_playback_pcm_cleanup() argument
3785 struct ca0132_spec *spec = codec->spec; in ca0132_playback_pcm_cleanup()
3787 if (spec->dsp_state == DSP_DOWNLOADING) in ca0132_playback_pcm_cleanup()
3788 return 0; in ca0132_playback_pcm_cleanup()
3792 if (spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]) in ca0132_playback_pcm_cleanup()
3795 snd_hda_codec_cleanup_stream(codec, spec->dacs[0]); in ca0132_playback_pcm_cleanup()
3797 return 0; in ca0132_playback_pcm_cleanup()
3801 struct hda_codec *codec, in ca0132_playback_pcm_delay() argument
3804 struct ca0132_spec *spec = codec->spec; in ca0132_playback_pcm_delay()
3806 struct snd_pcm_runtime *runtime = substream->runtime; in ca0132_playback_pcm_delay()
3808 if (spec->dsp_state != DSP_DOWNLOADED) in ca0132_playback_pcm_delay()
3809 return 0; in ca0132_playback_pcm_delay()
3812 if (spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]) { in ca0132_playback_pcm_delay()
3813 if ((spec->effects_switch[SURROUND - EFFECT_START_NID]) || in ca0132_playback_pcm_delay()
3814 (spec->effects_switch[DIALOG_PLUS - EFFECT_START_NID])) in ca0132_playback_pcm_delay()
3819 if (spec->cur_out_type == SPEAKER_OUT) in ca0132_playback_pcm_delay()
3822 return (latency * runtime->rate) / 1000; in ca0132_playback_pcm_delay()
3829 struct hda_codec *codec, in ca0132_dig_playback_pcm_open() argument
3832 struct ca0132_spec *spec = codec->spec; in ca0132_dig_playback_pcm_open()
3833 return snd_hda_multi_out_dig_open(codec, &spec->multiout); in ca0132_dig_playback_pcm_open()
3837 struct hda_codec *codec, in ca0132_dig_playback_pcm_prepare() argument
3842 struct ca0132_spec *spec = codec->spec; in ca0132_dig_playback_pcm_prepare()
3843 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout, in ca0132_dig_playback_pcm_prepare()
3848 struct hda_codec *codec, in ca0132_dig_playback_pcm_cleanup() argument
3851 struct ca0132_spec *spec = codec->spec; in ca0132_dig_playback_pcm_cleanup()
3852 return snd_hda_multi_out_dig_cleanup(codec, &spec->multiout); in ca0132_dig_playback_pcm_cleanup()
3856 struct hda_codec *codec, in ca0132_dig_playback_pcm_close() argument
3859 struct ca0132_spec *spec = codec->spec; in ca0132_dig_playback_pcm_close()
3860 return snd_hda_multi_out_dig_close(codec, &spec->multiout); in ca0132_dig_playback_pcm_close()
3867 struct hda_codec *codec, in ca0132_capture_pcm_prepare() argument
3872 snd_hda_codec_setup_stream(codec, hinfo->nid, in ca0132_capture_pcm_prepare()
3873 stream_tag, 0, format); in ca0132_capture_pcm_prepare()
3875 return 0; in ca0132_capture_pcm_prepare()
3879 struct hda_codec *codec, in ca0132_capture_pcm_cleanup() argument
3882 struct ca0132_spec *spec = codec->spec; in ca0132_capture_pcm_cleanup()
3884 if (spec->dsp_state == DSP_DOWNLOADING) in ca0132_capture_pcm_cleanup()
3885 return 0; in ca0132_capture_pcm_cleanup()
3887 snd_hda_codec_cleanup_stream(codec, hinfo->nid); in ca0132_capture_pcm_cleanup()
3888 return 0; in ca0132_capture_pcm_cleanup()
3892 struct hda_codec *codec, in ca0132_capture_pcm_delay() argument
3895 struct ca0132_spec *spec = codec->spec; in ca0132_capture_pcm_delay()
3897 struct snd_pcm_runtime *runtime = substream->runtime; in ca0132_capture_pcm_delay()
3899 if (spec->dsp_state != DSP_DOWNLOADED) in ca0132_capture_pcm_delay()
3900 return 0; in ca0132_capture_pcm_delay()
3902 if (spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID]) in ca0132_capture_pcm_delay()
3905 return (latency * runtime->rate) / 1000; in ca0132_capture_pcm_delay()
3926 .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
3944 .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
3953 .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
3969 * values -90 to 9. -90 is the lowest decibel value for both the ADC's and the
3973 0xC2B40000, 0xC2B20000, 0xC2B00000, 0xC2AE0000, 0xC2AC0000, 0xC2AA0000,
3974 0xC2A80000, 0xC2A60000, 0xC2A40000, 0xC2A20000, 0xC2A00000, 0xC29E0000,
3975 0xC29C0000, 0xC29A0000, 0xC2980000, 0xC2960000, 0xC2940000, 0xC2920000,
3976 0xC2900000, 0xC28E0000, 0xC28C0000, 0xC28A0000, 0xC2880000, 0xC2860000,
3977 0xC2840000, 0xC2820000, 0xC2800000, 0xC27C0000, 0xC2780000, 0xC2740000,
3978 0xC2700000, 0xC26C0000, 0xC2680000, 0xC2640000, 0xC2600000, 0xC25C0000,
3979 0xC2580000, 0xC2540000, 0xC2500000, 0xC24C0000, 0xC2480000, 0xC2440000,
3980 0xC2400000, 0xC23C0000, 0xC2380000, 0xC2340000, 0xC2300000, 0xC22C0000,
3981 0xC2280000, 0xC2240000, 0xC2200000, 0xC21C0000, 0xC2180000, 0xC2140000,
3982 0xC2100000, 0xC20C0000, 0xC2080000, 0xC2040000, 0xC2000000, 0xC1F80000,
3983 0xC1F00000, 0xC1E80000, 0xC1E00000, 0xC1D80000, 0xC1D00000, 0xC1C80000,
3984 0xC1C00000, 0xC1B80000, 0xC1B00000, 0xC1A80000, 0xC1A00000, 0xC1980000,
3985 0xC1900000, 0xC1880000, 0xC1800000, 0xC1700000, 0xC1600000, 0xC1500000,
3986 0xC1400000, 0xC1300000, 0xC1200000, 0xC1100000, 0xC1000000, 0xC0E00000,
3987 0xC0C00000, 0xC0A00000, 0xC0800000, 0xC0400000, 0xC0000000, 0xBF800000,
3988 0x00000000, 0x3F800000, 0x40000000, 0x40400000, 0x40800000, 0x40A00000,
3989 0x40C00000, 0x40E00000, 0x41000000, 0x41100000
3993 * This table counts from float 0 to 1 in increments of .01, which is
3997 0x00000000, 0x3C23D70A, 0x3CA3D70A, 0x3CF5C28F, 0x3D23D70A, 0x3D4CCCCD,
3998 0x3D75C28F, 0x3D8F5C29, 0x3DA3D70A, 0x3DB851EC, 0x3DCCCCCD, 0x3DE147AE,
3999 0x3DF5C28F, 0x3E051EB8, 0x3E0F5C29, 0x3E19999A, 0x3E23D70A, 0x3E2E147B,
4000 0x3E3851EC, 0x3E428F5C, 0x3E4CCCCD, 0x3E570A3D, 0x3E6147AE, 0x3E6B851F,
4001 0x3E75C28F, 0x3E800000, 0x3E851EB8, 0x3E8A3D71, 0x3E8F5C29, 0x3E947AE1,
4002 0x3E99999A, 0x3E9EB852, 0x3EA3D70A, 0x3EA8F5C3, 0x3EAE147B, 0x3EB33333,
4003 0x3EB851EC, 0x3EBD70A4, 0x3EC28F5C, 0x3EC7AE14, 0x3ECCCCCD, 0x3ED1EB85,
4004 0x3ED70A3D, 0x3EDC28F6, 0x3EE147AE, 0x3EE66666, 0x3EEB851F, 0x3EF0A3D7,
4005 0x3EF5C28F, 0x3EFAE148, 0x3F000000, 0x3F028F5C, 0x3F051EB8, 0x3F07AE14,
4006 0x3F0A3D71, 0x3F0CCCCD, 0x3F0F5C29, 0x3F11EB85, 0x3F147AE1, 0x3F170A3D,
4007 0x3F19999A, 0x3F1C28F6, 0x3F1EB852, 0x3F2147AE, 0x3F23D70A, 0x3F266666,
4008 0x3F28F5C3, 0x3F2B851F, 0x3F2E147B, 0x3F30A3D7, 0x3F333333, 0x3F35C28F,
4009 0x3F3851EC, 0x3F3AE148, 0x3F3D70A4, 0x3F400000, 0x3F428F5C, 0x3F451EB8,
4010 0x3F47AE14, 0x3F4A3D71, 0x3F4CCCCD, 0x3F4F5C29, 0x3F51EB85, 0x3F547AE1,
4011 0x3F570A3D, 0x3F59999A, 0x3F5C28F6, 0x3F5EB852, 0x3F6147AE, 0x3F63D70A,
4012 0x3F666666, 0x3F68F5C3, 0x3F6B851F, 0x3F6E147B, 0x3F70A3D7, 0x3F733333,
4013 0x3F75C28F, 0x3F7851EC, 0x3F7AE148, 0x3F7D70A4, 0x3F800000
4017 * This table counts from float 10 to 1000, which is the range of the x-bass
4021 0x41200000, 0x41A00000, 0x41F00000, 0x42200000, 0x42480000, 0x42700000,
4022 0x428C0000, 0x42A00000, 0x42B40000, 0x42C80000, 0x42DC0000, 0x42F00000,
4023 0x43020000, 0x430C0000, 0x43160000, 0x43200000, 0x432A0000, 0x43340000,
4024 0x433E0000, 0x43480000, 0x43520000, 0x435C0000, 0x43660000, 0x43700000,
4025 0x437A0000, 0x43820000, 0x43870000, 0x438C0000, 0x43910000, 0x43960000,
4026 0x439B0000, 0x43A00000, 0x43A50000, 0x43AA0000, 0x43AF0000, 0x43B40000,
4027 0x43B90000, 0x43BE0000, 0x43C30000, 0x43C80000, 0x43CD0000, 0x43D20000,
4028 0x43D70000, 0x43DC0000, 0x43E10000, 0x43E60000, 0x43EB0000, 0x43F00000,
4029 0x43F50000, 0x43FA0000, 0x43FF0000, 0x44020000, 0x44048000, 0x44070000,
4030 0x44098000, 0x440C0000, 0x440E8000, 0x44110000, 0x44138000, 0x44160000,
4031 0x44188000, 0x441B0000, 0x441D8000, 0x44200000, 0x44228000, 0x44250000,
4032 0x44278000, 0x442A0000, 0x442C8000, 0x442F0000, 0x44318000, 0x44340000,
4033 0x44368000, 0x44390000, 0x443B8000, 0x443E0000, 0x44408000, 0x44430000,
4034 0x44458000, 0x44480000, 0x444A8000, 0x444D0000, 0x444F8000, 0x44520000,
4035 0x44548000, 0x44570000, 0x44598000, 0x445C0000, 0x445E8000, 0x44610000,
4036 0x44638000, 0x44660000, 0x44688000, 0x446B0000, 0x446D8000, 0x44700000,
4037 0x44728000, 0x44750000, 0x44778000, 0x447A0000
4044 0x41A00000, 0x41A80000, 0x41B00000, 0x41B80000, 0x41C00000, 0x41C80000,
4045 0x41D00000, 0x41D80000, 0x41E00000, 0x41E80000, 0x41F00000, 0x41F80000,
4046 0x42000000, 0x42040000, 0x42080000, 0x420C0000, 0x42100000, 0x42140000,
4047 0x42180000, 0x421C0000, 0x42200000, 0x42240000, 0x42280000, 0x422C0000,
4048 0x42300000, 0x42340000, 0x42380000, 0x423C0000, 0x42400000, 0x42440000,
4049 0x42480000, 0x424C0000, 0x42500000, 0x42540000, 0x42580000, 0x425C0000,
4050 0x42600000, 0x42640000, 0x42680000, 0x426C0000, 0x42700000, 0x42740000,
4051 0x42780000, 0x427C0000, 0x42800000, 0x42820000, 0x42840000, 0x42860000,
4052 0x42880000, 0x428A0000, 0x428C0000, 0x428E0000, 0x42900000, 0x42920000,
4053 0x42940000, 0x42960000, 0x42980000, 0x429A0000, 0x429C0000, 0x429E0000,
4054 0x42A00000, 0x42A20000, 0x42A40000, 0x42A60000, 0x42A80000, 0x42AA0000,
4055 0x42AC0000, 0x42AE0000, 0x42B00000, 0x42B20000, 0x42B40000, 0x42B60000,
4056 0x42B80000, 0x42BA0000, 0x42BC0000, 0x42BE0000, 0x42C00000, 0x42C20000,
4057 0x42C40000, 0x42C60000, 0x42C80000, 0x42CA0000, 0x42CC0000, 0x42CE0000,
4058 0x42D00000, 0x42D20000, 0x42D40000, 0x42D60000, 0x42D80000, 0x42DA0000,
4059 0x42DC0000, 0x42DE0000, 0x42E00000, 0x42E20000, 0x42E40000, 0x42E60000,
4060 0x42E80000, 0x42EA0000, 0x42EC0000, 0x42EE0000, 0x42F00000, 0x42F20000,
4061 0x42F40000, 0x42F60000, 0x42F80000, 0x42FA0000, 0x42FC0000, 0x42FE0000,
4062 0x43000000, 0x43010000, 0x43020000, 0x43030000, 0x43040000, 0x43050000,
4063 0x43060000, 0x43070000, 0x43080000, 0x43090000, 0x430A0000, 0x430B0000,
4064 0x430C0000, 0x430D0000, 0x430E0000, 0x430F0000, 0x43100000, 0x43110000,
4065 0x43120000, 0x43130000, 0x43140000, 0x43150000, 0x43160000, 0x43170000,
4066 0x43180000, 0x43190000, 0x431A0000, 0x431B0000, 0x431C0000, 0x431D0000,
4067 0x431E0000, 0x431F0000, 0x43200000, 0x43210000, 0x43220000, 0x43230000,
4068 0x43240000, 0x43250000, 0x43260000, 0x43270000, 0x43280000, 0x43290000,
4069 0x432A0000, 0x432B0000, 0x432C0000, 0x432D0000, 0x432E0000, 0x432F0000,
4070 0x43300000, 0x43310000, 0x43320000, 0x43330000, 0x43340000
4074 0x00000000, 0x3C23D70A, 0x3CA3D70A, 0x3CF5C28F, 0x3D23D70A, 0x3D4CCCCD,
4075 0x3D75C28F, 0x3D8F5C29, 0x3DA3D70A, 0x3DB851EC, 0x3DCCCCCD, 0x3DE147AE,
4076 0x3DF5C28F, 0x3E051EB8, 0x3E0F5C29, 0x3E19999A, 0x3E23D70A, 0x3E2E147B,
4077 0x3E3851EC, 0x3E428F5C, 0x3E4CCCCD, 0x3E570A3D, 0x3E6147AE, 0x3E6B851F,
4078 0x3E75C28F, 0x3E800000, 0x3E851EB8, 0x3E8A3D71, 0x3E8F5C29, 0x3E947AE1,
4079 0x3E99999A, 0x3E9EB852, 0x3EA3D70A, 0x3EA8F5C3, 0x3EAE147B, 0x3EB33333,
4080 0x3EB851EC, 0x3EBD70A4, 0x3EC28F5C, 0x3EC7AE14, 0x3ECCCCCD, 0x3ED1EB85,
4081 0x3ED70A3D, 0x3EDC28F6, 0x3EE147AE, 0x3EE66666, 0x3EEB851F, 0x3EF0A3D7,
4082 0x3EF5C28F, 0x3EFAE148, 0x3F000000, 0x3F028F5C, 0x3F051EB8, 0x3F07AE14,
4083 0x3F0A3D71, 0x3F0CCCCD, 0x3F0F5C29, 0x3F11EB85, 0x3F147AE1, 0x3F170A3D,
4084 0x3F19999A, 0x3F1C28F6, 0x3F1EB852, 0x3F2147AE, 0x3F23D70A, 0x3F266666,
4085 0x3F28F5C3, 0x3F2B851F, 0x3F2E147B, 0x3F30A3D7, 0x3F333333, 0x3F35C28F,
4086 0x3F3851EC, 0x3F3AE148, 0x3F3D70A4, 0x3F400000, 0x3F428F5C, 0x3F451EB8,
4087 0x3F47AE14, 0x3F4A3D71, 0x3F4CCCCD, 0x3F4F5C29, 0x3F51EB85, 0x3F547AE1,
4088 0x3F570A3D, 0x3F59999A, 0x3F5C28F6, 0x3F5EB852, 0x3F6147AE, 0x3F63D70A,
4089 0x3F666666, 0x3F68F5C3, 0x3F6B851F, 0x3F6E147B, 0x3F70A3D7, 0x3F733333,
4090 0x3F75C28F, 0x3F7851EC, 0x3F7AE148, 0x3F7D70A4, 0x3F800000
4094 0xC1C00000, 0xC1B80000, 0xC1B00000, 0xC1A80000, 0xC1A00000, 0xC1980000,
4095 0xC1900000, 0xC1880000, 0xC1800000, 0xC1700000, 0xC1600000, 0xC1500000,
4096 0xC1400000, 0xC1300000, 0xC1200000, 0xC1100000, 0xC1000000, 0xC0E00000,
4097 0xC0C00000, 0xC0A00000, 0xC0800000, 0xC0400000, 0xC0000000, 0xBF800000,
4098 0x00000000, 0x3F800000, 0x40000000, 0x40400000, 0x40800000, 0x40A00000,
4099 0x40C00000, 0x40E00000, 0x41000000, 0x41100000, 0x41200000, 0x41300000,
4100 0x41400000, 0x41500000, 0x41600000, 0x41700000, 0x41800000, 0x41880000,
4101 0x41900000, 0x41980000, 0x41A00000, 0x41A80000, 0x41B00000, 0x41B80000,
4102 0x41C00000
4105 static int tuning_ctl_set(struct hda_codec *codec, hda_nid_t nid, in tuning_ctl_set() argument
4108 int i = 0; in tuning_ctl_set()
4110 for (i = 0; i < TUNING_CTLS_COUNT; i++) in tuning_ctl_set()
4114 return -EINVAL; in tuning_ctl_set()
4116 snd_hda_power_up(codec); in tuning_ctl_set()
4117 dspio_set_param(codec, ca0132_tuning_ctls[i].mid, 0x20, in tuning_ctl_set()
4120 snd_hda_power_down(codec); in tuning_ctl_set()
4128 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in tuning_ctl_get() local
4129 struct ca0132_spec *spec = codec->spec; in tuning_ctl_get()
4131 long *valp = ucontrol->value.integer.value; in tuning_ctl_get()
4132 int idx = nid - TUNING_CTL_START_NID; in tuning_ctl_get()
4134 *valp = spec->cur_ctl_vals[idx]; in tuning_ctl_get()
4135 return 0; in tuning_ctl_get()
4142 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in voice_focus_ctl_info()
4143 uinfo->count = chs == 3 ? 2 : 1; in voice_focus_ctl_info()
4144 uinfo->value.integer.min = 20; in voice_focus_ctl_info()
4145 uinfo->value.integer.max = 180; in voice_focus_ctl_info()
4146 uinfo->value.integer.step = 1; in voice_focus_ctl_info()
4148 return 0; in voice_focus_ctl_info()
4154 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in voice_focus_ctl_put() local
4155 struct ca0132_spec *spec = codec->spec; in voice_focus_ctl_put()
4157 long *valp = ucontrol->value.integer.value; in voice_focus_ctl_put()
4160 idx = nid - TUNING_CTL_START_NID; in voice_focus_ctl_put()
4162 if (spec->cur_ctl_vals[idx] == *valp) in voice_focus_ctl_put()
4163 return 0; in voice_focus_ctl_put()
4165 spec->cur_ctl_vals[idx] = *valp; in voice_focus_ctl_put()
4167 idx = *valp - 20; in voice_focus_ctl_put()
4168 tuning_ctl_set(codec, nid, voice_focus_vals_lookup, idx); in voice_focus_ctl_put()
4177 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in mic_svm_ctl_info()
4178 uinfo->count = chs == 3 ? 2 : 1; in mic_svm_ctl_info()
4179 uinfo->value.integer.min = 0; in mic_svm_ctl_info()
4180 uinfo->value.integer.max = 100; in mic_svm_ctl_info()
4181 uinfo->value.integer.step = 1; in mic_svm_ctl_info()
4183 return 0; in mic_svm_ctl_info()
4189 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in mic_svm_ctl_put() local
4190 struct ca0132_spec *spec = codec->spec; in mic_svm_ctl_put()
4192 long *valp = ucontrol->value.integer.value; in mic_svm_ctl_put()
4195 idx = nid - TUNING_CTL_START_NID; in mic_svm_ctl_put()
4197 if (spec->cur_ctl_vals[idx] == *valp) in mic_svm_ctl_put()
4198 return 0; in mic_svm_ctl_put()
4200 spec->cur_ctl_vals[idx] = *valp; in mic_svm_ctl_put()
4203 tuning_ctl_set(codec, nid, mic_svm_vals_lookup, idx); in mic_svm_ctl_put()
4205 return 0; in mic_svm_ctl_put()
4212 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in equalizer_ctl_info()
4213 uinfo->count = chs == 3 ? 2 : 1; in equalizer_ctl_info()
4214 uinfo->value.integer.min = 0; in equalizer_ctl_info()
4215 uinfo->value.integer.max = 48; in equalizer_ctl_info()
4216 uinfo->value.integer.step = 1; in equalizer_ctl_info()
4218 return 0; in equalizer_ctl_info()
4224 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in equalizer_ctl_put() local
4225 struct ca0132_spec *spec = codec->spec; in equalizer_ctl_put()
4227 long *valp = ucontrol->value.integer.value; in equalizer_ctl_put()
4230 idx = nid - TUNING_CTL_START_NID; in equalizer_ctl_put()
4232 if (spec->cur_ctl_vals[idx] == *valp) in equalizer_ctl_put()
4233 return 0; in equalizer_ctl_put()
4235 spec->cur_ctl_vals[idx] = *valp; in equalizer_ctl_put()
4238 tuning_ctl_set(codec, nid, equalizer_vals_lookup, idx); in equalizer_ctl_put()
4243 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(voice_focus_db_scale, 2000, 100, 0);
4244 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(eq_db_scale, -2400, 100, 0);
4246 static int add_tuning_control(struct hda_codec *codec, in add_tuning_control() argument
4253 HDA_CODEC_VOLUME_MONO(namestr, nid, 1, 0, type); in add_tuning_control()
4257 knew.tlv.c = 0; in add_tuning_control()
4258 knew.tlv.p = 0; in add_tuning_control()
4278 return 0; in add_tuning_control()
4281 HDA_COMPOSE_AMP_VAL(nid, 1, 0, type); in add_tuning_control()
4283 return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec)); in add_tuning_control()
4286 static int add_tuning_ctls(struct hda_codec *codec) in add_tuning_ctls() argument
4291 for (i = 0; i < TUNING_CTLS_COUNT; i++) { in add_tuning_ctls()
4292 err = add_tuning_control(codec, in add_tuning_ctls()
4297 if (err < 0) in add_tuning_ctls()
4301 return 0; in add_tuning_ctls()
4304 static void ca0132_init_tuning_defaults(struct hda_codec *codec) in ca0132_init_tuning_defaults() argument
4306 struct ca0132_spec *spec = codec->spec; in ca0132_init_tuning_defaults()
4309 /* Wedge Angle defaults to 30. 10 below is 30 - 20. 20 is min. */ in ca0132_init_tuning_defaults()
4310 spec->cur_ctl_vals[WEDGE_ANGLE - TUNING_CTL_START_NID] = 10; in ca0132_init_tuning_defaults()
4312 spec->cur_ctl_vals[SVM_LEVEL - TUNING_CTL_START_NID] = 74; in ca0132_init_tuning_defaults()
4314 /* EQ defaults to 0dB. */ in ca0132_init_tuning_defaults()
4316 spec->cur_ctl_vals[i] = 24; in ca0132_init_tuning_defaults()
4323 * If jack inserted, headphone will be selected, else built-in speakers
4326 static int ca0132_select_out(struct hda_codec *codec) in ca0132_select_out() argument
4328 struct ca0132_spec *spec = codec->spec; in ca0132_select_out()
4335 codec_dbg(codec, "ca0132_select_out\n"); in ca0132_select_out()
4337 snd_hda_power_up_pm(codec); in ca0132_select_out()
4339 auto_jack = spec->vnode_lswitch[VNID_HP_ASEL - VNODE_START_NID]; in ca0132_select_out()
4342 jack_present = snd_hda_jack_detect(codec, spec->unsol_tag_hp); in ca0132_select_out()
4345 spec->vnode_lswitch[VNID_HP_SEL - VNODE_START_NID]; in ca0132_select_out()
4348 spec->cur_out_type = HEADPHONE_OUT; in ca0132_select_out()
4350 spec->cur_out_type = SPEAKER_OUT; in ca0132_select_out()
4352 if (spec->cur_out_type == SPEAKER_OUT) { in ca0132_select_out()
4353 codec_dbg(codec, "ca0132_select_out speaker\n"); in ca0132_select_out()
4356 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp); in ca0132_select_out()
4357 if (err < 0) in ca0132_select_out()
4361 err = dspio_set_uint_param(codec, 0x8f, 0x00, tmp); in ca0132_select_out()
4362 if (err < 0) in ca0132_select_out()
4366 snd_hda_codec_write(codec, spec->out_pins[1], 0, in ca0132_select_out()
4367 VENDOR_CHIPIO_EAPD_SEL_SET, 0x02); in ca0132_select_out()
4368 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4369 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in ca0132_select_out()
4370 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4371 VENDOR_CHIPIO_EAPD_SEL_SET, 0x00); in ca0132_select_out()
4372 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4373 AC_VERB_SET_EAPD_BTLENABLE, 0x02); in ca0132_select_out()
4376 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[1], 0, in ca0132_select_out()
4377 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4378 snd_hda_set_pin_ctl(codec, spec->out_pins[1], in ca0132_select_out()
4381 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[0], 0, in ca0132_select_out()
4382 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4383 snd_hda_set_pin_ctl(codec, spec->out_pins[0], in ca0132_select_out()
4386 codec_dbg(codec, "ca0132_select_out hp\n"); in ca0132_select_out()
4389 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp); in ca0132_select_out()
4390 if (err < 0) in ca0132_select_out()
4394 err = dspio_set_uint_param(codec, 0x8f, 0x00, tmp); in ca0132_select_out()
4395 if (err < 0) in ca0132_select_out()
4399 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4400 VENDOR_CHIPIO_EAPD_SEL_SET, 0x00); in ca0132_select_out()
4401 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4402 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in ca0132_select_out()
4403 snd_hda_codec_write(codec, spec->out_pins[1], 0, in ca0132_select_out()
4404 VENDOR_CHIPIO_EAPD_SEL_SET, 0x02); in ca0132_select_out()
4405 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4406 AC_VERB_SET_EAPD_BTLENABLE, 0x02); in ca0132_select_out()
4409 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[0], 0, in ca0132_select_out()
4410 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4411 snd_hda_set_pin_ctl(codec, spec->out_pins[0], in ca0132_select_out()
4414 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[1], 0, in ca0132_select_out()
4415 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4416 snd_hda_set_pin_ctl(codec, spec->out_pins[1], in ca0132_select_out()
4421 snd_hda_power_down_pm(codec); in ca0132_select_out()
4423 return err < 0 ? err : 0; in ca0132_select_out()
4426 static int ae5_headphone_gain_set(struct hda_codec *codec, long val);
4427 static int zxr_headphone_gain_set(struct hda_codec *codec, long val);
4428 static int ca0132_effects_set(struct hda_codec *codec, hda_nid_t nid, long val);
4430 static void ae5_mmio_select_out(struct hda_codec *codec) in ae5_mmio_select_out() argument
4432 struct ca0132_spec *spec = codec->spec; in ae5_mmio_select_out()
4441 for (i = 0; i < AE_CA0113_OUT_SET_COMMANDS; i++) in ae5_mmio_select_out()
4442 ca0113_mmio_command_set(codec, out_cmds->group[i], in ae5_mmio_select_out()
4443 out_cmds->target[i], in ae5_mmio_select_out()
4444 out_cmds->vals[spec->cur_out_type][i]); in ae5_mmio_select_out()
4447 static int ca0132_alt_set_full_range_speaker(struct hda_codec *codec) in ca0132_alt_set_full_range_speaker() argument
4449 struct ca0132_spec *spec = codec->spec; in ca0132_alt_set_full_range_speaker()
4454 /* 2.0/4.0 setup has no LFE channel, so setting full-range does nothing. */ in ca0132_alt_set_full_range_speaker()
4455 if (spec->channel_cfg_val == SPEAKER_CHANNELS_4_0 in ca0132_alt_set_full_range_speaker()
4456 || spec->channel_cfg_val == SPEAKER_CHANNELS_2_0) in ca0132_alt_set_full_range_speaker()
4457 return 0; in ca0132_alt_set_full_range_speaker()
4459 /* Set front L/R full range. Zero for full-range, one for redirection. */ in ca0132_alt_set_full_range_speaker()
4460 tmp = spec->speaker_range_val[0] ? FLOAT_ZERO : FLOAT_ONE; in ca0132_alt_set_full_range_speaker()
4461 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4463 if (err < 0) in ca0132_alt_set_full_range_speaker()
4466 /* When setting full-range rear, both rear and center/lfe are set. */ in ca0132_alt_set_full_range_speaker()
4467 tmp = spec->speaker_range_val[1] ? FLOAT_ZERO : FLOAT_ONE; in ca0132_alt_set_full_range_speaker()
4468 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4470 if (err < 0) in ca0132_alt_set_full_range_speaker()
4473 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4475 if (err < 0) in ca0132_alt_set_full_range_speaker()
4479 * Only the AE series cards set this value when setting full-range, in ca0132_alt_set_full_range_speaker()
4483 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4485 if (err < 0) in ca0132_alt_set_full_range_speaker()
4489 return 0; in ca0132_alt_set_full_range_speaker()
4492 static int ca0132_alt_surround_set_bass_redirection(struct hda_codec *codec, in ca0132_alt_surround_set_bass_redirection() argument
4495 struct ca0132_spec *spec = codec->spec; in ca0132_alt_surround_set_bass_redirection()
4499 if (val && spec->channel_cfg_val != SPEAKER_CHANNELS_4_0 && in ca0132_alt_surround_set_bass_redirection()
4500 spec->channel_cfg_val != SPEAKER_CHANNELS_2_0) in ca0132_alt_surround_set_bass_redirection()
4505 err = dspio_set_uint_param(codec, 0x96, SPEAKER_BASS_REDIRECT, tmp); in ca0132_alt_surround_set_bass_redirection()
4506 if (err < 0) in ca0132_alt_surround_set_bass_redirection()
4511 tmp = float_xbass_xover_lookup[spec->xbass_xover_freq]; in ca0132_alt_surround_set_bass_redirection()
4512 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_surround_set_bass_redirection()
4514 if (err < 0) in ca0132_alt_surround_set_bass_redirection()
4518 return 0; in ca0132_alt_surround_set_bass_redirection()
4525 static void ca0132_alt_select_out_get_quirk_data(struct hda_codec *codec, in ca0132_alt_select_out_get_quirk_data() argument
4528 struct ca0132_spec *spec = codec->spec; in ca0132_alt_select_out_get_quirk_data()
4533 for (i = 0; i < ARRAY_SIZE(quirk_out_set_data); i++) { in ca0132_alt_select_out_get_quirk_data()
4541 static int ca0132_alt_select_out_quirk_set(struct hda_codec *codec) in ca0132_alt_select_out_quirk_set() argument
4545 struct ca0132_spec *spec = codec->spec; in ca0132_alt_select_out_quirk_set()
4549 ca0132_alt_select_out_get_quirk_data(codec, &quirk_data); in ca0132_alt_select_out_quirk_set()
4551 return 0; in ca0132_alt_select_out_quirk_set()
4553 out_info = &quirk_data->out_set_info[spec->cur_out_type]; in ca0132_alt_select_out_quirk_set()
4554 if (quirk_data->is_ae_series) in ca0132_alt_select_out_quirk_set()
4555 ae5_mmio_select_out(codec); in ca0132_alt_select_out_quirk_set()
4557 if (out_info->has_hda_gpio) { in ca0132_alt_select_out_quirk_set()
4558 gpio_data = snd_hda_codec_read(codec, codec->core.afg, 0, in ca0132_alt_select_out_quirk_set()
4559 AC_VERB_GET_GPIO_DATA, 0); in ca0132_alt_select_out_quirk_set()
4561 if (out_info->hda_gpio_set) in ca0132_alt_select_out_quirk_set()
4562 gpio_data |= (1 << out_info->hda_gpio_pin); in ca0132_alt_select_out_quirk_set()
4564 gpio_data &= ~(1 << out_info->hda_gpio_pin); in ca0132_alt_select_out_quirk_set()
4566 snd_hda_codec_write(codec, codec->core.afg, 0, in ca0132_alt_select_out_quirk_set()
4570 if (out_info->mmio_gpio_count) { in ca0132_alt_select_out_quirk_set()
4571 for (i = 0; i < out_info->mmio_gpio_count; i++) { in ca0132_alt_select_out_quirk_set()
4572 ca0113_mmio_gpio_set(codec, out_info->mmio_gpio_pin[i], in ca0132_alt_select_out_quirk_set()
4573 out_info->mmio_gpio_set[i]); in ca0132_alt_select_out_quirk_set()
4577 if (out_info->scp_cmds_count) { in ca0132_alt_select_out_quirk_set()
4578 for (i = 0; i < out_info->scp_cmds_count; i++) { in ca0132_alt_select_out_quirk_set()
4579 err = dspio_set_uint_param(codec, in ca0132_alt_select_out_quirk_set()
4580 out_info->scp_cmd_mid[i], in ca0132_alt_select_out_quirk_set()
4581 out_info->scp_cmd_req[i], in ca0132_alt_select_out_quirk_set()
4582 out_info->scp_cmd_val[i]); in ca0132_alt_select_out_quirk_set()
4583 if (err < 0) in ca0132_alt_select_out_quirk_set()
4588 chipio_set_control_param(codec, 0x0d, out_info->dac2port); in ca0132_alt_select_out_quirk_set()
4590 if (out_info->has_chipio_write) { in ca0132_alt_select_out_quirk_set()
4591 chipio_write(codec, out_info->chipio_write_addr, in ca0132_alt_select_out_quirk_set()
4592 out_info->chipio_write_data); in ca0132_alt_select_out_quirk_set()
4595 if (quirk_data->has_headphone_gain) { in ca0132_alt_select_out_quirk_set()
4596 if (spec->cur_out_type != HEADPHONE_OUT) { in ca0132_alt_select_out_quirk_set()
4597 if (quirk_data->is_ae_series) in ca0132_alt_select_out_quirk_set()
4598 ae5_headphone_gain_set(codec, 2); in ca0132_alt_select_out_quirk_set()
4600 zxr_headphone_gain_set(codec, 0); in ca0132_alt_select_out_quirk_set()
4602 if (quirk_data->is_ae_series) in ca0132_alt_select_out_quirk_set()
4603 ae5_headphone_gain_set(codec, in ca0132_alt_select_out_quirk_set()
4604 spec->ae5_headphone_gain_val); in ca0132_alt_select_out_quirk_set()
4606 zxr_headphone_gain_set(codec, in ca0132_alt_select_out_quirk_set()
4607 spec->zxr_gain_set); in ca0132_alt_select_out_quirk_set()
4611 return 0; in ca0132_alt_select_out_quirk_set()
4614 static void ca0132_set_out_node_pincfg(struct hda_codec *codec, hda_nid_t nid, in ca0132_set_out_node_pincfg() argument
4619 pin_ctl = snd_hda_codec_read(codec, nid, 0, in ca0132_set_out_node_pincfg()
4620 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_set_out_node_pincfg()
4624 snd_hda_set_pin_ctl(codec, nid, pin_ctl); in ca0132_set_out_node_pincfg()
4633 * It also adds the ability to auto-detect the front headphone port.
4635 static int ca0132_alt_select_out(struct hda_codec *codec) in ca0132_alt_select_out() argument
4637 struct ca0132_spec *spec = codec->spec; in ca0132_alt_select_out()
4643 hda_nid_t headphone_nid = spec->out_pins[1]; in ca0132_alt_select_out()
4645 codec_dbg(codec, "%s\n", __func__); in ca0132_alt_select_out()
4647 snd_hda_power_up_pm(codec); in ca0132_alt_select_out()
4649 auto_jack = spec->vnode_lswitch[VNID_HP_ASEL - VNODE_START_NID]; in ca0132_alt_select_out()
4657 jack_present = snd_hda_jack_detect(codec, spec->unsol_tag_hp) || in ca0132_alt_select_out()
4658 snd_hda_jack_detect(codec, spec->unsol_tag_front_hp); in ca0132_alt_select_out()
4661 spec->cur_out_type = HEADPHONE_OUT; in ca0132_alt_select_out()
4663 spec->cur_out_type = SPEAKER_OUT; in ca0132_alt_select_out()
4665 spec->cur_out_type = spec->out_enum_val; in ca0132_alt_select_out()
4667 outfx_set = spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]; in ca0132_alt_select_out()
4670 err = dspio_set_uint_param(codec, 0x96, SPEAKER_TUNING_MUTE, FLOAT_ONE); in ca0132_alt_select_out()
4671 if (err < 0) in ca0132_alt_select_out()
4674 if (ca0132_alt_select_out_quirk_set(codec) < 0) in ca0132_alt_select_out()
4677 switch (spec->cur_out_type) { in ca0132_alt_select_out()
4679 codec_dbg(codec, "%s speaker\n", __func__); in ca0132_alt_select_out()
4682 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_alt_select_out()
4683 AC_VERB_SET_EAPD_BTLENABLE, 0x01); in ca0132_alt_select_out()
4686 ca0132_set_out_node_pincfg(codec, spec->out_pins[1], 0, 0); in ca0132_alt_select_out()
4687 /* Set front L-R to output. */ in ca0132_alt_select_out()
4688 ca0132_set_out_node_pincfg(codec, spec->out_pins[0], 1, 0); in ca0132_alt_select_out()
4690 ca0132_set_out_node_pincfg(codec, spec->out_pins[2], 1, 0); in ca0132_alt_select_out()
4692 ca0132_set_out_node_pincfg(codec, spec->out_pins[3], 1, 0); in ca0132_alt_select_out()
4699 if (!outfx_set && spec->channel_cfg_val == SPEAKER_CHANNELS_2_0) in ca0132_alt_select_out()
4702 tmp = speaker_channel_cfgs[spec->channel_cfg_val].val; in ca0132_alt_select_out()
4704 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp); in ca0132_alt_select_out()
4705 if (err < 0) in ca0132_alt_select_out()
4710 codec_dbg(codec, "%s hp\n", __func__); in ca0132_alt_select_out()
4711 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_alt_select_out()
4712 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in ca0132_alt_select_out()
4715 ca0132_set_out_node_pincfg(codec, spec->out_pins[0], 0, 0); in ca0132_alt_select_out()
4716 ca0132_set_out_node_pincfg(codec, spec->out_pins[2], 0, 0); in ca0132_alt_select_out()
4717 ca0132_set_out_node_pincfg(codec, spec->out_pins[3], 0, 0); in ca0132_alt_select_out()
4720 if (snd_hda_jack_detect(codec, spec->unsol_tag_front_hp)) in ca0132_alt_select_out()
4721 headphone_nid = spec->out_pins[2]; in ca0132_alt_select_out()
4722 else if (snd_hda_jack_detect(codec, spec->unsol_tag_hp)) in ca0132_alt_select_out()
4723 headphone_nid = spec->out_pins[1]; in ca0132_alt_select_out()
4725 ca0132_set_out_node_pincfg(codec, headphone_nid, 1, 1); in ca0132_alt_select_out()
4728 err = dspio_set_uint_param(codec, 0x80, 0x04, FLOAT_ONE); in ca0132_alt_select_out()
4730 err = dspio_set_uint_param(codec, 0x80, 0x04, FLOAT_ZERO); in ca0132_alt_select_out()
4732 if (err < 0) in ca0132_alt_select_out()
4737 * If output effects are enabled, set the X-Bass effect value again to in ca0132_alt_select_out()
4742 ca0132_effects_set(codec, X_BASS, in ca0132_alt_select_out()
4743 spec->effects_switch[X_BASS - EFFECT_START_NID]); in ca0132_alt_select_out()
4745 /* Set speaker EQ bypass attenuation to 0. */ in ca0132_alt_select_out()
4746 err = dspio_set_uint_param(codec, 0x8f, 0x01, FLOAT_ZERO); in ca0132_alt_select_out()
4747 if (err < 0) in ca0132_alt_select_out()
4754 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_select_out()
4756 if (err < 0) in ca0132_alt_select_out()
4759 if (spec->cur_out_type == SPEAKER_OUT) in ca0132_alt_select_out()
4760 err = ca0132_alt_surround_set_bass_redirection(codec, in ca0132_alt_select_out()
4761 spec->bass_redirection_val); in ca0132_alt_select_out()
4763 err = ca0132_alt_surround_set_bass_redirection(codec, 0); in ca0132_alt_select_out()
4766 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_select_out()
4768 if (err < 0) in ca0132_alt_select_out()
4771 if (spec->cur_out_type == SPEAKER_OUT) { in ca0132_alt_select_out()
4772 err = ca0132_alt_set_full_range_speaker(codec); in ca0132_alt_select_out()
4773 if (err < 0) in ca0132_alt_select_out()
4778 snd_hda_power_down_pm(codec); in ca0132_alt_select_out()
4780 return err < 0 ? err : 0; in ca0132_alt_select_out()
4790 ca0132_alt_select_out(spec->codec); in ca0132_unsol_hp_delayed()
4792 ca0132_select_out(spec->codec); in ca0132_unsol_hp_delayed()
4794 jack = snd_hda_jack_tbl_get(spec->codec, spec->unsol_tag_hp); in ca0132_unsol_hp_delayed()
4796 jack->block_report = 0; in ca0132_unsol_hp_delayed()
4797 snd_hda_jack_report_sync(spec->codec); in ca0132_unsol_hp_delayed()
4801 static void ca0132_set_dmic(struct hda_codec *codec, int enable);
4802 static int ca0132_mic_boost_set(struct hda_codec *codec, long val);
4803 static void resume_mic1(struct hda_codec *codec, unsigned int oldval);
4804 static int stop_mic1(struct hda_codec *codec);
4805 static int ca0132_cvoice_switch_set(struct hda_codec *codec);
4806 static int ca0132_alt_mic_boost_set(struct hda_codec *codec, long val);
4811 static int ca0132_set_vipsource(struct hda_codec *codec, int val) in ca0132_set_vipsource() argument
4813 struct ca0132_spec *spec = codec->spec; in ca0132_set_vipsource()
4816 if (spec->dsp_state != DSP_DOWNLOADED) in ca0132_set_vipsource()
4817 return 0; in ca0132_set_vipsource()
4819 /* if CrystalVoice if off, vipsource should be 0 */ in ca0132_set_vipsource()
4820 if (!spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] || in ca0132_set_vipsource()
4821 (val == 0)) { in ca0132_set_vipsource()
4822 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0); in ca0132_set_vipsource()
4823 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_set_vipsource()
4824 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_set_vipsource()
4825 if (spec->cur_mic_type == DIGITAL_MIC) in ca0132_set_vipsource()
4829 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_vipsource()
4831 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_set_vipsource()
4833 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_16_000); in ca0132_set_vipsource()
4834 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_16_000); in ca0132_set_vipsource()
4835 if (spec->cur_mic_type == DIGITAL_MIC) in ca0132_set_vipsource()
4839 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_vipsource()
4841 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_set_vipsource()
4843 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, val); in ca0132_set_vipsource()
4849 static int ca0132_alt_set_vipsource(struct hda_codec *codec, int val) in ca0132_alt_set_vipsource() argument
4851 struct ca0132_spec *spec = codec->spec; in ca0132_alt_set_vipsource()
4854 if (spec->dsp_state != DSP_DOWNLOADED) in ca0132_alt_set_vipsource()
4855 return 0; in ca0132_alt_set_vipsource()
4857 codec_dbg(codec, "%s\n", __func__); in ca0132_alt_set_vipsource()
4859 chipio_set_stream_control(codec, 0x03, 0); in ca0132_alt_set_vipsource()
4860 chipio_set_stream_control(codec, 0x04, 0); in ca0132_alt_set_vipsource()
4862 /* if CrystalVoice is off, vipsource should be 0 */ in ca0132_alt_set_vipsource()
4863 if (!spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] || in ca0132_alt_set_vipsource()
4864 (val == 0) || spec->in_enum_val == REAR_LINE_IN) { in ca0132_alt_set_vipsource()
4865 codec_dbg(codec, "%s: off.", __func__); in ca0132_alt_set_vipsource()
4866 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0); in ca0132_alt_set_vipsource()
4869 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_alt_set_vipsource()
4871 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_alt_set_vipsource()
4872 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_alt_set_vipsource()
4874 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_set_vipsource()
4877 if (spec->in_enum_val == REAR_LINE_IN) in ca0132_alt_set_vipsource()
4886 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_set_vipsource()
4889 codec_dbg(codec, "%s: on.", __func__); in ca0132_alt_set_vipsource()
4890 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_16_000); in ca0132_alt_set_vipsource()
4891 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_16_000); in ca0132_alt_set_vipsource()
4893 chipio_set_conn_rate(codec, 0x0F, SR_16_000); in ca0132_alt_set_vipsource()
4895 if (spec->effects_switch[VOICE_FOCUS - EFFECT_START_NID]) in ca0132_alt_set_vipsource()
4899 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_set_vipsource()
4902 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_alt_set_vipsource()
4905 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, val); in ca0132_alt_set_vipsource()
4908 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_set_vipsource()
4909 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_set_vipsource()
4917 * If jack inserted, ext.mic will be selected, else built-in mic
4920 static int ca0132_select_mic(struct hda_codec *codec) in ca0132_select_mic() argument
4922 struct ca0132_spec *spec = codec->spec; in ca0132_select_mic()
4926 codec_dbg(codec, "ca0132_select_mic\n"); in ca0132_select_mic()
4928 snd_hda_power_up_pm(codec); in ca0132_select_mic()
4930 auto_jack = spec->vnode_lswitch[VNID_AMIC1_ASEL - VNODE_START_NID]; in ca0132_select_mic()
4933 jack_present = snd_hda_jack_detect(codec, spec->unsol_tag_amic1); in ca0132_select_mic()
4936 spec->vnode_lswitch[VNID_AMIC1_SEL - VNODE_START_NID]; in ca0132_select_mic()
4939 spec->cur_mic_type = LINE_MIC_IN; in ca0132_select_mic()
4941 spec->cur_mic_type = DIGITAL_MIC; in ca0132_select_mic()
4943 if (spec->cur_mic_type == DIGITAL_MIC) { in ca0132_select_mic()
4945 chipio_set_conn_rate(codec, MEM_CONNID_DMIC, SR_32_000); in ca0132_select_mic()
4946 ca0132_set_dmic(codec, 1); in ca0132_select_mic()
4947 ca0132_mic_boost_set(codec, 0); in ca0132_select_mic()
4949 ca0132_effects_set(codec, VOICE_FOCUS, in ca0132_select_mic()
4950 spec->effects_switch in ca0132_select_mic()
4951 [VOICE_FOCUS - EFFECT_START_NID]); in ca0132_select_mic()
4954 chipio_set_conn_rate(codec, MEM_CONNID_DMIC, SR_96_000); in ca0132_select_mic()
4955 ca0132_set_dmic(codec, 0); in ca0132_select_mic()
4956 ca0132_mic_boost_set(codec, spec->cur_mic_boost); in ca0132_select_mic()
4958 ca0132_effects_set(codec, VOICE_FOCUS, 0); in ca0132_select_mic()
4961 snd_hda_power_down_pm(codec); in ca0132_select_mic()
4963 return 0; in ca0132_select_mic()
4969 * The front mic has no jack-detection, so the only way to switch to it
4972 static int ca0132_alt_select_in(struct hda_codec *codec) in ca0132_alt_select_in() argument
4974 struct ca0132_spec *spec = codec->spec; in ca0132_alt_select_in()
4977 codec_dbg(codec, "%s\n", __func__); in ca0132_alt_select_in()
4979 snd_hda_power_up_pm(codec); in ca0132_alt_select_in()
4981 chipio_set_stream_control(codec, 0x03, 0); in ca0132_alt_select_in()
4982 chipio_set_stream_control(codec, 0x04, 0); in ca0132_alt_select_in()
4984 spec->cur_mic_type = spec->in_enum_val; in ca0132_alt_select_in()
4986 switch (spec->cur_mic_type) { in ca0132_alt_select_in()
4991 ca0113_mmio_gpio_set(codec, 0, false); in ca0132_alt_select_in()
4998 r3di_gpio_mic_set(codec, R3DI_REAR_MIC); in ca0132_alt_select_in()
5002 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ca0132_alt_select_in()
5006 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ca0132_alt_select_in()
5008 chipio_set_conn_rate(codec, MEM_CONNID_MICIN2, in ca0132_alt_select_in()
5010 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT2, in ca0132_alt_select_in()
5012 dspio_set_uint_param(codec, 0x80, 0x01, FLOAT_ZERO); in ca0132_alt_select_in()
5019 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_alt_select_in()
5020 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_alt_select_in()
5022 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_select_in()
5024 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_select_in()
5026 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_select_in()
5027 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_select_in()
5030 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5031 chipio_write(codec, 0x18B09C, 0x0000000C); in ca0132_alt_select_in()
5034 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5035 chipio_write(codec, 0x18B09C, 0x000000CC); in ca0132_alt_select_in()
5038 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5039 chipio_write(codec, 0x18B09C, 0x0000004C); in ca0132_alt_select_in()
5044 ca0132_alt_mic_boost_set(codec, spec->mic_boost_enum_val); in ca0132_alt_select_in()
5047 ca0132_mic_boost_set(codec, 0); in ca0132_alt_select_in()
5051 ca0113_mmio_gpio_set(codec, 0, false); in ca0132_alt_select_in()
5054 r3di_gpio_mic_set(codec, R3DI_REAR_MIC); in ca0132_alt_select_in()
5057 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ca0132_alt_select_in()
5060 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x3f); in ca0132_alt_select_in()
5061 chipio_set_conn_rate(codec, MEM_CONNID_MICIN2, in ca0132_alt_select_in()
5063 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT2, in ca0132_alt_select_in()
5065 dspio_set_uint_param(codec, 0x80, 0x01, FLOAT_ZERO); in ca0132_alt_select_in()
5071 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_alt_select_in()
5072 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_alt_select_in()
5074 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_select_in()
5080 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_select_in()
5085 chipio_write(codec, 0x18B098, 0x00000000); in ca0132_alt_select_in()
5086 chipio_write(codec, 0x18B09C, 0x00000000); in ca0132_alt_select_in()
5091 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_select_in()
5092 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_select_in()
5098 ca0113_mmio_gpio_set(codec, 0, true); in ca0132_alt_select_in()
5099 ca0113_mmio_gpio_set(codec, 5, false); in ca0132_alt_select_in()
5103 r3di_gpio_mic_set(codec, R3DI_FRONT_MIC); in ca0132_alt_select_in()
5107 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x3f); in ca0132_alt_select_in()
5115 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_alt_select_in()
5116 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_alt_select_in()
5118 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_select_in()
5120 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_select_in()
5122 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_select_in()
5123 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_select_in()
5127 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5128 chipio_write(codec, 0x18B09C, 0x000000CC); in ca0132_alt_select_in()
5131 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5132 chipio_write(codec, 0x18B09C, 0x0000004C); in ca0132_alt_select_in()
5137 ca0132_alt_mic_boost_set(codec, spec->mic_boost_enum_val); in ca0132_alt_select_in()
5140 ca0132_cvoice_switch_set(codec); in ca0132_alt_select_in()
5142 snd_hda_power_down_pm(codec); in ca0132_alt_select_in()
5143 return 0; in ca0132_alt_select_in()
5149 static bool ca0132_is_vnode_effective(struct hda_codec *codec, in ca0132_is_vnode_effective() argument
5153 struct ca0132_spec *spec = codec->spec; in ca0132_is_vnode_effective()
5158 nid = spec->shared_out_nid; in ca0132_is_vnode_effective()
5161 nid = spec->shared_mic_nid; in ca0132_is_vnode_effective()
5175 * They return 0 if no changed. Return 1 if changed.
5177 static int ca0132_voicefx_set(struct hda_codec *codec, int enable) in ca0132_voicefx_set() argument
5179 struct ca0132_spec *spec = codec->spec; in ca0132_voicefx_set()
5184 tmp = spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] ? in ca0132_voicefx_set()
5190 dspio_set_uint_param(codec, ca0132_voicefx.mid, in ca0132_voicefx_set()
5191 ca0132_voicefx.reqs[0], tmp); in ca0132_voicefx_set()
5199 static int ca0132_effects_set(struct hda_codec *codec, hda_nid_t nid, long val) in ca0132_effects_set() argument
5201 struct ca0132_spec *spec = codec->spec; in ca0132_effects_set()
5204 int err = 0; in ca0132_effects_set()
5205 int idx = nid - EFFECT_START_NID; in ca0132_effects_set()
5207 if ((idx < 0) || (idx >= num_fx)) in ca0132_effects_set()
5208 return 0; /* no changed */ in ca0132_effects_set()
5213 if (!spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]) in ca0132_effects_set()
5214 val = 0; in ca0132_effects_set()
5215 if (spec->cur_out_type == SPEAKER_OUT && nid == X_BASS) { in ca0132_effects_set()
5216 channel_cfg = spec->channel_cfg_val; in ca0132_effects_set()
5219 val = 0; in ca0132_effects_set()
5226 if (!spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID]) in ca0132_effects_set()
5227 val = 0; in ca0132_effects_set()
5229 /* Voice Focus applies to 2-ch Mic, Digital Mic */ in ca0132_effects_set()
5230 if ((nid == VOICE_FOCUS) && (spec->cur_mic_type != DIGITAL_MIC)) in ca0132_effects_set()
5231 val = 0; in ca0132_effects_set()
5235 && (spec->cur_mic_type != REAR_LINE_IN)) { in ca0132_effects_set()
5236 if (spec->effects_switch[CRYSTAL_VOICE - in ca0132_effects_set()
5239 if (spec->effects_switch[VOICE_FOCUS - in ca0132_effects_set()
5246 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_effects_set()
5251 * to module ID 0x47. No clue why. in ca0132_effects_set()
5254 && (spec->cur_mic_type != REAR_LINE_IN)) { in ca0132_effects_set()
5255 if (spec->effects_switch[CRYSTAL_VOICE - in ca0132_effects_set()
5257 if (spec->effects_switch[NOISE_REDUCTION - in ca0132_effects_set()
5265 dspio_set_uint_param(codec, 0x47, 0x00, tmp); in ca0132_effects_set()
5270 spec->in_enum_val == REAR_LINE_IN) in ca0132_effects_set()
5271 val = 0; in ca0132_effects_set()
5274 codec_dbg(codec, "ca0132_effect_set: nid=0x%x, val=%ld\n", in ca0132_effects_set()
5277 on = (val == 0) ? FLOAT_ZERO : FLOAT_ONE; in ca0132_effects_set()
5278 err = dspio_set_uint_param(codec, ca0132_effects[idx].mid, in ca0132_effects_set()
5279 ca0132_effects[idx].reqs[0], on); in ca0132_effects_set()
5281 if (err < 0) in ca0132_effects_set()
5282 return 0; /* no changed */ in ca0132_effects_set()
5290 static int ca0132_pe_switch_set(struct hda_codec *codec) in ca0132_pe_switch_set() argument
5292 struct ca0132_spec *spec = codec->spec; in ca0132_pe_switch_set()
5294 int i, ret = 0; in ca0132_pe_switch_set()
5296 codec_dbg(codec, "ca0132_pe_switch_set: val=%ld\n", in ca0132_pe_switch_set()
5297 spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]); in ca0132_pe_switch_set()
5300 ca0132_alt_select_out(codec); in ca0132_pe_switch_set()
5302 i = OUT_EFFECT_START_NID - EFFECT_START_NID; in ca0132_pe_switch_set()
5306 ret |= ca0132_effects_set(codec, nid, spec->effects_switch[i]); in ca0132_pe_switch_set()
5312 static int stop_mic1(struct hda_codec *codec) in stop_mic1() argument
5314 struct ca0132_spec *spec = codec->spec; in stop_mic1()
5315 unsigned int oldval = snd_hda_codec_read(codec, spec->adcs[0], 0, in stop_mic1()
5316 AC_VERB_GET_CONV, 0); in stop_mic1()
5317 if (oldval != 0) in stop_mic1()
5318 snd_hda_codec_write(codec, spec->adcs[0], 0, in stop_mic1()
5320 0); in stop_mic1()
5325 static void resume_mic1(struct hda_codec *codec, unsigned int oldval) in resume_mic1() argument
5327 struct ca0132_spec *spec = codec->spec; in resume_mic1()
5329 if (oldval != 0) in resume_mic1()
5330 snd_hda_codec_write(codec, spec->adcs[0], 0, in resume_mic1()
5338 static int ca0132_cvoice_switch_set(struct hda_codec *codec) in ca0132_cvoice_switch_set() argument
5340 struct ca0132_spec *spec = codec->spec; in ca0132_cvoice_switch_set()
5342 int i, ret = 0; in ca0132_cvoice_switch_set()
5345 codec_dbg(codec, "ca0132_cvoice_switch_set: val=%ld\n", in ca0132_cvoice_switch_set()
5346 spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID]); in ca0132_cvoice_switch_set()
5348 i = IN_EFFECT_START_NID - EFFECT_START_NID; in ca0132_cvoice_switch_set()
5352 ret |= ca0132_effects_set(codec, nid, spec->effects_switch[i]); in ca0132_cvoice_switch_set()
5355 ret |= ca0132_voicefx_set(codec, (spec->voicefx_val ? 1 : 0)); in ca0132_cvoice_switch_set()
5358 oldval = stop_mic1(codec); in ca0132_cvoice_switch_set()
5360 ret |= ca0132_alt_set_vipsource(codec, 1); in ca0132_cvoice_switch_set()
5362 ret |= ca0132_set_vipsource(codec, 1); in ca0132_cvoice_switch_set()
5363 resume_mic1(codec, oldval); in ca0132_cvoice_switch_set()
5367 static int ca0132_mic_boost_set(struct hda_codec *codec, long val) in ca0132_mic_boost_set() argument
5369 struct ca0132_spec *spec = codec->spec; in ca0132_mic_boost_set()
5370 int ret = 0; in ca0132_mic_boost_set()
5373 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0, in ca0132_mic_boost_set()
5374 HDA_INPUT, 0, HDA_AMP_VOLMASK, 3); in ca0132_mic_boost_set()
5376 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0, in ca0132_mic_boost_set()
5377 HDA_INPUT, 0, HDA_AMP_VOLMASK, 0); in ca0132_mic_boost_set()
5382 static int ca0132_alt_mic_boost_set(struct hda_codec *codec, long val) in ca0132_alt_mic_boost_set() argument
5384 struct ca0132_spec *spec = codec->spec; in ca0132_alt_mic_boost_set()
5385 int ret = 0; in ca0132_alt_mic_boost_set()
5387 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0, in ca0132_alt_mic_boost_set()
5388 HDA_INPUT, 0, HDA_AMP_VOLMASK, val); in ca0132_alt_mic_boost_set()
5392 static int ae5_headphone_gain_set(struct hda_codec *codec, long val) in ae5_headphone_gain_set() argument
5396 for (i = 0; i < 4; i++) in ae5_headphone_gain_set()
5397 ca0113_mmio_command_set(codec, 0x48, 0x11 + i, in ae5_headphone_gain_set()
5399 return 0; in ae5_headphone_gain_set()
5406 static int zxr_headphone_gain_set(struct hda_codec *codec, long val) in zxr_headphone_gain_set() argument
5408 ca0113_mmio_gpio_set(codec, 1, val); in zxr_headphone_gain_set()
5410 return 0; in zxr_headphone_gain_set()
5416 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_vnode_switch_set() local
5418 hda_nid_t shared_nid = 0; in ca0132_vnode_switch_set()
5420 int ret = 0; in ca0132_vnode_switch_set()
5421 struct ca0132_spec *spec = codec->spec; in ca0132_vnode_switch_set()
5426 spec->vnode_lswitch[VNID_HP_ASEL - VNODE_START_NID]; in ca0132_vnode_switch_set()
5429 ca0132_alt_select_out(codec); in ca0132_vnode_switch_set()
5431 ca0132_select_out(codec); in ca0132_vnode_switch_set()
5438 spec->vnode_lswitch[VNID_AMIC1_ASEL - VNODE_START_NID]; in ca0132_vnode_switch_set()
5440 ca0132_select_mic(codec); in ca0132_vnode_switch_set()
5446 ca0132_alt_select_out(codec); in ca0132_vnode_switch_set()
5448 ca0132_select_out(codec); in ca0132_vnode_switch_set()
5453 ca0132_select_mic(codec); in ca0132_vnode_switch_set()
5458 effective = ca0132_is_vnode_effective(codec, nid, &shared_nid); in ca0132_vnode_switch_set()
5464 mutex_lock(&codec->control_mutex); in ca0132_vnode_switch_set()
5465 pval = kcontrol->private_value; in ca0132_vnode_switch_set()
5466 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(shared_nid, ch, in ca0132_vnode_switch_set()
5467 0, dir); in ca0132_vnode_switch_set()
5469 kcontrol->private_value = pval; in ca0132_vnode_switch_set()
5470 mutex_unlock(&codec->control_mutex); in ca0132_vnode_switch_set()
5477 static void ca0132_alt_bass_redirection_xover_set(struct hda_codec *codec, in ca0132_alt_bass_redirection_xover_set() argument
5480 snd_hda_power_up(codec); in ca0132_alt_bass_redirection_xover_set()
5482 dspio_set_param(codec, 0x96, 0x20, SPEAKER_BASS_REDIRECT_XOVER_FREQ, in ca0132_alt_bass_redirection_xover_set()
5485 snd_hda_power_down(codec); in ca0132_alt_bass_redirection_xover_set()
5497 static int ca0132_alt_slider_ctl_set(struct hda_codec *codec, hda_nid_t nid, in ca0132_alt_slider_ctl_set() argument
5500 int i = 0; in ca0132_alt_slider_ctl_set()
5511 snd_hda_power_up(codec); in ca0132_alt_slider_ctl_set()
5513 for (i = 0; i < OUT_EFFECTS_COUNT; i++) in ca0132_alt_slider_ctl_set()
5517 dspio_set_param(codec, ca0132_effects[i].mid, 0x20, in ca0132_alt_slider_ctl_set()
5519 &(lookup[idx - 1]), sizeof(unsigned int)); in ca0132_alt_slider_ctl_set()
5522 for (i = 0; i < OUT_EFFECTS_COUNT; i++) in ca0132_alt_slider_ctl_set()
5526 dspio_set_param(codec, ca0132_effects[i].mid, 0x20, in ca0132_alt_slider_ctl_set()
5531 snd_hda_power_down(codec); in ca0132_alt_slider_ctl_set()
5533 return 0; in ca0132_alt_slider_ctl_set()
5539 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_xbass_xover_slider_ctl_get() local
5540 struct ca0132_spec *spec = codec->spec; in ca0132_alt_xbass_xover_slider_ctl_get()
5541 long *valp = ucontrol->value.integer.value; in ca0132_alt_xbass_xover_slider_ctl_get()
5545 *valp = spec->bass_redirect_xover_freq; in ca0132_alt_xbass_xover_slider_ctl_get()
5547 *valp = spec->xbass_xover_freq; in ca0132_alt_xbass_xover_slider_ctl_get()
5549 return 0; in ca0132_alt_xbass_xover_slider_ctl_get()
5555 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_slider_ctl_get() local
5556 struct ca0132_spec *spec = codec->spec; in ca0132_alt_slider_ctl_get()
5558 long *valp = ucontrol->value.integer.value; in ca0132_alt_slider_ctl_get()
5559 int idx = nid - OUT_EFFECT_START_NID; in ca0132_alt_slider_ctl_get()
5561 *valp = spec->fx_ctl_val[idx]; in ca0132_alt_slider_ctl_get()
5562 return 0; in ca0132_alt_slider_ctl_get()
5566 * The X-bass crossover starts at 10hz, so the min is 1. The
5572 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in ca0132_alt_xbass_xover_slider_info()
5573 uinfo->count = 1; in ca0132_alt_xbass_xover_slider_info()
5574 uinfo->value.integer.min = 1; in ca0132_alt_xbass_xover_slider_info()
5575 uinfo->value.integer.max = 100; in ca0132_alt_xbass_xover_slider_info()
5576 uinfo->value.integer.step = 1; in ca0132_alt_xbass_xover_slider_info()
5578 return 0; in ca0132_alt_xbass_xover_slider_info()
5586 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in ca0132_alt_effect_slider_info()
5587 uinfo->count = chs == 3 ? 2 : 1; in ca0132_alt_effect_slider_info()
5588 uinfo->value.integer.min = 0; in ca0132_alt_effect_slider_info()
5589 uinfo->value.integer.max = 100; in ca0132_alt_effect_slider_info()
5590 uinfo->value.integer.step = 1; in ca0132_alt_effect_slider_info()
5592 return 0; in ca0132_alt_effect_slider_info()
5598 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_xbass_xover_slider_put() local
5599 struct ca0132_spec *spec = codec->spec; in ca0132_alt_xbass_xover_slider_put()
5601 long *valp = ucontrol->value.integer.value; in ca0132_alt_xbass_xover_slider_put()
5606 cur_val = &spec->bass_redirect_xover_freq; in ca0132_alt_xbass_xover_slider_put()
5608 cur_val = &spec->xbass_xover_freq; in ca0132_alt_xbass_xover_slider_put()
5612 return 0; in ca0132_alt_xbass_xover_slider_put()
5618 ca0132_alt_bass_redirection_xover_set(codec, *cur_val); in ca0132_alt_xbass_xover_slider_put()
5620 ca0132_alt_slider_ctl_set(codec, nid, float_xbass_xover_lookup, idx); in ca0132_alt_xbass_xover_slider_put()
5622 return 0; in ca0132_alt_xbass_xover_slider_put()
5628 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_effect_slider_put() local
5629 struct ca0132_spec *spec = codec->spec; in ca0132_alt_effect_slider_put()
5631 long *valp = ucontrol->value.integer.value; in ca0132_alt_effect_slider_put()
5634 idx = nid - EFFECT_START_NID; in ca0132_alt_effect_slider_put()
5636 if (spec->fx_ctl_val[idx] == *valp) in ca0132_alt_effect_slider_put()
5637 return 0; in ca0132_alt_effect_slider_put()
5639 spec->fx_ctl_val[idx] = *valp; in ca0132_alt_effect_slider_put()
5642 ca0132_alt_slider_ctl_set(codec, nid, float_zero_to_one_lookup, idx); in ca0132_alt_effect_slider_put()
5644 return 0; in ca0132_alt_effect_slider_put()
5651 * traditional 0-100 in alsamixer that goes in big steps. I like enum better.
5662 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_alt_mic_boost_info()
5663 uinfo->count = 1; in ca0132_alt_mic_boost_info()
5664 uinfo->value.enumerated.items = MIC_BOOST_NUM_OF_STEPS; in ca0132_alt_mic_boost_info()
5665 if (uinfo->value.enumerated.item >= MIC_BOOST_NUM_OF_STEPS) in ca0132_alt_mic_boost_info()
5666 uinfo->value.enumerated.item = MIC_BOOST_NUM_OF_STEPS - 1; in ca0132_alt_mic_boost_info()
5667 sprintf(namestr, "%d %s", (uinfo->value.enumerated.item * 10), sfx); in ca0132_alt_mic_boost_info()
5668 strcpy(uinfo->value.enumerated.name, namestr); in ca0132_alt_mic_boost_info()
5669 return 0; in ca0132_alt_mic_boost_info()
5675 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_mic_boost_get() local
5676 struct ca0132_spec *spec = codec->spec; in ca0132_alt_mic_boost_get()
5678 ucontrol->value.enumerated.item[0] = spec->mic_boost_enum_val; in ca0132_alt_mic_boost_get()
5679 return 0; in ca0132_alt_mic_boost_get()
5685 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_mic_boost_put() local
5686 struct ca0132_spec *spec = codec->spec; in ca0132_alt_mic_boost_put()
5687 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_mic_boost_put()
5691 return 0; in ca0132_alt_mic_boost_put()
5693 codec_dbg(codec, "ca0132_alt_mic_boost: boost=%d\n", in ca0132_alt_mic_boost_put()
5696 spec->mic_boost_enum_val = sel; in ca0132_alt_mic_boost_put()
5698 if (spec->in_enum_val != REAR_LINE_IN) in ca0132_alt_mic_boost_put()
5699 ca0132_alt_mic_boost_set(codec, spec->mic_boost_enum_val); in ca0132_alt_mic_boost_put()
5705 * Sound BlasterX AE-5 Headphone Gain Controls.
5714 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ae5_headphone_gain_info()
5715 uinfo->count = 1; in ae5_headphone_gain_info()
5716 uinfo->value.enumerated.items = AE5_HEADPHONE_GAIN_MAX; in ae5_headphone_gain_info()
5717 if (uinfo->value.enumerated.item >= AE5_HEADPHONE_GAIN_MAX) in ae5_headphone_gain_info()
5718 uinfo->value.enumerated.item = AE5_HEADPHONE_GAIN_MAX - 1; in ae5_headphone_gain_info()
5720 ae5_headphone_gain_presets[uinfo->value.enumerated.item].name, in ae5_headphone_gain_info()
5722 strcpy(uinfo->value.enumerated.name, namestr); in ae5_headphone_gain_info()
5723 return 0; in ae5_headphone_gain_info()
5729 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ae5_headphone_gain_get() local
5730 struct ca0132_spec *spec = codec->spec; in ae5_headphone_gain_get()
5732 ucontrol->value.enumerated.item[0] = spec->ae5_headphone_gain_val; in ae5_headphone_gain_get()
5733 return 0; in ae5_headphone_gain_get()
5739 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ae5_headphone_gain_put() local
5740 struct ca0132_spec *spec = codec->spec; in ae5_headphone_gain_put()
5741 int sel = ucontrol->value.enumerated.item[0]; in ae5_headphone_gain_put()
5745 return 0; in ae5_headphone_gain_put()
5747 codec_dbg(codec, "ae5_headphone_gain: boost=%d\n", in ae5_headphone_gain_put()
5750 spec->ae5_headphone_gain_val = sel; in ae5_headphone_gain_put()
5752 if (spec->out_enum_val == HEADPHONE_OUT) in ae5_headphone_gain_put()
5753 ae5_headphone_gain_set(codec, spec->ae5_headphone_gain_val); in ae5_headphone_gain_put()
5759 * Sound BlasterX AE-5 sound filter enumerated control.
5768 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ae5_sound_filter_info()
5769 uinfo->count = 1; in ae5_sound_filter_info()
5770 uinfo->value.enumerated.items = AE5_SOUND_FILTER_MAX; in ae5_sound_filter_info()
5771 if (uinfo->value.enumerated.item >= AE5_SOUND_FILTER_MAX) in ae5_sound_filter_info()
5772 uinfo->value.enumerated.item = AE5_SOUND_FILTER_MAX - 1; in ae5_sound_filter_info()
5774 ae5_filter_presets[uinfo->value.enumerated.item].name); in ae5_sound_filter_info()
5775 strcpy(uinfo->value.enumerated.name, namestr); in ae5_sound_filter_info()
5776 return 0; in ae5_sound_filter_info()
5782 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ae5_sound_filter_get() local
5783 struct ca0132_spec *spec = codec->spec; in ae5_sound_filter_get()
5785 ucontrol->value.enumerated.item[0] = spec->ae5_filter_val; in ae5_sound_filter_get()
5786 return 0; in ae5_sound_filter_get()
5792 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ae5_sound_filter_put() local
5793 struct ca0132_spec *spec = codec->spec; in ae5_sound_filter_put()
5794 int sel = ucontrol->value.enumerated.item[0]; in ae5_sound_filter_put()
5798 return 0; in ae5_sound_filter_put()
5800 codec_dbg(codec, "ae5_sound_filter: %s\n", in ae5_sound_filter_put()
5803 spec->ae5_filter_val = sel; in ae5_sound_filter_put()
5805 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, in ae5_sound_filter_put()
5813 * front microphone has no auto-detect, and we need a way to set the rear
5814 * as line-in
5819 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_alt_input_source_info()
5820 uinfo->count = 1; in ca0132_alt_input_source_info()
5821 uinfo->value.enumerated.items = IN_SRC_NUM_OF_INPUTS; in ca0132_alt_input_source_info()
5822 if (uinfo->value.enumerated.item >= IN_SRC_NUM_OF_INPUTS) in ca0132_alt_input_source_info()
5823 uinfo->value.enumerated.item = IN_SRC_NUM_OF_INPUTS - 1; in ca0132_alt_input_source_info()
5824 strcpy(uinfo->value.enumerated.name, in ca0132_alt_input_source_info()
5825 in_src_str[uinfo->value.enumerated.item]); in ca0132_alt_input_source_info()
5826 return 0; in ca0132_alt_input_source_info()
5832 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_input_source_get() local
5833 struct ca0132_spec *spec = codec->spec; in ca0132_alt_input_source_get()
5835 ucontrol->value.enumerated.item[0] = spec->in_enum_val; in ca0132_alt_input_source_get()
5836 return 0; in ca0132_alt_input_source_get()
5842 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_input_source_put() local
5843 struct ca0132_spec *spec = codec->spec; in ca0132_alt_input_source_put()
5844 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_input_source_put()
5848 * The AE-7 has no front microphone, so limit items to 2: rear mic and in ca0132_alt_input_source_put()
5849 * line-in. in ca0132_alt_input_source_put()
5855 return 0; in ca0132_alt_input_source_put()
5857 codec_dbg(codec, "ca0132_alt_input_select: sel=%d, preset=%s\n", in ca0132_alt_input_source_put()
5860 spec->in_enum_val = sel; in ca0132_alt_input_source_put()
5862 ca0132_alt_select_in(codec); in ca0132_alt_input_source_put()
5871 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_alt_output_select_get_info()
5872 uinfo->count = 1; in ca0132_alt_output_select_get_info()
5873 uinfo->value.enumerated.items = NUM_OF_OUTPUTS; in ca0132_alt_output_select_get_info()
5874 if (uinfo->value.enumerated.item >= NUM_OF_OUTPUTS) in ca0132_alt_output_select_get_info()
5875 uinfo->value.enumerated.item = NUM_OF_OUTPUTS - 1; in ca0132_alt_output_select_get_info()
5876 strcpy(uinfo->value.enumerated.name, in ca0132_alt_output_select_get_info()
5877 out_type_str[uinfo->value.enumerated.item]); in ca0132_alt_output_select_get_info()
5878 return 0; in ca0132_alt_output_select_get_info()
5884 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_output_select_get() local
5885 struct ca0132_spec *spec = codec->spec; in ca0132_alt_output_select_get()
5887 ucontrol->value.enumerated.item[0] = spec->out_enum_val; in ca0132_alt_output_select_get()
5888 return 0; in ca0132_alt_output_select_get()
5894 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_output_select_put() local
5895 struct ca0132_spec *spec = codec->spec; in ca0132_alt_output_select_put()
5896 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_output_select_put()
5901 return 0; in ca0132_alt_output_select_put()
5903 codec_dbg(codec, "ca0132_alt_output_select: sel=%d, preset=%s\n", in ca0132_alt_output_select_put()
5906 spec->out_enum_val = sel; in ca0132_alt_output_select_put()
5908 auto_jack = spec->vnode_lswitch[VNID_HP_ASEL - VNODE_START_NID]; in ca0132_alt_output_select_put()
5911 ca0132_alt_select_out(codec); in ca0132_alt_output_select_put()
5922 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_alt_speaker_channel_cfg_get_info()
5923 uinfo->count = 1; in ca0132_alt_speaker_channel_cfg_get_info()
5924 uinfo->value.enumerated.items = items; in ca0132_alt_speaker_channel_cfg_get_info()
5925 if (uinfo->value.enumerated.item >= items) in ca0132_alt_speaker_channel_cfg_get_info()
5926 uinfo->value.enumerated.item = items - 1; in ca0132_alt_speaker_channel_cfg_get_info()
5927 strcpy(uinfo->value.enumerated.name, in ca0132_alt_speaker_channel_cfg_get_info()
5928 speaker_channel_cfgs[uinfo->value.enumerated.item].name); in ca0132_alt_speaker_channel_cfg_get_info()
5929 return 0; in ca0132_alt_speaker_channel_cfg_get_info()
5935 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_speaker_channel_cfg_get() local
5936 struct ca0132_spec *spec = codec->spec; in ca0132_alt_speaker_channel_cfg_get()
5938 ucontrol->value.enumerated.item[0] = spec->channel_cfg_val; in ca0132_alt_speaker_channel_cfg_get()
5939 return 0; in ca0132_alt_speaker_channel_cfg_get()
5945 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_speaker_channel_cfg_put() local
5946 struct ca0132_spec *spec = codec->spec; in ca0132_alt_speaker_channel_cfg_put()
5947 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_speaker_channel_cfg_put()
5951 return 0; in ca0132_alt_speaker_channel_cfg_put()
5953 codec_dbg(codec, "ca0132_alt_speaker_channels: sel=%d, channels=%s\n", in ca0132_alt_speaker_channel_cfg_put()
5956 spec->channel_cfg_val = sel; in ca0132_alt_speaker_channel_cfg_put()
5958 if (spec->out_enum_val == SPEAKER_OUT) in ca0132_alt_speaker_channel_cfg_put()
5959 ca0132_alt_select_out(codec); in ca0132_alt_speaker_channel_cfg_put()
5975 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_alt_svm_setting_info()
5976 uinfo->count = 1; in ca0132_alt_svm_setting_info()
5977 uinfo->value.enumerated.items = NUM_OF_SVM_SETTINGS; in ca0132_alt_svm_setting_info()
5978 if (uinfo->value.enumerated.item >= NUM_OF_SVM_SETTINGS) in ca0132_alt_svm_setting_info()
5979 uinfo->value.enumerated.item = NUM_OF_SVM_SETTINGS - 1; in ca0132_alt_svm_setting_info()
5980 strcpy(uinfo->value.enumerated.name, in ca0132_alt_svm_setting_info()
5981 out_svm_set_enum_str[uinfo->value.enumerated.item]); in ca0132_alt_svm_setting_info()
5982 return 0; in ca0132_alt_svm_setting_info()
5988 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_svm_setting_get() local
5989 struct ca0132_spec *spec = codec->spec; in ca0132_alt_svm_setting_get()
5991 ucontrol->value.enumerated.item[0] = spec->smart_volume_setting; in ca0132_alt_svm_setting_get()
5992 return 0; in ca0132_alt_svm_setting_get()
5998 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_svm_setting_put() local
5999 struct ca0132_spec *spec = codec->spec; in ca0132_alt_svm_setting_put()
6000 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_svm_setting_put()
6002 unsigned int idx = SMART_VOLUME - EFFECT_START_NID; in ca0132_alt_svm_setting_put()
6006 return 0; in ca0132_alt_svm_setting_put()
6008 codec_dbg(codec, "ca0132_alt_svm_setting: sel=%d, preset=%s\n", in ca0132_alt_svm_setting_put()
6011 spec->smart_volume_setting = sel; in ca0132_alt_svm_setting_put()
6014 case 0: in ca0132_alt_svm_setting_put()
6028 dspio_set_uint_param(codec, ca0132_effects[idx].mid, in ca0132_alt_svm_setting_put()
6039 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_alt_eq_preset_info()
6040 uinfo->count = 1; in ca0132_alt_eq_preset_info()
6041 uinfo->value.enumerated.items = items; in ca0132_alt_eq_preset_info()
6042 if (uinfo->value.enumerated.item >= items) in ca0132_alt_eq_preset_info()
6043 uinfo->value.enumerated.item = items - 1; in ca0132_alt_eq_preset_info()
6044 strcpy(uinfo->value.enumerated.name, in ca0132_alt_eq_preset_info()
6045 ca0132_alt_eq_presets[uinfo->value.enumerated.item].name); in ca0132_alt_eq_preset_info()
6046 return 0; in ca0132_alt_eq_preset_info()
6052 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_eq_preset_get() local
6053 struct ca0132_spec *spec = codec->spec; in ca0132_alt_eq_preset_get()
6055 ucontrol->value.enumerated.item[0] = spec->eq_preset_val; in ca0132_alt_eq_preset_get()
6056 return 0; in ca0132_alt_eq_preset_get()
6062 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_eq_preset_put() local
6063 struct ca0132_spec *spec = codec->spec; in ca0132_alt_eq_preset_put()
6064 int i, err = 0; in ca0132_alt_eq_preset_put()
6065 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_eq_preset_put()
6069 return 0; in ca0132_alt_eq_preset_put()
6071 codec_dbg(codec, "%s: sel=%d, preset=%s\n", __func__, sel, in ca0132_alt_eq_preset_put()
6074 * Idx 0 is default. in ca0132_alt_eq_preset_put()
6077 for (i = 0; i < EQ_PRESET_MAX_PARAM_COUNT; i++) { in ca0132_alt_eq_preset_put()
6078 err = dspio_set_uint_param(codec, ca0132_alt_eq_enum.mid, in ca0132_alt_eq_preset_put()
6081 if (err < 0) in ca0132_alt_eq_preset_put()
6085 if (err >= 0) in ca0132_alt_eq_preset_put()
6086 spec->eq_preset_val = sel; in ca0132_alt_eq_preset_put()
6096 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_voicefx_info()
6097 uinfo->count = 1; in ca0132_voicefx_info()
6098 uinfo->value.enumerated.items = items; in ca0132_voicefx_info()
6099 if (uinfo->value.enumerated.item >= items) in ca0132_voicefx_info()
6100 uinfo->value.enumerated.item = items - 1; in ca0132_voicefx_info()
6101 strcpy(uinfo->value.enumerated.name, in ca0132_voicefx_info()
6102 ca0132_voicefx_presets[uinfo->value.enumerated.item].name); in ca0132_voicefx_info()
6103 return 0; in ca0132_voicefx_info()
6109 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_voicefx_get() local
6110 struct ca0132_spec *spec = codec->spec; in ca0132_voicefx_get()
6112 ucontrol->value.enumerated.item[0] = spec->voicefx_val; in ca0132_voicefx_get()
6113 return 0; in ca0132_voicefx_get()
6119 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_voicefx_put() local
6120 struct ca0132_spec *spec = codec->spec; in ca0132_voicefx_put()
6121 int i, err = 0; in ca0132_voicefx_put()
6122 int sel = ucontrol->value.enumerated.item[0]; in ca0132_voicefx_put()
6125 return 0; in ca0132_voicefx_put()
6127 codec_dbg(codec, "ca0132_voicefx_put: sel=%d, preset=%s\n", in ca0132_voicefx_put()
6131 * Idx 0 is default. in ca0132_voicefx_put()
6134 for (i = 0; i < VOICEFX_MAX_PARAM_COUNT; i++) { in ca0132_voicefx_put()
6135 err = dspio_set_uint_param(codec, ca0132_voicefx.mid, in ca0132_voicefx_put()
6138 if (err < 0) in ca0132_voicefx_put()
6142 if (err >= 0) { in ca0132_voicefx_put()
6143 spec->voicefx_val = sel; in ca0132_voicefx_put()
6145 ca0132_voicefx_set(codec, (sel ? 1 : 0)); in ca0132_voicefx_put()
6154 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_switch_get() local
6155 struct ca0132_spec *spec = codec->spec; in ca0132_switch_get()
6158 long *valp = ucontrol->value.integer.value; in ca0132_switch_get()
6163 *valp = spec->vnode_lswitch[nid - VNODE_START_NID]; in ca0132_switch_get()
6167 *valp = spec->vnode_rswitch[nid - VNODE_START_NID]; in ca0132_switch_get()
6170 return 0; in ca0132_switch_get()
6175 *valp = spec->effects_switch[nid - EFFECT_START_NID]; in ca0132_switch_get()
6176 return 0; in ca0132_switch_get()
6180 if (nid == spec->input_pins[0]) { in ca0132_switch_get()
6181 *valp = spec->cur_mic_boost; in ca0132_switch_get()
6182 return 0; in ca0132_switch_get()
6186 *valp = spec->zxr_gain_set; in ca0132_switch_get()
6187 return 0; in ca0132_switch_get()
6191 *valp = spec->speaker_range_val[nid - SPEAKER_FULL_RANGE_FRONT]; in ca0132_switch_get()
6192 return 0; in ca0132_switch_get()
6196 *valp = spec->bass_redirection_val; in ca0132_switch_get()
6197 return 0; in ca0132_switch_get()
6200 return 0; in ca0132_switch_get()
6206 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_switch_put() local
6207 struct ca0132_spec *spec = codec->spec; in ca0132_switch_put()
6210 long *valp = ucontrol->value.integer.value; in ca0132_switch_put()
6213 codec_dbg(codec, "ca0132_switch_put: nid=0x%x, val=%ld\n", in ca0132_switch_put()
6216 snd_hda_power_up(codec); in ca0132_switch_put()
6220 spec->vnode_lswitch[nid - VNODE_START_NID] = *valp; in ca0132_switch_put()
6224 spec->vnode_rswitch[nid - VNODE_START_NID] = *valp; in ca0132_switch_put()
6233 spec->effects_switch[nid - EFFECT_START_NID] = *valp; in ca0132_switch_put()
6234 changed = ca0132_pe_switch_set(codec); in ca0132_switch_put()
6240 spec->effects_switch[nid - EFFECT_START_NID] = *valp; in ca0132_switch_put()
6241 changed = ca0132_cvoice_switch_set(codec); in ca0132_switch_put()
6248 spec->effects_switch[nid - EFFECT_START_NID] = *valp; in ca0132_switch_put()
6249 changed = ca0132_effects_set(codec, nid, *valp); in ca0132_switch_put()
6254 if (nid == spec->input_pins[0]) { in ca0132_switch_put()
6255 spec->cur_mic_boost = *valp; in ca0132_switch_put()
6257 if (spec->in_enum_val != REAR_LINE_IN) in ca0132_switch_put()
6258 changed = ca0132_mic_boost_set(codec, *valp); in ca0132_switch_put()
6261 if (spec->cur_mic_type != DIGITAL_MIC) in ca0132_switch_put()
6262 changed = ca0132_mic_boost_set(codec, *valp); in ca0132_switch_put()
6269 spec->zxr_gain_set = *valp; in ca0132_switch_put()
6270 if (spec->cur_out_type == HEADPHONE_OUT) in ca0132_switch_put()
6271 changed = zxr_headphone_gain_set(codec, *valp); in ca0132_switch_put()
6273 changed = 0; in ca0132_switch_put()
6279 spec->speaker_range_val[nid - SPEAKER_FULL_RANGE_FRONT] = *valp; in ca0132_switch_put()
6280 if (spec->cur_out_type == SPEAKER_OUT) in ca0132_switch_put()
6281 ca0132_alt_set_full_range_speaker(codec); in ca0132_switch_put()
6283 changed = 0; in ca0132_switch_put()
6287 spec->bass_redirection_val = *valp; in ca0132_switch_put()
6288 if (spec->cur_out_type == SPEAKER_OUT) in ca0132_switch_put()
6289 ca0132_alt_surround_set_bass_redirection(codec, *valp); in ca0132_switch_put()
6291 changed = 0; in ca0132_switch_put()
6295 snd_hda_power_down(codec); in ca0132_switch_put()
6307 static void ca0132_alt_dsp_volume_put(struct hda_codec *codec, hda_nid_t nid) in ca0132_alt_dsp_volume_put() argument
6309 struct ca0132_spec *spec = codec->spec; in ca0132_alt_dsp_volume_put()
6318 lookup_val = spec->vnode_lvol[nid - VNODE_START_NID]; in ca0132_alt_dsp_volume_put()
6320 dspio_set_uint_param(codec, in ca0132_alt_dsp_volume_put()
6322 ca0132_alt_vol_ctls[dsp_dir].reqs[0], in ca0132_alt_dsp_volume_put()
6325 lookup_val = spec->vnode_rvol[nid - VNODE_START_NID]; in ca0132_alt_dsp_volume_put()
6327 dspio_set_uint_param(codec, in ca0132_alt_dsp_volume_put()
6332 dspio_set_uint_param(codec, in ca0132_alt_dsp_volume_put()
6340 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_volume_info() local
6341 struct ca0132_spec *spec = codec->spec; in ca0132_volume_info()
6351 nid = spec->shared_out_nid; in ca0132_volume_info()
6352 mutex_lock(&codec->control_mutex); in ca0132_volume_info()
6353 pval = kcontrol->private_value; in ca0132_volume_info()
6354 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_info()
6356 kcontrol->private_value = pval; in ca0132_volume_info()
6357 mutex_unlock(&codec->control_mutex); in ca0132_volume_info()
6361 nid = spec->shared_mic_nid; in ca0132_volume_info()
6362 mutex_lock(&codec->control_mutex); in ca0132_volume_info()
6363 pval = kcontrol->private_value; in ca0132_volume_info()
6364 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_info()
6366 kcontrol->private_value = pval; in ca0132_volume_info()
6367 mutex_unlock(&codec->control_mutex); in ca0132_volume_info()
6378 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_volume_get() local
6379 struct ca0132_spec *spec = codec->spec; in ca0132_volume_get()
6382 long *valp = ucontrol->value.integer.value; in ca0132_volume_get()
6386 *valp = spec->vnode_lvol[nid - VNODE_START_NID]; in ca0132_volume_get()
6390 *valp = spec->vnode_rvol[nid - VNODE_START_NID]; in ca0132_volume_get()
6393 return 0; in ca0132_volume_get()
6399 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_volume_put() local
6400 struct ca0132_spec *spec = codec->spec; in ca0132_volume_put()
6403 long *valp = ucontrol->value.integer.value; in ca0132_volume_put()
6404 hda_nid_t shared_nid = 0; in ca0132_volume_put()
6410 spec->vnode_lvol[nid - VNODE_START_NID] = *valp; in ca0132_volume_put()
6414 spec->vnode_rvol[nid - VNODE_START_NID] = *valp; in ca0132_volume_put()
6419 effective = ca0132_is_vnode_effective(codec, nid, &shared_nid); in ca0132_volume_put()
6424 snd_hda_power_up(codec); in ca0132_volume_put()
6425 mutex_lock(&codec->control_mutex); in ca0132_volume_put()
6426 pval = kcontrol->private_value; in ca0132_volume_put()
6427 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(shared_nid, ch, in ca0132_volume_put()
6428 0, dir); in ca0132_volume_put()
6430 kcontrol->private_value = pval; in ca0132_volume_put()
6431 mutex_unlock(&codec->control_mutex); in ca0132_volume_put()
6432 snd_hda_power_down(codec); in ca0132_volume_put()
6446 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_volume_put() local
6447 struct ca0132_spec *spec = codec->spec; in ca0132_alt_volume_put()
6450 long *valp = ucontrol->value.integer.value; in ca0132_alt_volume_put()
6451 hda_nid_t vnid = 0; in ca0132_alt_volume_put()
6455 case 0x02: in ca0132_alt_volume_put()
6458 case 0x07: in ca0132_alt_volume_put()
6465 spec->vnode_lvol[vnid - VNODE_START_NID] = *valp; in ca0132_alt_volume_put()
6469 spec->vnode_rvol[vnid - VNODE_START_NID] = *valp; in ca0132_alt_volume_put()
6473 snd_hda_power_up(codec); in ca0132_alt_volume_put()
6474 ca0132_alt_dsp_volume_put(codec, vnid); in ca0132_alt_volume_put()
6475 mutex_lock(&codec->control_mutex); in ca0132_alt_volume_put()
6477 mutex_unlock(&codec->control_mutex); in ca0132_alt_volume_put()
6478 snd_hda_power_down(codec); in ca0132_alt_volume_put()
6486 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_volume_tlv() local
6487 struct ca0132_spec *spec = codec->spec; in ca0132_volume_tlv()
6497 nid = spec->shared_out_nid; in ca0132_volume_tlv()
6498 mutex_lock(&codec->control_mutex); in ca0132_volume_tlv()
6499 pval = kcontrol->private_value; in ca0132_volume_tlv()
6500 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_tlv()
6502 kcontrol->private_value = pval; in ca0132_volume_tlv()
6503 mutex_unlock(&codec->control_mutex); in ca0132_volume_tlv()
6507 nid = spec->shared_mic_nid; in ca0132_volume_tlv()
6508 mutex_lock(&codec->control_mutex); in ca0132_volume_tlv()
6509 pval = kcontrol->private_value; in ca0132_volume_tlv()
6510 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_tlv()
6512 kcontrol->private_value = pval; in ca0132_volume_tlv()
6513 mutex_unlock(&codec->control_mutex); in ca0132_volume_tlv()
6522 static int ca0132_alt_add_effect_slider(struct hda_codec *codec, hda_nid_t nid, in ca0132_alt_add_effect_slider() argument
6528 HDA_CODEC_VOLUME_MONO(namestr, nid, 1, 0, type); in ca0132_alt_add_effect_slider()
6545 HDA_COMPOSE_AMP_VAL(nid, 1, 0, type); in ca0132_alt_add_effect_slider()
6549 return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec)); in ca0132_alt_add_effect_slider()
6557 static int add_fx_switch(struct hda_codec *codec, hda_nid_t nid, in add_fx_switch() argument
6560 struct ca0132_spec *spec = codec->spec; in add_fx_switch()
6573 return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec)); in add_fx_switch()
6576 static int add_voicefx(struct hda_codec *codec) in add_voicefx() argument
6580 VOICEFX, 1, 0, HDA_INPUT); in add_voicefx()
6584 return snd_hda_ctl_add(codec, VOICEFX, snd_ctl_new1(&knew, codec)); in add_voicefx()
6588 static int add_ca0132_alt_eq_presets(struct hda_codec *codec) in add_ca0132_alt_eq_presets() argument
6592 EQ_PRESET_ENUM, 1, 0, HDA_OUTPUT); in add_ca0132_alt_eq_presets()
6596 return snd_hda_ctl_add(codec, EQ_PRESET_ENUM, in add_ca0132_alt_eq_presets()
6597 snd_ctl_new1(&knew, codec)); in add_ca0132_alt_eq_presets()
6605 static int ca0132_alt_add_svm_enum(struct hda_codec *codec) in ca0132_alt_add_svm_enum() argument
6609 SMART_VOLUME_ENUM, 1, 0, HDA_OUTPUT); in ca0132_alt_add_svm_enum()
6613 return snd_hda_ctl_add(codec, SMART_VOLUME_ENUM, in ca0132_alt_add_svm_enum()
6614 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_svm_enum()
6622 static int ca0132_alt_add_output_enum(struct hda_codec *codec) in ca0132_alt_add_output_enum() argument
6626 OUTPUT_SOURCE_ENUM, 1, 0, HDA_OUTPUT); in ca0132_alt_add_output_enum()
6630 return snd_hda_ctl_add(codec, OUTPUT_SOURCE_ENUM, in ca0132_alt_add_output_enum()
6631 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_output_enum()
6639 static int ca0132_alt_add_speaker_channel_cfg_enum(struct hda_codec *codec) in ca0132_alt_add_speaker_channel_cfg_enum() argument
6643 SPEAKER_CHANNEL_CFG_ENUM, 1, 0, HDA_OUTPUT); in ca0132_alt_add_speaker_channel_cfg_enum()
6647 return snd_hda_ctl_add(codec, SPEAKER_CHANNEL_CFG_ENUM, in ca0132_alt_add_speaker_channel_cfg_enum()
6648 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_speaker_channel_cfg_enum()
6656 static int ca0132_alt_add_front_full_range_switch(struct hda_codec *codec) in ca0132_alt_add_front_full_range_switch() argument
6659 CA0132_CODEC_MUTE_MONO("Full-Range Front Speakers", in ca0132_alt_add_front_full_range_switch()
6662 return snd_hda_ctl_add(codec, SPEAKER_FULL_RANGE_FRONT, in ca0132_alt_add_front_full_range_switch()
6663 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_front_full_range_switch()
6666 static int ca0132_alt_add_rear_full_range_switch(struct hda_codec *codec) in ca0132_alt_add_rear_full_range_switch() argument
6669 CA0132_CODEC_MUTE_MONO("Full-Range Rear Speakers", in ca0132_alt_add_rear_full_range_switch()
6672 return snd_hda_ctl_add(codec, SPEAKER_FULL_RANGE_REAR, in ca0132_alt_add_rear_full_range_switch()
6673 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_rear_full_range_switch()
6678 * channel on speakers that are set as not being full-range. On configurations
6680 * replacement for X-Bass on configurations with an LFE channel.
6682 static int ca0132_alt_add_bass_redirection_crossover(struct hda_codec *codec) in ca0132_alt_add_bass_redirection_crossover() argument
6686 HDA_CODEC_VOLUME_MONO(namestr, BASS_REDIRECTION_XOVER, 1, 0, in ca0132_alt_add_bass_redirection_crossover()
6694 return snd_hda_ctl_add(codec, BASS_REDIRECTION_XOVER, in ca0132_alt_add_bass_redirection_crossover()
6695 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_bass_redirection_crossover()
6698 static int ca0132_alt_add_bass_redirection_switch(struct hda_codec *codec) in ca0132_alt_add_bass_redirection_switch() argument
6705 return snd_hda_ctl_add(codec, BASS_REDIRECTION, in ca0132_alt_add_bass_redirection_switch()
6706 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_bass_redirection_switch()
6711 * because the front microphone has no auto-detect, and Line-in has to be set
6714 static int ca0132_alt_add_input_enum(struct hda_codec *codec) in ca0132_alt_add_input_enum() argument
6718 INPUT_SOURCE_ENUM, 1, 0, HDA_INPUT); in ca0132_alt_add_input_enum()
6722 return snd_hda_ctl_add(codec, INPUT_SOURCE_ENUM, in ca0132_alt_add_input_enum()
6723 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_input_enum()
6727 * Add mic boost enumerated control. Switches through 0dB to 30dB. This adds
6730 static int ca0132_alt_add_mic_boost_enum(struct hda_codec *codec) in ca0132_alt_add_mic_boost_enum() argument
6734 MIC_BOOST_ENUM, 1, 0, HDA_INPUT); in ca0132_alt_add_mic_boost_enum()
6738 return snd_hda_ctl_add(codec, MIC_BOOST_ENUM, in ca0132_alt_add_mic_boost_enum()
6739 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_mic_boost_enum()
6744 * Add headphone gain enumerated control for the AE-5. This switches between
6745 * three modes, low, medium, and high. When non-headphone outputs are selected,
6748 static int ae5_add_headphone_gain_enum(struct hda_codec *codec) in ae5_add_headphone_gain_enum() argument
6751 HDA_CODEC_MUTE_MONO("AE-5: Headphone Gain", in ae5_add_headphone_gain_enum()
6752 AE5_HEADPHONE_GAIN_ENUM, 1, 0, HDA_OUTPUT); in ae5_add_headphone_gain_enum()
6756 return snd_hda_ctl_add(codec, AE5_HEADPHONE_GAIN_ENUM, in ae5_add_headphone_gain_enum()
6757 snd_ctl_new1(&knew, codec)); in ae5_add_headphone_gain_enum()
6761 * Add sound filter enumerated control for the AE-5. This adds three different
6765 static int ae5_add_sound_filter_enum(struct hda_codec *codec) in ae5_add_sound_filter_enum() argument
6768 HDA_CODEC_MUTE_MONO("AE-5: Sound Filter", in ae5_add_sound_filter_enum()
6769 AE5_SOUND_FILTER_ENUM, 1, 0, HDA_OUTPUT); in ae5_add_sound_filter_enum()
6773 return snd_hda_ctl_add(codec, AE5_SOUND_FILTER_ENUM, in ae5_add_sound_filter_enum()
6774 snd_ctl_new1(&knew, codec)); in ae5_add_sound_filter_enum()
6777 static int zxr_add_headphone_gain_switch(struct hda_codec *codec) in zxr_add_headphone_gain_switch() argument
6783 return snd_hda_ctl_add(codec, ZXR_HEADPHONE_GAIN, in zxr_add_headphone_gain_switch()
6784 snd_ctl_new1(&knew, codec)); in zxr_add_headphone_gain_switch()
6797 * I think this has to do with the pin for rear surround being 0x11,
6798 * and the center/lfe being 0x10. Usually the pin order is the opposite.
6814 static void ca0132_alt_add_chmap_ctls(struct hda_codec *codec) in ca0132_alt_add_chmap_ctls() argument
6816 int err = 0; in ca0132_alt_add_chmap_ctls()
6819 list_for_each_entry(pcm, &codec->pcm_list_head, list) { in ca0132_alt_add_chmap_ctls()
6821 &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK]; in ca0132_alt_add_chmap_ctls()
6826 if (hinfo->channels_max == 6) { in ca0132_alt_add_chmap_ctls()
6827 err = snd_pcm_add_chmap_ctls(pcm->pcm, in ca0132_alt_add_chmap_ctls()
6829 elem, hinfo->channels_max, 0, &chmap); in ca0132_alt_add_chmap_ctls()
6830 if (err < 0) in ca0132_alt_add_chmap_ctls()
6831 codec_dbg(codec, "snd_pcm_add_chmap_ctls failed!"); in ca0132_alt_add_chmap_ctls()
6845 HDA_CODEC_VOLUME("Analog-Mic2 Capture Volume", 0x08, 0, HDA_INPUT),
6846 HDA_CODEC_MUTE("Analog-Mic2 Capture Switch", 0x08, 0, HDA_INPUT),
6847 HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
6848 HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
6849 CA0132_CODEC_MUTE_MONO("Mic1-Boost (30dB) Capture Switch",
6850 0x12, 1, HDA_INPUT),
6863 * Desktop specific control mixer. Removes auto-detect for mic, and adds
6868 CA0132_ALT_CODEC_VOL("Front Playback Volume", 0x02, HDA_OUTPUT),
6870 HDA_CODEC_VOLUME("Surround Playback Volume", 0x04, 0, HDA_OUTPUT),
6871 HDA_CODEC_MUTE("Surround Playback Switch", 0x04, 0, HDA_OUTPUT),
6872 HDA_CODEC_VOLUME_MONO("Center Playback Volume", 0x03, 1, 0, HDA_OUTPUT),
6873 HDA_CODEC_MUTE_MONO("Center Playback Switch", 0x03, 1, 0, HDA_OUTPUT),
6874 HDA_CODEC_VOLUME_MONO("LFE Playback Volume", 0x03, 2, 0, HDA_OUTPUT),
6875 HDA_CODEC_MUTE_MONO("LFE Playback Switch", 0x03, 2, 0, HDA_OUTPUT),
6876 CA0132_ALT_CODEC_VOL("Capture Volume", 0x07, HDA_INPUT),
6878 HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
6879 HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
6890 CA0132_ALT_CODEC_VOL("Front Playback Volume", 0x02, HDA_OUTPUT),
6892 HDA_CODEC_VOLUME("Surround Playback Volume", 0x04, 0, HDA_OUTPUT),
6893 HDA_CODEC_MUTE("Surround Playback Switch", 0x04, 0, HDA_OUTPUT),
6894 HDA_CODEC_VOLUME_MONO("Center Playback Volume", 0x03, 1, 0, HDA_OUTPUT),
6895 HDA_CODEC_MUTE_MONO("Center Playback Switch", 0x03, 1, 0, HDA_OUTPUT),
6896 HDA_CODEC_VOLUME_MONO("LFE Playback Volume", 0x03, 2, 0, HDA_OUTPUT),
6897 HDA_CODEC_MUTE_MONO("LFE Playback Switch", 0x03, 2, 0, HDA_OUTPUT),
6900 HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
6901 HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
6907 static int ca0132_build_controls(struct hda_codec *codec) in ca0132_build_controls() argument
6909 struct ca0132_spec *spec = codec->spec; in ca0132_build_controls()
6911 int err = 0; in ca0132_build_controls()
6914 for (i = 0; i < spec->num_mixers; i++) { in ca0132_build_controls()
6915 err = snd_hda_add_new_ctls(codec, spec->mixers[i]); in ca0132_build_controls()
6916 if (err < 0) in ca0132_build_controls()
6921 snd_hda_set_vmaster_tlv(codec, spec->dacs[0], HDA_OUTPUT, in ca0132_build_controls()
6922 spec->tlv); in ca0132_build_controls()
6923 snd_hda_add_vmaster(codec, "Master Playback Volume", in ca0132_build_controls()
6924 spec->tlv, ca0132_alt_follower_pfxs, in ca0132_build_controls()
6926 err = __snd_hda_add_vmaster(codec, "Master Playback Switch", in ca0132_build_controls()
6929 true, &spec->vmaster_mute.sw_kctl); in ca0132_build_controls()
6930 if (err < 0) in ca0132_build_controls()
6938 for (i = 0; i < num_fx; i++) { in ca0132_build_controls()
6941 if (i == (ECHO_CANCELLATION - IN_EFFECT_START_NID + in ca0132_build_controls()
6946 err = add_fx_switch(codec, ca0132_effects[i].nid, in ca0132_build_controls()
6949 if (err < 0) in ca0132_build_controls()
6953 * If codec has use_alt_controls set to true, add effect level sliders, in ca0132_build_controls()
6958 err = ca0132_alt_add_svm_enum(codec); in ca0132_build_controls()
6959 if (err < 0) in ca0132_build_controls()
6962 err = add_ca0132_alt_eq_presets(codec); in ca0132_build_controls()
6963 if (err < 0) in ca0132_build_controls()
6966 err = add_fx_switch(codec, PLAY_ENHANCEMENT, in ca0132_build_controls()
6967 "Enable OutFX", 0); in ca0132_build_controls()
6968 if (err < 0) in ca0132_build_controls()
6971 err = add_fx_switch(codec, CRYSTAL_VOICE, in ca0132_build_controls()
6973 if (err < 0) in ca0132_build_controls()
6976 num_sliders = OUT_EFFECTS_COUNT - 1; in ca0132_build_controls()
6977 for (i = 0; i < num_sliders; i++) { in ca0132_build_controls()
6978 err = ca0132_alt_add_effect_slider(codec, in ca0132_build_controls()
6982 if (err < 0) in ca0132_build_controls()
6986 err = ca0132_alt_add_effect_slider(codec, XBASS_XOVER, in ca0132_build_controls()
6987 "X-Bass Crossover", EFX_DIR_OUT); in ca0132_build_controls()
6989 if (err < 0) in ca0132_build_controls()
6992 err = add_fx_switch(codec, PLAY_ENHANCEMENT, in ca0132_build_controls()
6993 "PlayEnhancement", 0); in ca0132_build_controls()
6994 if (err < 0) in ca0132_build_controls()
6997 err = add_fx_switch(codec, CRYSTAL_VOICE, in ca0132_build_controls()
6999 if (err < 0) in ca0132_build_controls()
7002 err = add_voicefx(codec); in ca0132_build_controls()
7003 if (err < 0) in ca0132_build_controls()
7007 * If the codec uses alt_functions, you need the enumerated controls in ca0132_build_controls()
7012 err = ca0132_alt_add_output_enum(codec); in ca0132_build_controls()
7013 if (err < 0) in ca0132_build_controls()
7015 err = ca0132_alt_add_speaker_channel_cfg_enum(codec); in ca0132_build_controls()
7016 if (err < 0) in ca0132_build_controls()
7018 err = ca0132_alt_add_front_full_range_switch(codec); in ca0132_build_controls()
7019 if (err < 0) in ca0132_build_controls()
7021 err = ca0132_alt_add_rear_full_range_switch(codec); in ca0132_build_controls()
7022 if (err < 0) in ca0132_build_controls()
7024 err = ca0132_alt_add_bass_redirection_crossover(codec); in ca0132_build_controls()
7025 if (err < 0) in ca0132_build_controls()
7027 err = ca0132_alt_add_bass_redirection_switch(codec); in ca0132_build_controls()
7028 if (err < 0) in ca0132_build_controls()
7030 err = ca0132_alt_add_mic_boost_enum(codec); in ca0132_build_controls()
7031 if (err < 0) in ca0132_build_controls()
7035 * header on the card, and aux-in is handled by the DBPro board. in ca0132_build_controls()
7038 err = ca0132_alt_add_input_enum(codec); in ca0132_build_controls()
7039 if (err < 0) in ca0132_build_controls()
7047 err = ae5_add_headphone_gain_enum(codec); in ca0132_build_controls()
7048 if (err < 0) in ca0132_build_controls()
7050 err = ae5_add_sound_filter_enum(codec); in ca0132_build_controls()
7051 if (err < 0) in ca0132_build_controls()
7055 err = zxr_add_headphone_gain_switch(codec); in ca0132_build_controls()
7056 if (err < 0) in ca0132_build_controls()
7064 add_tuning_ctls(codec); in ca0132_build_controls()
7067 err = snd_hda_jack_add_kctls(codec, &spec->autocfg); in ca0132_build_controls()
7068 if (err < 0) in ca0132_build_controls()
7071 if (spec->dig_out) { in ca0132_build_controls()
7072 err = snd_hda_create_spdif_out_ctls(codec, spec->dig_out, in ca0132_build_controls()
7073 spec->dig_out); in ca0132_build_controls()
7074 if (err < 0) in ca0132_build_controls()
7076 err = snd_hda_create_spdif_share_sw(codec, &spec->multiout); in ca0132_build_controls()
7077 if (err < 0) in ca0132_build_controls()
7079 /* spec->multiout.share_spdif = 1; */ in ca0132_build_controls()
7082 if (spec->dig_in) { in ca0132_build_controls()
7083 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in); in ca0132_build_controls()
7084 if (err < 0) in ca0132_build_controls()
7089 ca0132_alt_add_chmap_ctls(codec); in ca0132_build_controls()
7091 return 0; in ca0132_build_controls()
7094 static int dbpro_build_controls(struct hda_codec *codec) in dbpro_build_controls() argument
7096 struct ca0132_spec *spec = codec->spec; in dbpro_build_controls()
7097 int err = 0; in dbpro_build_controls()
7099 if (spec->dig_out) { in dbpro_build_controls()
7100 err = snd_hda_create_spdif_out_ctls(codec, spec->dig_out, in dbpro_build_controls()
7101 spec->dig_out); in dbpro_build_controls()
7102 if (err < 0) in dbpro_build_controls()
7106 if (spec->dig_in) { in dbpro_build_controls()
7107 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in); in dbpro_build_controls()
7108 if (err < 0) in dbpro_build_controls()
7112 return 0; in dbpro_build_controls()
7158 static int ca0132_build_pcms(struct hda_codec *codec) in ca0132_build_pcms() argument
7160 struct ca0132_spec *spec = codec->spec; in ca0132_build_pcms()
7163 info = snd_hda_codec_pcm_new(codec, "CA0132 Analog"); in ca0132_build_pcms()
7165 return -ENOMEM; in ca0132_build_pcms()
7167 info->own_chmap = true; in ca0132_build_pcms()
7168 info->stream[SNDRV_PCM_STREAM_PLAYBACK].chmap in ca0132_build_pcms()
7171 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = ca0132_pcm_analog_playback; in ca0132_build_pcms()
7172 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dacs[0]; in ca0132_build_pcms()
7173 info->stream[SNDRV_PCM_STREAM_PLAYBACK].channels_max = in ca0132_build_pcms()
7174 spec->multiout.max_channels; in ca0132_build_pcms()
7175 info->stream[SNDRV_PCM_STREAM_CAPTURE] = ca0132_pcm_analog_capture; in ca0132_build_pcms()
7176 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = 1; in ca0132_build_pcms()
7177 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[0]; in ca0132_build_pcms()
7181 info = snd_hda_codec_pcm_new(codec, "CA0132 Analog Mic-In2"); in ca0132_build_pcms()
7183 return -ENOMEM; in ca0132_build_pcms()
7184 info->stream[SNDRV_PCM_STREAM_CAPTURE] = in ca0132_build_pcms()
7186 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = 1; in ca0132_build_pcms()
7187 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[1]; in ca0132_build_pcms()
7190 info = snd_hda_codec_pcm_new(codec, "CA0132 What U Hear"); in ca0132_build_pcms()
7192 return -ENOMEM; in ca0132_build_pcms()
7193 info->stream[SNDRV_PCM_STREAM_CAPTURE] = ca0132_pcm_analog_capture; in ca0132_build_pcms()
7194 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = 1; in ca0132_build_pcms()
7195 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[2]; in ca0132_build_pcms()
7197 if (!spec->dig_out && !spec->dig_in) in ca0132_build_pcms()
7198 return 0; in ca0132_build_pcms()
7200 info = snd_hda_codec_pcm_new(codec, "CA0132 Digital"); in ca0132_build_pcms()
7202 return -ENOMEM; in ca0132_build_pcms()
7203 info->pcm_type = HDA_PCM_TYPE_SPDIF; in ca0132_build_pcms()
7204 if (spec->dig_out) { in ca0132_build_pcms()
7205 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = in ca0132_build_pcms()
7207 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dig_out; in ca0132_build_pcms()
7209 if (spec->dig_in) { in ca0132_build_pcms()
7210 info->stream[SNDRV_PCM_STREAM_CAPTURE] = in ca0132_build_pcms()
7212 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in; in ca0132_build_pcms()
7215 return 0; in ca0132_build_pcms()
7218 static int dbpro_build_pcms(struct hda_codec *codec) in dbpro_build_pcms() argument
7220 struct ca0132_spec *spec = codec->spec; in dbpro_build_pcms()
7223 info = snd_hda_codec_pcm_new(codec, "CA0132 Alt Analog"); in dbpro_build_pcms()
7225 return -ENOMEM; in dbpro_build_pcms()
7226 info->stream[SNDRV_PCM_STREAM_CAPTURE] = ca0132_pcm_analog_capture; in dbpro_build_pcms()
7227 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = 1; in dbpro_build_pcms()
7228 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[0]; in dbpro_build_pcms()
7231 if (!spec->dig_out && !spec->dig_in) in dbpro_build_pcms()
7232 return 0; in dbpro_build_pcms()
7234 info = snd_hda_codec_pcm_new(codec, "CA0132 Digital"); in dbpro_build_pcms()
7236 return -ENOMEM; in dbpro_build_pcms()
7237 info->pcm_type = HDA_PCM_TYPE_SPDIF; in dbpro_build_pcms()
7238 if (spec->dig_out) { in dbpro_build_pcms()
7239 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = in dbpro_build_pcms()
7241 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dig_out; in dbpro_build_pcms()
7243 if (spec->dig_in) { in dbpro_build_pcms()
7244 info->stream[SNDRV_PCM_STREAM_CAPTURE] = in dbpro_build_pcms()
7246 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in; in dbpro_build_pcms()
7249 return 0; in dbpro_build_pcms()
7252 static void init_output(struct hda_codec *codec, hda_nid_t pin, hda_nid_t dac) in init_output() argument
7255 snd_hda_set_pin_ctl(codec, pin, PIN_HP); in init_output()
7256 if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP) in init_output()
7257 snd_hda_codec_write(codec, pin, 0, in init_output()
7261 if (dac && (get_wcaps(codec, dac) & AC_WCAP_OUT_AMP)) in init_output()
7262 snd_hda_codec_write(codec, dac, 0, in init_output()
7266 static void init_input(struct hda_codec *codec, hda_nid_t pin, hda_nid_t adc) in init_input() argument
7269 snd_hda_set_pin_ctl(codec, pin, PIN_VREF80); in init_input()
7270 if (get_wcaps(codec, pin) & AC_WCAP_IN_AMP) in init_input()
7271 snd_hda_codec_write(codec, pin, 0, in init_input()
7273 AMP_IN_UNMUTE(0)); in init_input()
7275 if (adc && (get_wcaps(codec, adc) & AC_WCAP_IN_AMP)) { in init_input()
7276 snd_hda_codec_write(codec, adc, 0, AC_VERB_SET_AMP_GAIN_MUTE, in init_input()
7277 AMP_IN_UNMUTE(0)); in init_input()
7279 /* init to 0 dB and unmute. */ in init_input()
7280 snd_hda_codec_amp_stereo(codec, adc, HDA_INPUT, 0, in init_input()
7281 HDA_AMP_VOLMASK, 0x5a); in init_input()
7282 snd_hda_codec_amp_stereo(codec, adc, HDA_INPUT, 0, in init_input()
7283 HDA_AMP_MUTE, 0); in init_input()
7287 static void refresh_amp_caps(struct hda_codec *codec, hda_nid_t nid, int dir) in refresh_amp_caps() argument
7291 caps = snd_hda_param_read(codec, nid, dir == HDA_OUTPUT ? in refresh_amp_caps()
7293 snd_hda_override_amp_caps(codec, nid, dir, caps); in refresh_amp_caps()
7297 * Switch between Digital built-in mic and analog mic.
7299 static void ca0132_set_dmic(struct hda_codec *codec, int enable) in ca0132_set_dmic() argument
7301 struct ca0132_spec *spec = codec->spec; in ca0132_set_dmic()
7306 codec_dbg(codec, "ca0132_set_dmic: enable=%d\n", enable); in ca0132_set_dmic()
7308 oldval = stop_mic1(codec); in ca0132_set_dmic()
7309 ca0132_set_vipsource(codec, 0); in ca0132_set_dmic()
7311 /* set DMic input as 2-ch */ in ca0132_set_dmic()
7313 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_dmic()
7315 val = spec->dmic_ctl; in ca0132_set_dmic()
7316 val |= 0x80; in ca0132_set_dmic()
7317 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_set_dmic()
7320 if (!(spec->dmic_ctl & 0x20)) in ca0132_set_dmic()
7321 chipio_set_control_flag(codec, CONTROL_FLAG_DMIC, 1); in ca0132_set_dmic()
7325 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_dmic()
7327 val = spec->dmic_ctl; in ca0132_set_dmic()
7329 val &= 0x5f; in ca0132_set_dmic()
7330 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_set_dmic()
7333 if (!(spec->dmic_ctl & 0x20)) in ca0132_set_dmic()
7334 chipio_set_control_flag(codec, CONTROL_FLAG_DMIC, 0); in ca0132_set_dmic()
7336 ca0132_set_vipsource(codec, 1); in ca0132_set_dmic()
7337 resume_mic1(codec, oldval); in ca0132_set_dmic()
7343 static void ca0132_init_dmic(struct hda_codec *codec) in ca0132_init_dmic() argument
7345 struct ca0132_spec *spec = codec->spec; in ca0132_init_dmic()
7353 * Bit 2-0: MPIO select in ca0132_init_dmic()
7355 * Bit 7-4: reserved in ca0132_init_dmic()
7357 val = 0x01; in ca0132_init_dmic()
7358 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_init_dmic()
7362 * Bit 2-0: Data1 MPIO select in ca0132_init_dmic()
7364 * Bit 6-4: Data2 MPIO select in ca0132_init_dmic()
7367 val = 0x83; in ca0132_init_dmic()
7368 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_init_dmic()
7371 /* Use Ch-0 and Ch-1. Rate is 48K, mode 1. Disable DMic first. in ca0132_init_dmic()
7372 * Bit 3-0: Channel mask in ca0132_init_dmic()
7379 val = 0x33; in ca0132_init_dmic()
7381 val = 0x23; in ca0132_init_dmic()
7383 spec->dmic_ctl = val; in ca0132_init_dmic()
7384 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_init_dmic()
7391 static void ca0132_init_analog_mic2(struct hda_codec *codec) in ca0132_init_analog_mic2() argument
7393 struct ca0132_spec *spec = codec->spec; in ca0132_init_analog_mic2()
7395 mutex_lock(&spec->chipio_mutex); in ca0132_init_analog_mic2()
7396 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init_analog_mic2()
7397 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x20); in ca0132_init_analog_mic2()
7398 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init_analog_mic2()
7399 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x19); in ca0132_init_analog_mic2()
7400 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init_analog_mic2()
7401 VENDOR_CHIPIO_8051_DATA_WRITE, 0x00); in ca0132_init_analog_mic2()
7402 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init_analog_mic2()
7403 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x2D); in ca0132_init_analog_mic2()
7404 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init_analog_mic2()
7405 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x19); in ca0132_init_analog_mic2()
7406 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init_analog_mic2()
7407 VENDOR_CHIPIO_8051_DATA_WRITE, 0x00); in ca0132_init_analog_mic2()
7408 mutex_unlock(&spec->chipio_mutex); in ca0132_init_analog_mic2()
7411 static void ca0132_refresh_widget_caps(struct hda_codec *codec) in ca0132_refresh_widget_caps() argument
7413 struct ca0132_spec *spec = codec->spec; in ca0132_refresh_widget_caps()
7416 codec_dbg(codec, "ca0132_refresh_widget_caps.\n"); in ca0132_refresh_widget_caps()
7417 snd_hda_codec_update_widgets(codec); in ca0132_refresh_widget_caps()
7419 for (i = 0; i < spec->multiout.num_dacs; i++) in ca0132_refresh_widget_caps()
7420 refresh_amp_caps(codec, spec->dacs[i], HDA_OUTPUT); in ca0132_refresh_widget_caps()
7422 for (i = 0; i < spec->num_outputs; i++) in ca0132_refresh_widget_caps()
7423 refresh_amp_caps(codec, spec->out_pins[i], HDA_OUTPUT); in ca0132_refresh_widget_caps()
7425 for (i = 0; i < spec->num_inputs; i++) { in ca0132_refresh_widget_caps()
7426 refresh_amp_caps(codec, spec->adcs[i], HDA_INPUT); in ca0132_refresh_widget_caps()
7427 refresh_amp_caps(codec, spec->input_pins[i], HDA_INPUT); in ca0132_refresh_widget_caps()
7435 /* Non-zero values are floating point 0.000198. */
7436 0x394f9e38, 0x394f9e38, 0x00000000, 0x00000000, 0x00000000, 0x00000000
7440 /* Non-zero values are floating point 0.000220. */
7441 0x00000000, 0x00000000, 0x3966afcd, 0x3966afcd, 0x3966afcd, 0x3966afcd
7445 /* Non-zero values are floating point 0.000100. */
7446 0x00000000, 0x00000000, 0x38d1b717, 0x38d1b717, 0x38d1b717, 0x38d1b717
7452 static void ca0132_alt_init_speaker_tuning(struct hda_codec *codec) in ca0132_alt_init_speaker_tuning() argument
7454 struct ca0132_spec *spec = codec->spec; in ca0132_alt_init_speaker_tuning()
7475 dspio_set_uint_param(codec, 0x96, SPEAKER_TUNING_ENABLE_CENTER_EQ, tmp); in ca0132_alt_init_speaker_tuning()
7480 dspio_set_uint_param(codec, 0x96, i, tmp); in ca0132_alt_init_speaker_tuning()
7485 dspio_set_uint_param(codec, 0x96, i, tmp); in ca0132_alt_init_speaker_tuning()
7488 for (i = 0; i < 6; i++) in ca0132_alt_init_speaker_tuning()
7489 dspio_set_uint_param(codec, 0x96, in ca0132_alt_init_speaker_tuning()
7497 static void ca0132_alt_create_dummy_stream(struct hda_codec *codec) in ca0132_alt_create_dummy_stream() argument
7499 struct ca0132_spec *spec = codec->spec; in ca0132_alt_create_dummy_stream()
7503 SNDRV_PCM_FORMAT_S32_LE, 32, 0); in ca0132_alt_create_dummy_stream()
7505 snd_hda_codec_setup_stream(codec, spec->dacs[0], spec->dsp_stream_id, in ca0132_alt_create_dummy_stream()
7506 0, stream_format); in ca0132_alt_create_dummy_stream()
7508 snd_hda_codec_cleanup_stream(codec, spec->dacs[0]); in ca0132_alt_create_dummy_stream()
7512 * Initialize mic for non-chromebook ca0132 implementations.
7514 static void ca0132_alt_init_analog_mics(struct hda_codec *codec) in ca0132_alt_init_analog_mics() argument
7516 struct ca0132_spec *spec = codec->spec; in ca0132_alt_init_analog_mics()
7520 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_alt_init_analog_mics()
7521 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_alt_init_analog_mics()
7523 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_init_analog_mics()
7527 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_init_analog_mics()
7530 chipio_set_conn_rate(codec, MEM_CONNID_MICIN2, SR_96_000); in ca0132_alt_init_analog_mics()
7531 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT2, SR_96_000); in ca0132_alt_init_analog_mics()
7533 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_init_analog_mics()
7535 dspio_set_uint_param(codec, 0x80, 0x01, tmp); in ca0132_alt_init_analog_mics()
7539 * Sets the source of stream 0x14 to connpointID 0x48, and the destination
7540 * connpointID to 0x91. If this isn't done, the destination is 0x71, and
7544 static void sbz_connect_streams(struct hda_codec *codec) in sbz_connect_streams() argument
7546 struct ca0132_spec *spec = codec->spec; in sbz_connect_streams()
7548 mutex_lock(&spec->chipio_mutex); in sbz_connect_streams()
7550 codec_dbg(codec, "Connect Streams entered, mutex locked and loaded.\n"); in sbz_connect_streams()
7552 chipio_set_stream_channels(codec, 0x0C, 6); in sbz_connect_streams()
7553 chipio_set_stream_control(codec, 0x0C, 1); in sbz_connect_streams()
7555 /* This value is 0x43 for 96khz, and 0x83 for 192khz. */ in sbz_connect_streams()
7556 chipio_write_no_mutex(codec, 0x18a020, 0x00000043); in sbz_connect_streams()
7558 /* Setup stream 0x14 with it's source and destination points */ in sbz_connect_streams()
7559 chipio_set_stream_source_dest(codec, 0x14, 0x48, 0x91); in sbz_connect_streams()
7560 chipio_set_conn_rate_no_mutex(codec, 0x48, SR_96_000); in sbz_connect_streams()
7561 chipio_set_conn_rate_no_mutex(codec, 0x91, SR_96_000); in sbz_connect_streams()
7562 chipio_set_stream_channels(codec, 0x14, 2); in sbz_connect_streams()
7563 chipio_set_stream_control(codec, 0x14, 1); in sbz_connect_streams()
7565 codec_dbg(codec, "Connect Streams exited, mutex released.\n"); in sbz_connect_streams()
7567 mutex_unlock(&spec->chipio_mutex); in sbz_connect_streams()
7576 static void sbz_chipio_startup_data(struct hda_codec *codec) in sbz_chipio_startup_data() argument
7578 struct ca0132_spec *spec = codec->spec; in sbz_chipio_startup_data()
7580 mutex_lock(&spec->chipio_mutex); in sbz_chipio_startup_data()
7581 codec_dbg(codec, "Startup Data entered, mutex locked and loaded.\n"); in sbz_chipio_startup_data()
7584 chipio_write_no_mutex(codec, 0x190060, 0x0001f8c0); in sbz_chipio_startup_data()
7585 chipio_write_no_mutex(codec, 0x190064, 0x0001f9c1); in sbz_chipio_startup_data()
7586 chipio_write_no_mutex(codec, 0x190068, 0x0001fac6); in sbz_chipio_startup_data()
7587 chipio_write_no_mutex(codec, 0x19006c, 0x0001fbc7); in sbz_chipio_startup_data()
7589 chipio_write_no_mutex(codec, 0x19042c, 0x00000001); in sbz_chipio_startup_data()
7591 chipio_set_stream_channels(codec, 0x0C, 6); in sbz_chipio_startup_data()
7592 chipio_set_stream_control(codec, 0x0C, 1); in sbz_chipio_startup_data()
7595 chipio_write_no_mutex(codec, 0x190030, 0x0001e0c0); in sbz_chipio_startup_data()
7596 chipio_write_no_mutex(codec, 0x190034, 0x0001e1c1); in sbz_chipio_startup_data()
7597 chipio_write_no_mutex(codec, 0x190038, 0x0001e4c2); in sbz_chipio_startup_data()
7598 chipio_write_no_mutex(codec, 0x19003c, 0x0001e5c3); in sbz_chipio_startup_data()
7599 chipio_write_no_mutex(codec, 0x190040, 0x0001e2c4); in sbz_chipio_startup_data()
7600 chipio_write_no_mutex(codec, 0x190044, 0x0001e3c5); in sbz_chipio_startup_data()
7601 chipio_write_no_mutex(codec, 0x190048, 0x0001e8c6); in sbz_chipio_startup_data()
7602 chipio_write_no_mutex(codec, 0x19004c, 0x0001e9c7); in sbz_chipio_startup_data()
7603 chipio_write_no_mutex(codec, 0x190050, 0x0001ecc8); in sbz_chipio_startup_data()
7604 chipio_write_no_mutex(codec, 0x190054, 0x0001edc9); in sbz_chipio_startup_data()
7605 chipio_write_no_mutex(codec, 0x190058, 0x0001eaca); in sbz_chipio_startup_data()
7606 chipio_write_no_mutex(codec, 0x19005c, 0x0001ebcb); in sbz_chipio_startup_data()
7608 chipio_write_no_mutex(codec, 0x190038, 0x000140c2); in sbz_chipio_startup_data()
7609 chipio_write_no_mutex(codec, 0x19003c, 0x000141c3); in sbz_chipio_startup_data()
7610 chipio_write_no_mutex(codec, 0x190040, 0x000150c4); in sbz_chipio_startup_data()
7611 chipio_write_no_mutex(codec, 0x190044, 0x000151c5); in sbz_chipio_startup_data()
7612 chipio_write_no_mutex(codec, 0x190050, 0x000142c8); in sbz_chipio_startup_data()
7613 chipio_write_no_mutex(codec, 0x190054, 0x000143c9); in sbz_chipio_startup_data()
7614 chipio_write_no_mutex(codec, 0x190058, 0x000152ca); in sbz_chipio_startup_data()
7615 chipio_write_no_mutex(codec, 0x19005c, 0x000153cb); in sbz_chipio_startup_data()
7617 chipio_write_no_mutex(codec, 0x19042c, 0x00000001); in sbz_chipio_startup_data()
7619 codec_dbg(codec, "Startup Data exited, mutex released.\n"); in sbz_chipio_startup_data()
7620 mutex_unlock(&spec->chipio_mutex); in sbz_chipio_startup_data()
7624 * Custom DSP SCP commands where the src value is 0x00 instead of 0x20. This is
7627 static void ca0132_alt_dsp_scp_startup(struct hda_codec *codec) in ca0132_alt_dsp_scp_startup() argument
7629 struct ca0132_spec *spec = codec->spec; in ca0132_alt_dsp_scp_startup()
7636 for (i = 0; i < 2; i++) { in ca0132_alt_dsp_scp_startup()
7641 tmp = 0x00000003; in ca0132_alt_dsp_scp_startup()
7642 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7643 tmp = 0x00000000; in ca0132_alt_dsp_scp_startup()
7644 dspio_set_uint_param_no_source(codec, 0x80, 0x0A, tmp); in ca0132_alt_dsp_scp_startup()
7645 tmp = 0x00000001; in ca0132_alt_dsp_scp_startup()
7646 dspio_set_uint_param_no_source(codec, 0x80, 0x0B, tmp); in ca0132_alt_dsp_scp_startup()
7647 tmp = 0x00000004; in ca0132_alt_dsp_scp_startup()
7648 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7649 tmp = 0x00000005; in ca0132_alt_dsp_scp_startup()
7650 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7651 tmp = 0x00000000; in ca0132_alt_dsp_scp_startup()
7652 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7656 tmp = 0x00000000; in ca0132_alt_dsp_scp_startup()
7657 dspio_set_uint_param_no_source(codec, 0x80, 0x0A, tmp); in ca0132_alt_dsp_scp_startup()
7658 tmp = 0x00000001; in ca0132_alt_dsp_scp_startup()
7659 dspio_set_uint_param_no_source(codec, 0x80, 0x0B, tmp); in ca0132_alt_dsp_scp_startup()
7660 tmp = 0x00000004; in ca0132_alt_dsp_scp_startup()
7661 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7662 tmp = 0x00000005; in ca0132_alt_dsp_scp_startup()
7663 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7664 tmp = 0x00000000; in ca0132_alt_dsp_scp_startup()
7665 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7674 static void ca0132_alt_dsp_initial_mic_setup(struct hda_codec *codec) in ca0132_alt_dsp_initial_mic_setup() argument
7676 struct ca0132_spec *spec = codec->spec; in ca0132_alt_dsp_initial_mic_setup()
7679 chipio_set_stream_control(codec, 0x03, 0); in ca0132_alt_dsp_initial_mic_setup()
7680 chipio_set_stream_control(codec, 0x04, 0); in ca0132_alt_dsp_initial_mic_setup()
7682 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_alt_dsp_initial_mic_setup()
7683 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_alt_dsp_initial_mic_setup()
7686 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_dsp_initial_mic_setup()
7688 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_dsp_initial_mic_setup()
7689 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_dsp_initial_mic_setup()
7693 chipio_write(codec, 0x18b098, 0x0000000c); in ca0132_alt_dsp_initial_mic_setup()
7694 chipio_write(codec, 0x18b09C, 0x0000000c); in ca0132_alt_dsp_initial_mic_setup()
7697 chipio_write(codec, 0x18b098, 0x0000000c); in ca0132_alt_dsp_initial_mic_setup()
7698 chipio_write(codec, 0x18b09c, 0x0000004c); in ca0132_alt_dsp_initial_mic_setup()
7705 static void ae5_post_dsp_register_set(struct hda_codec *codec) in ae5_post_dsp_register_set() argument
7707 struct ca0132_spec *spec = codec->spec; in ae5_post_dsp_register_set()
7709 chipio_8051_write_direct(codec, 0x93, 0x10); in ae5_post_dsp_register_set()
7710 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_register_set()
7711 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x44); in ae5_post_dsp_register_set()
7712 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_register_set()
7713 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc2); in ae5_post_dsp_register_set()
7715 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7716 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7717 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7718 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7719 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7720 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7721 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7722 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7723 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7724 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7725 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7726 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7728 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x3f); in ae5_post_dsp_register_set()
7729 ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x3f); in ae5_post_dsp_register_set()
7730 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_post_dsp_register_set()
7733 static void ae5_post_dsp_param_setup(struct hda_codec *codec) in ae5_post_dsp_param_setup() argument
7738 * AE-5's registry values in Windows. in ae5_post_dsp_param_setup()
7740 chipio_set_control_param(codec, 3, 0); in ae5_post_dsp_param_setup()
7743 * change colors on the external LED strip connected to the AE-5. in ae5_post_dsp_param_setup()
7745 chipio_set_control_flag(codec, CONTROL_FLAG_ASI_96KHZ, 1); in ae5_post_dsp_param_setup()
7747 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x724, 0x83); in ae5_post_dsp_param_setup()
7748 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae5_post_dsp_param_setup()
7750 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_param_setup()
7751 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x92); in ae5_post_dsp_param_setup()
7752 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_param_setup()
7753 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0xfa); in ae5_post_dsp_param_setup()
7754 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_param_setup()
7755 VENDOR_CHIPIO_8051_DATA_WRITE, 0x22); in ae5_post_dsp_param_setup()
7758 static void ae5_post_dsp_pll_setup(struct hda_codec *codec) in ae5_post_dsp_pll_setup() argument
7760 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7761 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x41); in ae5_post_dsp_pll_setup()
7762 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7763 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc8); in ae5_post_dsp_pll_setup()
7765 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7766 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x45); in ae5_post_dsp_pll_setup()
7767 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7768 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xcc); in ae5_post_dsp_pll_setup()
7770 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7771 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x40); in ae5_post_dsp_pll_setup()
7772 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7773 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xcb); in ae5_post_dsp_pll_setup()
7775 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7776 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x43); in ae5_post_dsp_pll_setup()
7777 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7778 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc7); in ae5_post_dsp_pll_setup()
7780 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7781 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x51); in ae5_post_dsp_pll_setup()
7782 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7783 VENDOR_CHIPIO_PLL_PMU_WRITE, 0x8d); in ae5_post_dsp_pll_setup()
7786 static void ae5_post_dsp_stream_setup(struct hda_codec *codec) in ae5_post_dsp_stream_setup() argument
7788 struct ca0132_spec *spec = codec->spec; in ae5_post_dsp_stream_setup()
7790 mutex_lock(&spec->chipio_mutex); in ae5_post_dsp_stream_setup()
7792 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x725, 0x81); in ae5_post_dsp_stream_setup()
7794 chipio_set_conn_rate_no_mutex(codec, 0x70, SR_96_000); in ae5_post_dsp_stream_setup()
7796 chipio_set_stream_channels(codec, 0x0C, 6); in ae5_post_dsp_stream_setup()
7797 chipio_set_stream_control(codec, 0x0C, 1); in ae5_post_dsp_stream_setup()
7799 chipio_set_stream_source_dest(codec, 0x5, 0x43, 0x0); in ae5_post_dsp_stream_setup()
7801 chipio_set_stream_source_dest(codec, 0x18, 0x9, 0xd0); in ae5_post_dsp_stream_setup()
7802 chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000); in ae5_post_dsp_stream_setup()
7803 chipio_set_stream_channels(codec, 0x18, 6); in ae5_post_dsp_stream_setup()
7804 chipio_set_stream_control(codec, 0x18, 1); in ae5_post_dsp_stream_setup()
7806 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 4); in ae5_post_dsp_stream_setup()
7808 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_stream_setup()
7809 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x43); in ae5_post_dsp_stream_setup()
7810 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_stream_setup()
7811 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc7); in ae5_post_dsp_stream_setup()
7813 ca0113_mmio_command_set(codec, 0x48, 0x01, 0x80); in ae5_post_dsp_stream_setup()
7815 mutex_unlock(&spec->chipio_mutex); in ae5_post_dsp_stream_setup()
7818 static void ae5_post_dsp_startup_data(struct hda_codec *codec) in ae5_post_dsp_startup_data() argument
7820 struct ca0132_spec *spec = codec->spec; in ae5_post_dsp_startup_data()
7822 mutex_lock(&spec->chipio_mutex); in ae5_post_dsp_startup_data()
7824 chipio_write_no_mutex(codec, 0x189000, 0x0001f101); in ae5_post_dsp_startup_data()
7825 chipio_write_no_mutex(codec, 0x189004, 0x0001f101); in ae5_post_dsp_startup_data()
7826 chipio_write_no_mutex(codec, 0x189024, 0x00014004); in ae5_post_dsp_startup_data()
7827 chipio_write_no_mutex(codec, 0x189028, 0x0002000f); in ae5_post_dsp_startup_data()
7829 ca0113_mmio_command_set(codec, 0x48, 0x0a, 0x05); in ae5_post_dsp_startup_data()
7830 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 7); in ae5_post_dsp_startup_data()
7831 ca0113_mmio_command_set(codec, 0x48, 0x0b, 0x12); in ae5_post_dsp_startup_data()
7832 ca0113_mmio_command_set(codec, 0x48, 0x04, 0x00); in ae5_post_dsp_startup_data()
7833 ca0113_mmio_command_set(codec, 0x48, 0x06, 0x48); in ae5_post_dsp_startup_data()
7834 ca0113_mmio_command_set(codec, 0x48, 0x0a, 0x05); in ae5_post_dsp_startup_data()
7835 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_post_dsp_startup_data()
7836 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae5_post_dsp_startup_data()
7837 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae5_post_dsp_startup_data()
7838 ca0113_mmio_gpio_set(codec, 0, true); in ae5_post_dsp_startup_data()
7839 ca0113_mmio_gpio_set(codec, 1, true); in ae5_post_dsp_startup_data()
7840 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x80); in ae5_post_dsp_startup_data()
7842 chipio_write_no_mutex(codec, 0x18b03c, 0x00000012); in ae5_post_dsp_startup_data()
7844 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae5_post_dsp_startup_data()
7845 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae5_post_dsp_startup_data()
7847 mutex_unlock(&spec->chipio_mutex); in ae5_post_dsp_startup_data()
7851 0x0001e0c0, 0x0001e1c1, 0x0001e4c2, 0x0001e5c3, 0x0001e2c4, 0x0001e3c5,
7852 0x0001e8c6, 0x0001e9c7, 0x0001ecc8, 0x0001edc9, 0x0001eaca, 0x0001ebcb
7855 static void ae7_post_dsp_setup_ports(struct hda_codec *codec) in ae7_post_dsp_setup_ports() argument
7857 struct ca0132_spec *spec = codec->spec; in ae7_post_dsp_setup_ports()
7860 mutex_lock(&spec->chipio_mutex); in ae7_post_dsp_setup_ports()
7862 chipio_set_stream_channels(codec, 0x0c, 6); in ae7_post_dsp_setup_ports()
7863 chipio_set_stream_control(codec, 0x0c, 1); in ae7_post_dsp_setup_ports()
7866 addr = 0x190030; in ae7_post_dsp_setup_ports()
7867 for (i = 0; i < count; i++) { in ae7_post_dsp_setup_ports()
7868 chipio_write_no_mutex(codec, addr, ae7_port_set_data[i]); in ae7_post_dsp_setup_ports()
7870 /* Addresses are incremented by 4-bytes. */ in ae7_post_dsp_setup_ports()
7871 addr += 0x04; in ae7_post_dsp_setup_ports()
7875 * Port setting always ends with a write of 0x1 to address 0x19042c. in ae7_post_dsp_setup_ports()
7877 chipio_write_no_mutex(codec, 0x19042c, 0x00000001); in ae7_post_dsp_setup_ports()
7879 ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00); in ae7_post_dsp_setup_ports()
7880 ca0113_mmio_command_set(codec, 0x48, 0x0d, 0x40); in ae7_post_dsp_setup_ports()
7881 ca0113_mmio_command_set(codec, 0x48, 0x17, 0x00); in ae7_post_dsp_setup_ports()
7882 ca0113_mmio_command_set(codec, 0x48, 0x19, 0x00); in ae7_post_dsp_setup_ports()
7883 ca0113_mmio_command_set(codec, 0x48, 0x11, 0xff); in ae7_post_dsp_setup_ports()
7884 ca0113_mmio_command_set(codec, 0x48, 0x12, 0xff); in ae7_post_dsp_setup_ports()
7885 ca0113_mmio_command_set(codec, 0x48, 0x13, 0xff); in ae7_post_dsp_setup_ports()
7886 ca0113_mmio_command_set(codec, 0x48, 0x14, 0x7f); in ae7_post_dsp_setup_ports()
7888 mutex_unlock(&spec->chipio_mutex); in ae7_post_dsp_setup_ports()
7891 static void ae7_post_dsp_asi_stream_setup(struct hda_codec *codec) in ae7_post_dsp_asi_stream_setup() argument
7893 struct ca0132_spec *spec = codec->spec; in ae7_post_dsp_asi_stream_setup()
7895 mutex_lock(&spec->chipio_mutex); in ae7_post_dsp_asi_stream_setup()
7897 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x725, 0x81); in ae7_post_dsp_asi_stream_setup()
7898 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00); in ae7_post_dsp_asi_stream_setup()
7900 chipio_set_conn_rate_no_mutex(codec, 0x70, SR_96_000); in ae7_post_dsp_asi_stream_setup()
7901 chipio_set_stream_channels(codec, 0x0c, 6); in ae7_post_dsp_asi_stream_setup()
7902 chipio_set_stream_control(codec, 0x0c, 1); in ae7_post_dsp_asi_stream_setup()
7904 chipio_set_stream_source_dest(codec, 0x05, 0x43, 0x00); in ae7_post_dsp_asi_stream_setup()
7905 chipio_set_stream_source_dest(codec, 0x18, 0x09, 0xd0); in ae7_post_dsp_asi_stream_setup()
7907 chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000); in ae7_post_dsp_asi_stream_setup()
7908 chipio_set_stream_channels(codec, 0x18, 6); in ae7_post_dsp_asi_stream_setup()
7909 chipio_set_stream_control(codec, 0x18, 1); in ae7_post_dsp_asi_stream_setup()
7911 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 4); in ae7_post_dsp_asi_stream_setup()
7913 mutex_unlock(&spec->chipio_mutex); in ae7_post_dsp_asi_stream_setup()
7916 static void ae7_post_dsp_pll_setup(struct hda_codec *codec) in ae7_post_dsp_pll_setup() argument
7919 0x41, 0x45, 0x40, 0x43, 0x51 in ae7_post_dsp_pll_setup()
7922 0xc8, 0xcc, 0xcb, 0xc7, 0x8d in ae7_post_dsp_pll_setup()
7926 for (i = 0; i < ARRAY_SIZE(addr); i++) { in ae7_post_dsp_pll_setup()
7927 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_pll_setup()
7929 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_pll_setup()
7934 static void ae7_post_dsp_asi_setup_ports(struct hda_codec *codec) in ae7_post_dsp_asi_setup_ports() argument
7936 struct ca0132_spec *spec = codec->spec; in ae7_post_dsp_asi_setup_ports()
7938 0x0b, 0x04, 0x06, 0x0a, 0x0c, 0x11, 0x12, 0x13, 0x14 in ae7_post_dsp_asi_setup_ports()
7941 0x12, 0x00, 0x48, 0x05, 0x5f, 0xff, 0xff, 0xff, 0x7f in ae7_post_dsp_asi_setup_ports()
7945 mutex_lock(&spec->chipio_mutex); in ae7_post_dsp_asi_setup_ports()
7947 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup_ports()
7948 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x43); in ae7_post_dsp_asi_setup_ports()
7949 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup_ports()
7950 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc7); in ae7_post_dsp_asi_setup_ports()
7952 chipio_write_no_mutex(codec, 0x189000, 0x0001f101); in ae7_post_dsp_asi_setup_ports()
7953 chipio_write_no_mutex(codec, 0x189004, 0x0001f101); in ae7_post_dsp_asi_setup_ports()
7954 chipio_write_no_mutex(codec, 0x189024, 0x00014004); in ae7_post_dsp_asi_setup_ports()
7955 chipio_write_no_mutex(codec, 0x189028, 0x0002000f); in ae7_post_dsp_asi_setup_ports()
7957 ae7_post_dsp_pll_setup(codec); in ae7_post_dsp_asi_setup_ports()
7958 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 7); in ae7_post_dsp_asi_setup_ports()
7960 for (i = 0; i < ARRAY_SIZE(target); i++) in ae7_post_dsp_asi_setup_ports()
7961 ca0113_mmio_command_set(codec, 0x48, target[i], data[i]); in ae7_post_dsp_asi_setup_ports()
7963 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_post_dsp_asi_setup_ports()
7964 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae7_post_dsp_asi_setup_ports()
7965 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae7_post_dsp_asi_setup_ports()
7967 chipio_set_stream_source_dest(codec, 0x21, 0x64, 0x56); in ae7_post_dsp_asi_setup_ports()
7968 chipio_set_stream_channels(codec, 0x21, 2); in ae7_post_dsp_asi_setup_ports()
7969 chipio_set_conn_rate_no_mutex(codec, 0x56, SR_8_000); in ae7_post_dsp_asi_setup_ports()
7971 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_NODE_ID, 0x09); in ae7_post_dsp_asi_setup_ports()
7977 chipio_set_control_param_no_mutex(codec, 0x20, 0x21); in ae7_post_dsp_asi_setup_ports()
7979 chipio_write_no_mutex(codec, 0x18b038, 0x00000088); in ae7_post_dsp_asi_setup_ports()
7983 * seemingly sends data to the HDA node 0x09, which is the digital in ae7_post_dsp_asi_setup_ports()
7985 * know what data is being sent. Interestingly, the AE-5 seems to go in ae7_post_dsp_asi_setup_ports()
7987 * step, but the AE-7 does. in ae7_post_dsp_asi_setup_ports()
7990 ca0113_mmio_gpio_set(codec, 0, 1); in ae7_post_dsp_asi_setup_ports()
7991 ca0113_mmio_gpio_set(codec, 1, 1); in ae7_post_dsp_asi_setup_ports()
7993 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_post_dsp_asi_setup_ports()
7994 chipio_write_no_mutex(codec, 0x18b03c, 0x00000000); in ae7_post_dsp_asi_setup_ports()
7995 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae7_post_dsp_asi_setup_ports()
7996 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae7_post_dsp_asi_setup_ports()
7998 chipio_set_stream_source_dest(codec, 0x05, 0x43, 0x00); in ae7_post_dsp_asi_setup_ports()
7999 chipio_set_stream_source_dest(codec, 0x18, 0x09, 0xd0); in ae7_post_dsp_asi_setup_ports()
8001 chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000); in ae7_post_dsp_asi_setup_ports()
8002 chipio_set_stream_channels(codec, 0x18, 6); in ae7_post_dsp_asi_setup_ports()
8008 ae7_post_dsp_pll_setup(codec); in ae7_post_dsp_asi_setup_ports()
8009 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 7); in ae7_post_dsp_asi_setup_ports()
8011 mutex_unlock(&spec->chipio_mutex); in ae7_post_dsp_asi_setup_ports()
8019 static void ae7_post_dsp_asi_setup(struct hda_codec *codec) in ae7_post_dsp_asi_setup() argument
8021 chipio_8051_write_direct(codec, 0x93, 0x10); in ae7_post_dsp_asi_setup()
8023 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8024 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x44); in ae7_post_dsp_asi_setup()
8025 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8026 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc2); in ae7_post_dsp_asi_setup()
8028 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_post_dsp_asi_setup()
8029 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae7_post_dsp_asi_setup()
8031 chipio_set_control_param(codec, 3, 3); in ae7_post_dsp_asi_setup()
8032 chipio_set_control_flag(codec, CONTROL_FLAG_ASI_96KHZ, 1); in ae7_post_dsp_asi_setup()
8034 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x724, 0x83); in ae7_post_dsp_asi_setup()
8035 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae7_post_dsp_asi_setup()
8036 snd_hda_codec_write(codec, 0x17, 0, 0x794, 0x00); in ae7_post_dsp_asi_setup()
8038 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8039 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x92); in ae7_post_dsp_asi_setup()
8040 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8041 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0xfa); in ae7_post_dsp_asi_setup()
8042 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8043 VENDOR_CHIPIO_8051_DATA_WRITE, 0x22); in ae7_post_dsp_asi_setup()
8045 ae7_post_dsp_pll_setup(codec); in ae7_post_dsp_asi_setup()
8046 ae7_post_dsp_asi_stream_setup(codec); in ae7_post_dsp_asi_setup()
8048 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8049 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x43); in ae7_post_dsp_asi_setup()
8050 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8051 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc7); in ae7_post_dsp_asi_setup()
8053 ae7_post_dsp_asi_setup_ports(codec); in ae7_post_dsp_asi_setup()
8059 static void ca0132_setup_defaults(struct hda_codec *codec) in ca0132_setup_defaults() argument
8061 struct ca0132_spec *spec = codec->spec; in ca0132_setup_defaults()
8066 if (spec->dsp_state != DSP_DOWNLOADED) in ca0132_setup_defaults()
8071 for (idx = 0; idx < num_fx; idx++) { in ca0132_setup_defaults()
8072 for (i = 0; i <= ca0132_effects[idx].params; i++) { in ca0132_setup_defaults()
8073 dspio_set_uint_param(codec, ca0132_effects[idx].mid, in ca0132_setup_defaults()
8081 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in ca0132_setup_defaults()
8084 dspio_set_uint_param(codec, 0x8f, 0x01, tmp); in ca0132_setup_defaults()
8088 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_setup_defaults()
8089 dspio_set_uint_param(codec, 0x80, 0x01, tmp); in ca0132_setup_defaults()
8093 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_setup_defaults()
8097 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in ca0132_setup_defaults()
8104 static void r3d_setup_defaults(struct hda_codec *codec) in r3d_setup_defaults() argument
8106 struct ca0132_spec *spec = codec->spec; in r3d_setup_defaults()
8111 if (spec->dsp_state != DSP_DOWNLOADED) in r3d_setup_defaults()
8114 ca0132_alt_dsp_scp_startup(codec); in r3d_setup_defaults()
8115 ca0132_alt_init_analog_mics(codec); in r3d_setup_defaults()
8119 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in r3d_setup_defaults()
8123 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in r3d_setup_defaults()
8124 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000); in r3d_setup_defaults()
8127 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in r3d_setup_defaults()
8130 r3di_gpio_dsp_status_set(codec, R3DI_DSP_DOWNLOADED); in r3d_setup_defaults()
8134 ca0113_mmio_gpio_set(codec, 2, false); in r3d_setup_defaults()
8135 ca0113_mmio_gpio_set(codec, 4, true); in r3d_setup_defaults()
8140 for (idx = 0; idx < num_fx; idx++) { in r3d_setup_defaults()
8141 for (i = 0; i <= ca0132_effects[idx].params; i++) { in r3d_setup_defaults()
8142 dspio_set_uint_param(codec, in r3d_setup_defaults()
8154 static void sbz_setup_defaults(struct hda_codec *codec) in sbz_setup_defaults() argument
8156 struct ca0132_spec *spec = codec->spec; in sbz_setup_defaults()
8161 if (spec->dsp_state != DSP_DOWNLOADED) in sbz_setup_defaults()
8164 ca0132_alt_dsp_scp_startup(codec); in sbz_setup_defaults()
8165 ca0132_alt_init_analog_mics(codec); in sbz_setup_defaults()
8166 sbz_connect_streams(codec); in sbz_setup_defaults()
8167 sbz_chipio_startup_data(codec); in sbz_setup_defaults()
8169 chipio_set_stream_control(codec, 0x03, 1); in sbz_setup_defaults()
8170 chipio_set_stream_control(codec, 0x04, 1); in sbz_setup_defaults()
8177 dspio_set_uint_param(codec, 0x37, 0x08, tmp); in sbz_setup_defaults()
8178 dspio_set_uint_param(codec, 0x37, 0x10, tmp); in sbz_setup_defaults()
8182 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in sbz_setup_defaults()
8186 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in sbz_setup_defaults()
8187 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000); in sbz_setup_defaults()
8190 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in sbz_setup_defaults()
8192 ca0132_alt_dsp_initial_mic_setup(codec); in sbz_setup_defaults()
8196 for (idx = 0; idx < num_fx; idx++) { in sbz_setup_defaults()
8197 for (i = 0; i <= ca0132_effects[idx].params; i++) { in sbz_setup_defaults()
8198 dspio_set_uint_param(codec, in sbz_setup_defaults()
8205 ca0132_alt_init_speaker_tuning(codec); in sbz_setup_defaults()
8207 ca0132_alt_create_dummy_stream(codec); in sbz_setup_defaults()
8211 * Setup default parameters for the Sound BlasterX AE-5 DSP.
8213 static void ae5_setup_defaults(struct hda_codec *codec) in ae5_setup_defaults() argument
8215 struct ca0132_spec *spec = codec->spec; in ae5_setup_defaults()
8220 if (spec->dsp_state != DSP_DOWNLOADED) in ae5_setup_defaults()
8223 ca0132_alt_dsp_scp_startup(codec); in ae5_setup_defaults()
8224 ca0132_alt_init_analog_mics(codec); in ae5_setup_defaults()
8225 chipio_set_stream_control(codec, 0x03, 1); in ae5_setup_defaults()
8226 chipio_set_stream_control(codec, 0x04, 1); in ae5_setup_defaults()
8230 dspio_set_uint_param(codec, 0x96, 0x29, tmp); in ae5_setup_defaults()
8231 dspio_set_uint_param(codec, 0x96, 0x2a, tmp); in ae5_setup_defaults()
8232 dspio_set_uint_param(codec, 0x80, 0x0d, tmp); in ae5_setup_defaults()
8233 dspio_set_uint_param(codec, 0x80, 0x0e, tmp); in ae5_setup_defaults()
8235 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae5_setup_defaults()
8236 ca0113_mmio_gpio_set(codec, 0, false); in ae5_setup_defaults()
8237 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ae5_setup_defaults()
8241 dspio_set_uint_param(codec, 0x37, 0x08, tmp); in ae5_setup_defaults()
8242 dspio_set_uint_param(codec, 0x37, 0x10, tmp); in ae5_setup_defaults()
8246 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in ae5_setup_defaults()
8250 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in ae5_setup_defaults()
8251 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000); in ae5_setup_defaults()
8254 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in ae5_setup_defaults()
8256 ca0132_alt_dsp_initial_mic_setup(codec); in ae5_setup_defaults()
8257 ae5_post_dsp_register_set(codec); in ae5_setup_defaults()
8258 ae5_post_dsp_param_setup(codec); in ae5_setup_defaults()
8259 ae5_post_dsp_pll_setup(codec); in ae5_setup_defaults()
8260 ae5_post_dsp_stream_setup(codec); in ae5_setup_defaults()
8261 ae5_post_dsp_startup_data(codec); in ae5_setup_defaults()
8265 for (idx = 0; idx < num_fx; idx++) { in ae5_setup_defaults()
8266 for (i = 0; i <= ca0132_effects[idx].params; i++) { in ae5_setup_defaults()
8267 dspio_set_uint_param(codec, in ae5_setup_defaults()
8274 ca0132_alt_init_speaker_tuning(codec); in ae5_setup_defaults()
8276 ca0132_alt_create_dummy_stream(codec); in ae5_setup_defaults()
8280 * Setup default parameters for the Sound Blaster AE-7 DSP.
8282 static void ae7_setup_defaults(struct hda_codec *codec) in ae7_setup_defaults() argument
8284 struct ca0132_spec *spec = codec->spec; in ae7_setup_defaults()
8289 if (spec->dsp_state != DSP_DOWNLOADED) in ae7_setup_defaults()
8292 ca0132_alt_dsp_scp_startup(codec); in ae7_setup_defaults()
8293 ca0132_alt_init_analog_mics(codec); in ae7_setup_defaults()
8294 ae7_post_dsp_setup_ports(codec); in ae7_setup_defaults()
8297 dspio_set_uint_param(codec, 0x96, in ae7_setup_defaults()
8299 dspio_set_uint_param(codec, 0x96, in ae7_setup_defaults()
8302 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae7_setup_defaults()
8305 dspio_set_uint_param(codec, 0x80, 0x0d, tmp); in ae7_setup_defaults()
8306 dspio_set_uint_param(codec, 0x80, 0x0e, tmp); in ae7_setup_defaults()
8308 ca0113_mmio_gpio_set(codec, 0, false); in ae7_setup_defaults()
8312 dspio_set_uint_param(codec, 0x37, 0x08, tmp); in ae7_setup_defaults()
8313 dspio_set_uint_param(codec, 0x37, 0x10, tmp); in ae7_setup_defaults()
8317 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in ae7_setup_defaults()
8321 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in ae7_setup_defaults()
8322 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000); in ae7_setup_defaults()
8325 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in ae7_setup_defaults()
8326 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ae7_setup_defaults()
8332 ca0132_alt_init_analog_mics(codec); in ae7_setup_defaults()
8334 ae7_post_dsp_asi_setup(codec); in ae7_setup_defaults()
8337 * Not sure why, but these are both set to 1. They're only set to 0 in ae7_setup_defaults()
8340 ca0113_mmio_gpio_set(codec, 0, true); in ae7_setup_defaults()
8341 ca0113_mmio_gpio_set(codec, 1, true); in ae7_setup_defaults()
8344 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x04); in ae7_setup_defaults()
8345 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x04); in ae7_setup_defaults()
8346 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x80); in ae7_setup_defaults()
8350 for (idx = 0; idx < num_fx; idx++) { in ae7_setup_defaults()
8351 for (i = 0; i <= ca0132_effects[idx].params; i++) { in ae7_setup_defaults()
8352 dspio_set_uint_param(codec, in ae7_setup_defaults()
8359 ca0132_alt_init_speaker_tuning(codec); in ae7_setup_defaults()
8361 ca0132_alt_create_dummy_stream(codec); in ae7_setup_defaults()
8367 static void ca0132_init_flags(struct hda_codec *codec) in ca0132_init_flags() argument
8369 struct ca0132_spec *spec = codec->spec; in ca0132_init_flags()
8372 chipio_set_control_flag(codec, CONTROL_FLAG_DSP_96KHZ, 1); in ca0132_init_flags()
8373 chipio_set_control_flag(codec, CONTROL_FLAG_DAC_96KHZ, 1); in ca0132_init_flags()
8374 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_B_96KHZ, 1); in ca0132_init_flags()
8375 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_C_96KHZ, 1); in ca0132_init_flags()
8376 chipio_set_control_flag(codec, CONTROL_FLAG_SRC_RATE_96KHZ, 1); in ca0132_init_flags()
8377 chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0); in ca0132_init_flags()
8378 chipio_set_control_flag(codec, CONTROL_FLAG_SPDIF2OUT, 0); in ca0132_init_flags()
8379 chipio_set_control_flag(codec, in ca0132_init_flags()
8380 CONTROL_FLAG_PORT_D_10KOHM_LOAD, 0); in ca0132_init_flags()
8381 chipio_set_control_flag(codec, in ca0132_init_flags()
8384 chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0); in ca0132_init_flags()
8385 chipio_set_control_flag(codec, in ca0132_init_flags()
8386 CONTROL_FLAG_PORT_A_COMMON_MODE, 0); in ca0132_init_flags()
8387 chipio_set_control_flag(codec, in ca0132_init_flags()
8388 CONTROL_FLAG_PORT_D_COMMON_MODE, 0); in ca0132_init_flags()
8389 chipio_set_control_flag(codec, in ca0132_init_flags()
8390 CONTROL_FLAG_PORT_A_10KOHM_LOAD, 0); in ca0132_init_flags()
8391 chipio_set_control_flag(codec, in ca0132_init_flags()
8392 CONTROL_FLAG_PORT_D_10KOHM_LOAD, 0); in ca0132_init_flags()
8393 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_C_HIGH_PASS, 1); in ca0132_init_flags()
8400 static void ca0132_init_params(struct hda_codec *codec) in ca0132_init_params() argument
8402 struct ca0132_spec *spec = codec->spec; in ca0132_init_params()
8405 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000); in ca0132_init_params()
8406 chipio_set_conn_rate(codec, 0x0B, SR_48_000); in ca0132_init_params()
8407 chipio_set_control_param(codec, CONTROL_PARAM_SPDIF1_SOURCE, 0); in ca0132_init_params()
8408 chipio_set_control_param(codec, 0, 0); in ca0132_init_params()
8409 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0); in ca0132_init_params()
8412 chipio_set_control_param(codec, CONTROL_PARAM_PORTA_160OHM_GAIN, 6); in ca0132_init_params()
8413 chipio_set_control_param(codec, CONTROL_PARAM_PORTD_160OHM_GAIN, 6); in ca0132_init_params()
8416 static void ca0132_set_dsp_msr(struct hda_codec *codec, bool is96k) in ca0132_set_dsp_msr() argument
8418 chipio_set_control_flag(codec, CONTROL_FLAG_DSP_96KHZ, is96k); in ca0132_set_dsp_msr()
8419 chipio_set_control_flag(codec, CONTROL_FLAG_DAC_96KHZ, is96k); in ca0132_set_dsp_msr()
8420 chipio_set_control_flag(codec, CONTROL_FLAG_SRC_RATE_96KHZ, is96k); in ca0132_set_dsp_msr()
8421 chipio_set_control_flag(codec, CONTROL_FLAG_SRC_CLOCK_196MHZ, is96k); in ca0132_set_dsp_msr()
8422 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_B_96KHZ, is96k); in ca0132_set_dsp_msr()
8423 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_C_96KHZ, is96k); in ca0132_set_dsp_msr()
8425 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_set_dsp_msr()
8426 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_set_dsp_msr()
8427 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000); in ca0132_set_dsp_msr()
8430 static bool ca0132_download_dsp_images(struct hda_codec *codec) in ca0132_download_dsp_images() argument
8433 struct ca0132_spec *spec = codec->spec; in ca0132_download_dsp_images()
8446 codec->card->dev) != 0) in ca0132_download_dsp_images()
8447 codec_dbg(codec, "Desktop firmware not found."); in ca0132_download_dsp_images()
8449 codec_dbg(codec, "Desktop firmware selected."); in ca0132_download_dsp_images()
8453 codec->card->dev) != 0) in ca0132_download_dsp_images()
8454 codec_dbg(codec, "Recon3Di alt firmware not detected."); in ca0132_download_dsp_images()
8456 codec_dbg(codec, "Recon3Di firmware selected."); in ca0132_download_dsp_images()
8463 * exists for your particular codec. in ca0132_download_dsp_images()
8466 codec_dbg(codec, "Default firmware selected."); in ca0132_download_dsp_images()
8468 codec->card->dev) != 0) in ca0132_download_dsp_images()
8472 dsp_os_image = (struct dsp_image_seg *)(fw_entry->data); in ca0132_download_dsp_images()
8473 if (dspload_image(codec, dsp_os_image, 0, 0, true, 0)) { in ca0132_download_dsp_images()
8474 codec_err(codec, "ca0132 DSP load image failed\n"); in ca0132_download_dsp_images()
8478 dsp_loaded = dspload_wait_loaded(codec); in ca0132_download_dsp_images()
8486 static void ca0132_download_dsp(struct hda_codec *codec) in ca0132_download_dsp() argument
8488 struct ca0132_spec *spec = codec->spec; in ca0132_download_dsp()
8494 if (spec->dsp_state == DSP_DOWNLOAD_FAILED) in ca0132_download_dsp()
8497 chipio_enable_clocks(codec); in ca0132_download_dsp()
8498 if (spec->dsp_state != DSP_DOWNLOADED) { in ca0132_download_dsp()
8499 spec->dsp_state = DSP_DOWNLOADING; in ca0132_download_dsp()
8501 if (!ca0132_download_dsp_images(codec)) in ca0132_download_dsp()
8502 spec->dsp_state = DSP_DOWNLOAD_FAILED; in ca0132_download_dsp()
8504 spec->dsp_state = DSP_DOWNLOADED; in ca0132_download_dsp()
8508 if (spec->dsp_state == DSP_DOWNLOADED && !ca0132_use_alt_functions(spec)) in ca0132_download_dsp()
8509 ca0132_set_dsp_msr(codec, true); in ca0132_download_dsp()
8512 static void ca0132_process_dsp_response(struct hda_codec *codec, in ca0132_process_dsp_response() argument
8515 struct ca0132_spec *spec = codec->spec; in ca0132_process_dsp_response()
8517 codec_dbg(codec, "ca0132_process_dsp_response\n"); in ca0132_process_dsp_response()
8518 snd_hda_power_up_pm(codec); in ca0132_process_dsp_response()
8519 if (spec->wait_scp) { in ca0132_process_dsp_response()
8520 if (dspio_get_response_data(codec) >= 0) in ca0132_process_dsp_response()
8521 spec->wait_scp = 0; in ca0132_process_dsp_response()
8524 dspio_clear_response_queue(codec); in ca0132_process_dsp_response()
8525 snd_hda_power_down_pm(codec); in ca0132_process_dsp_response()
8528 static void hp_callback(struct hda_codec *codec, struct hda_jack_callback *cb) in hp_callback() argument
8530 struct ca0132_spec *spec = codec->spec; in hp_callback()
8533 /* Delay enabling the HP amp, to let the mic-detection in hp_callback()
8536 tbl = snd_hda_jack_tbl_get(codec, cb->nid); in hp_callback()
8538 tbl->block_report = 1; in hp_callback()
8539 schedule_delayed_work(&spec->unsol_hp_work, msecs_to_jiffies(500)); in hp_callback()
8542 static void amic_callback(struct hda_codec *codec, struct hda_jack_callback *cb) in amic_callback() argument
8544 struct ca0132_spec *spec = codec->spec; in amic_callback()
8547 ca0132_alt_select_in(codec); in amic_callback()
8549 ca0132_select_mic(codec); in amic_callback()
8552 static void ca0132_init_unsol(struct hda_codec *codec) in ca0132_init_unsol() argument
8554 struct ca0132_spec *spec = codec->spec; in ca0132_init_unsol()
8555 snd_hda_jack_detect_enable_callback(codec, spec->unsol_tag_hp, hp_callback); in ca0132_init_unsol()
8556 snd_hda_jack_detect_enable_callback(codec, spec->unsol_tag_amic1, in ca0132_init_unsol()
8558 snd_hda_jack_detect_enable_callback(codec, UNSOL_TAG_DSP, in ca0132_init_unsol()
8562 snd_hda_jack_detect_enable_callback(codec, in ca0132_init_unsol()
8563 spec->unsol_tag_front_hp, hp_callback); in ca0132_init_unsol()
8573 {0x15, VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE, 0x1},
8580 {0x01, AC_VERB_SET_POWER_STATE, 0x03},
8582 {0x15, VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE, 0},
8590 {0x15, 0x70D, 0xF0},
8591 {0x15, 0x70E, 0xFE},
8592 {0x15, 0x707, 0x75},
8593 {0x15, 0x707, 0xD3},
8594 {0x15, 0x707, 0x09},
8595 {0x15, 0x707, 0x53},
8596 {0x15, 0x707, 0xD4},
8597 {0x15, 0x707, 0xEF},
8598 {0x15, 0x707, 0x75},
8599 {0x15, 0x707, 0xD3},
8600 {0x15, 0x707, 0x09},
8601 {0x15, 0x707, 0x02},
8602 {0x15, 0x707, 0x37},
8603 {0x15, 0x707, 0x78},
8604 {0x15, 0x53C, 0xCE},
8605 {0x15, 0x575, 0xC9},
8606 {0x15, 0x53D, 0xCE},
8607 {0x15, 0x5B7, 0xC9},
8608 {0x15, 0x70D, 0xE8},
8609 {0x15, 0x70E, 0xFE},
8610 {0x15, 0x707, 0x02},
8611 {0x15, 0x707, 0x68},
8612 {0x15, 0x707, 0x62},
8613 {0x15, 0x53A, 0xCE},
8614 {0x15, 0x546, 0xC9},
8615 {0x15, 0x53B, 0xCE},
8616 {0x15, 0x5E8, 0xC9},
8622 {0x15, 0x70D, 0x20},
8623 {0x15, 0x70E, 0x19},
8624 {0x15, 0x707, 0x00},
8625 {0x15, 0x539, 0xCE},
8626 {0x15, 0x546, 0xC9},
8627 {0x15, 0x70D, 0xB7},
8628 {0x15, 0x70E, 0x09},
8629 {0x15, 0x707, 0x10},
8630 {0x15, 0x70D, 0xAF},
8631 {0x15, 0x70E, 0x09},
8632 {0x15, 0x707, 0x01},
8633 {0x15, 0x707, 0x05},
8634 {0x15, 0x70D, 0x73},
8635 {0x15, 0x70E, 0x09},
8636 {0x15, 0x707, 0x14},
8637 {0x15, 0x6FF, 0xC4},
8641 static void ca0132_init_chip(struct hda_codec *codec) in ca0132_init_chip() argument
8643 struct ca0132_spec *spec = codec->spec; in ca0132_init_chip()
8648 mutex_init(&spec->chipio_mutex); in ca0132_init_chip()
8650 spec->cur_out_type = SPEAKER_OUT; in ca0132_init_chip()
8652 spec->cur_mic_type = DIGITAL_MIC; in ca0132_init_chip()
8654 spec->cur_mic_type = REAR_MIC; in ca0132_init_chip()
8656 spec->cur_mic_boost = 0; in ca0132_init_chip()
8658 for (i = 0; i < VNODES_COUNT; i++) { in ca0132_init_chip()
8659 spec->vnode_lvol[i] = 0x5a; in ca0132_init_chip()
8660 spec->vnode_rvol[i] = 0x5a; in ca0132_init_chip()
8661 spec->vnode_lswitch[i] = 0; in ca0132_init_chip()
8662 spec->vnode_rswitch[i] = 0; in ca0132_init_chip()
8669 for (i = 0; i < num_fx; i++) { in ca0132_init_chip()
8670 on = (unsigned int)ca0132_effects[i].reqs[0]; in ca0132_init_chip()
8671 spec->effects_switch[i] = on ? 1 : 0; in ca0132_init_chip()
8675 * ca0132 codecs. Also sets x-bass crossover frequency to 80hz. in ca0132_init_chip()
8679 spec->speaker_range_val[0] = 1; in ca0132_init_chip()
8680 spec->speaker_range_val[1] = 1; in ca0132_init_chip()
8682 spec->xbass_xover_freq = 8; in ca0132_init_chip()
8683 for (i = 0; i < EFFECT_LEVEL_SLIDERS; i++) in ca0132_init_chip()
8684 spec->fx_ctl_val[i] = effect_slider_defaults[i]; in ca0132_init_chip()
8686 spec->bass_redirect_xover_freq = 8; in ca0132_init_chip()
8689 spec->voicefx_val = 0; in ca0132_init_chip()
8690 spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID] = 1; in ca0132_init_chip()
8691 spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] = 0; in ca0132_init_chip()
8694 * The ZxR doesn't have a front panel header, and it's line-in is on in ca0132_init_chip()
8696 * to make sure that spec->in_enum_val is set properly. in ca0132_init_chip()
8699 spec->in_enum_val = REAR_MIC; in ca0132_init_chip()
8702 ca0132_init_tuning_defaults(codec); in ca0132_init_chip()
8710 static void r3di_gpio_shutdown(struct hda_codec *codec) in r3di_gpio_shutdown() argument
8712 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA, 0x00); in r3di_gpio_shutdown()
8718 static void sbz_region2_exit(struct hda_codec *codec) in sbz_region2_exit() argument
8720 struct ca0132_spec *spec = codec->spec; in sbz_region2_exit()
8723 for (i = 0; i < 4; i++) in sbz_region2_exit()
8724 writeb(0x0, spec->mem_base + 0x100); in sbz_region2_exit()
8725 for (i = 0; i < 8; i++) in sbz_region2_exit()
8726 writeb(0xb3, spec->mem_base + 0x304); in sbz_region2_exit()
8728 ca0113_mmio_gpio_set(codec, 0, false); in sbz_region2_exit()
8729 ca0113_mmio_gpio_set(codec, 1, false); in sbz_region2_exit()
8730 ca0113_mmio_gpio_set(codec, 4, true); in sbz_region2_exit()
8731 ca0113_mmio_gpio_set(codec, 5, false); in sbz_region2_exit()
8732 ca0113_mmio_gpio_set(codec, 7, false); in sbz_region2_exit()
8735 static void sbz_set_pin_ctl_default(struct hda_codec *codec) in sbz_set_pin_ctl_default() argument
8737 static const hda_nid_t pins[] = {0x0B, 0x0C, 0x0E, 0x12, 0x13}; in sbz_set_pin_ctl_default()
8740 snd_hda_codec_write(codec, 0x11, 0, in sbz_set_pin_ctl_default()
8741 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x40); in sbz_set_pin_ctl_default()
8743 for (i = 0; i < ARRAY_SIZE(pins); i++) in sbz_set_pin_ctl_default()
8744 snd_hda_codec_write(codec, pins[i], 0, in sbz_set_pin_ctl_default()
8745 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x00); in sbz_set_pin_ctl_default()
8748 static void ca0132_clear_unsolicited(struct hda_codec *codec) in ca0132_clear_unsolicited() argument
8750 static const hda_nid_t pins[] = {0x0B, 0x0E, 0x0F, 0x10, 0x11, 0x12, 0x13}; in ca0132_clear_unsolicited()
8753 for (i = 0; i < ARRAY_SIZE(pins); i++) { in ca0132_clear_unsolicited()
8754 snd_hda_codec_write(codec, pins[i], 0, in ca0132_clear_unsolicited()
8755 AC_VERB_SET_UNSOLICITED_ENABLE, 0x00); in ca0132_clear_unsolicited()
8760 static void sbz_gpio_shutdown_commands(struct hda_codec *codec, int dir, in sbz_gpio_shutdown_commands() argument
8763 if (dir >= 0) in sbz_gpio_shutdown_commands()
8764 snd_hda_codec_write(codec, 0x01, 0, in sbz_gpio_shutdown_commands()
8766 if (mask >= 0) in sbz_gpio_shutdown_commands()
8767 snd_hda_codec_write(codec, 0x01, 0, in sbz_gpio_shutdown_commands()
8770 if (data >= 0) in sbz_gpio_shutdown_commands()
8771 snd_hda_codec_write(codec, 0x01, 0, in sbz_gpio_shutdown_commands()
8775 static void zxr_dbpro_power_state_shutdown(struct hda_codec *codec) in zxr_dbpro_power_state_shutdown() argument
8777 static const hda_nid_t pins[] = {0x05, 0x0c, 0x09, 0x0e, 0x08, 0x11, 0x01}; in zxr_dbpro_power_state_shutdown()
8780 for (i = 0; i < ARRAY_SIZE(pins); i++) in zxr_dbpro_power_state_shutdown()
8781 snd_hda_codec_write(codec, pins[i], 0, in zxr_dbpro_power_state_shutdown()
8782 AC_VERB_SET_POWER_STATE, 0x03); in zxr_dbpro_power_state_shutdown()
8785 static void sbz_exit_chip(struct hda_codec *codec) in sbz_exit_chip() argument
8787 chipio_set_stream_control(codec, 0x03, 0); in sbz_exit_chip()
8788 chipio_set_stream_control(codec, 0x04, 0); in sbz_exit_chip()
8791 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, -1); in sbz_exit_chip()
8792 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x05); in sbz_exit_chip()
8793 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x01); in sbz_exit_chip()
8795 chipio_set_stream_control(codec, 0x14, 0); in sbz_exit_chip()
8796 chipio_set_stream_control(codec, 0x0C, 0); in sbz_exit_chip()
8798 chipio_set_conn_rate(codec, 0x41, SR_192_000); in sbz_exit_chip()
8799 chipio_set_conn_rate(codec, 0x91, SR_192_000); in sbz_exit_chip()
8801 chipio_write(codec, 0x18a020, 0x00000083); in sbz_exit_chip()
8803 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x03); in sbz_exit_chip()
8804 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x07); in sbz_exit_chip()
8805 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x06); in sbz_exit_chip()
8807 chipio_set_stream_control(codec, 0x0C, 0); in sbz_exit_chip()
8809 chipio_set_control_param(codec, 0x0D, 0x24); in sbz_exit_chip()
8811 ca0132_clear_unsolicited(codec); in sbz_exit_chip()
8812 sbz_set_pin_ctl_default(codec); in sbz_exit_chip()
8814 snd_hda_codec_write(codec, 0x0B, 0, in sbz_exit_chip()
8815 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in sbz_exit_chip()
8817 sbz_region2_exit(codec); in sbz_exit_chip()
8820 static void r3d_exit_chip(struct hda_codec *codec) in r3d_exit_chip() argument
8822 ca0132_clear_unsolicited(codec); in r3d_exit_chip()
8823 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in r3d_exit_chip()
8824 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x5b); in r3d_exit_chip()
8827 static void ae5_exit_chip(struct hda_codec *codec) in ae5_exit_chip() argument
8829 chipio_set_stream_control(codec, 0x03, 0); in ae5_exit_chip()
8830 chipio_set_stream_control(codec, 0x04, 0); in ae5_exit_chip()
8832 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ae5_exit_chip()
8833 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_exit_chip()
8834 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_exit_chip()
8835 ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00); in ae5_exit_chip()
8836 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00); in ae5_exit_chip()
8837 ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x00); in ae5_exit_chip()
8838 ca0113_mmio_gpio_set(codec, 0, false); in ae5_exit_chip()
8839 ca0113_mmio_gpio_set(codec, 1, false); in ae5_exit_chip()
8841 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ae5_exit_chip()
8842 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in ae5_exit_chip()
8844 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae5_exit_chip()
8846 chipio_set_stream_control(codec, 0x18, 0); in ae5_exit_chip()
8847 chipio_set_stream_control(codec, 0x0c, 0); in ae5_exit_chip()
8849 snd_hda_codec_write(codec, 0x01, 0, 0x724, 0x83); in ae5_exit_chip()
8852 static void ae7_exit_chip(struct hda_codec *codec) in ae7_exit_chip() argument
8854 chipio_set_stream_control(codec, 0x18, 0); in ae7_exit_chip()
8855 chipio_set_stream_source_dest(codec, 0x21, 0xc8, 0xc8); in ae7_exit_chip()
8856 chipio_set_stream_channels(codec, 0x21, 0); in ae7_exit_chip()
8857 chipio_set_control_param(codec, CONTROL_PARAM_NODE_ID, 0x09); in ae7_exit_chip()
8858 chipio_set_control_param(codec, 0x20, 0x01); in ae7_exit_chip()
8860 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae7_exit_chip()
8862 chipio_set_stream_control(codec, 0x18, 0); in ae7_exit_chip()
8863 chipio_set_stream_control(codec, 0x0c, 0); in ae7_exit_chip()
8865 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00); in ae7_exit_chip()
8866 snd_hda_codec_write(codec, 0x15, 0, 0x724, 0x83); in ae7_exit_chip()
8867 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_exit_chip()
8868 ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00); in ae7_exit_chip()
8869 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x00); in ae7_exit_chip()
8870 ca0113_mmio_gpio_set(codec, 0, false); in ae7_exit_chip()
8871 ca0113_mmio_gpio_set(codec, 1, false); in ae7_exit_chip()
8872 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ae7_exit_chip()
8874 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ae7_exit_chip()
8875 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in ae7_exit_chip()
8878 static void zxr_exit_chip(struct hda_codec *codec) in zxr_exit_chip() argument
8880 chipio_set_stream_control(codec, 0x03, 0); in zxr_exit_chip()
8881 chipio_set_stream_control(codec, 0x04, 0); in zxr_exit_chip()
8882 chipio_set_stream_control(codec, 0x14, 0); in zxr_exit_chip()
8883 chipio_set_stream_control(codec, 0x0C, 0); in zxr_exit_chip()
8885 chipio_set_conn_rate(codec, 0x41, SR_192_000); in zxr_exit_chip()
8886 chipio_set_conn_rate(codec, 0x91, SR_192_000); in zxr_exit_chip()
8888 chipio_write(codec, 0x18a020, 0x00000083); in zxr_exit_chip()
8890 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in zxr_exit_chip()
8891 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in zxr_exit_chip()
8893 ca0132_clear_unsolicited(codec); in zxr_exit_chip()
8894 sbz_set_pin_ctl_default(codec); in zxr_exit_chip()
8895 snd_hda_codec_write(codec, 0x0B, 0, AC_VERB_SET_EAPD_BTLENABLE, 0x00); in zxr_exit_chip()
8897 ca0113_mmio_gpio_set(codec, 5, false); in zxr_exit_chip()
8898 ca0113_mmio_gpio_set(codec, 2, false); in zxr_exit_chip()
8899 ca0113_mmio_gpio_set(codec, 3, false); in zxr_exit_chip()
8900 ca0113_mmio_gpio_set(codec, 0, false); in zxr_exit_chip()
8901 ca0113_mmio_gpio_set(codec, 4, true); in zxr_exit_chip()
8902 ca0113_mmio_gpio_set(codec, 0, true); in zxr_exit_chip()
8903 ca0113_mmio_gpio_set(codec, 5, true); in zxr_exit_chip()
8904 ca0113_mmio_gpio_set(codec, 2, false); in zxr_exit_chip()
8905 ca0113_mmio_gpio_set(codec, 3, false); in zxr_exit_chip()
8908 static void ca0132_exit_chip(struct hda_codec *codec) in ca0132_exit_chip() argument
8912 if (dspload_is_loaded(codec)) in ca0132_exit_chip()
8913 dsp_reset(codec); in ca0132_exit_chip()
8924 static void sbz_dsp_startup_check(struct hda_codec *codec) in sbz_dsp_startup_check() argument
8926 struct ca0132_spec *spec = codec->spec; in sbz_dsp_startup_check()
8928 unsigned int cur_address = 0x390; in sbz_dsp_startup_check()
8930 unsigned int failure = 0; in sbz_dsp_startup_check()
8933 if (spec->startup_check_entered) in sbz_dsp_startup_check()
8936 spec->startup_check_entered = true; in sbz_dsp_startup_check()
8938 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
8939 chipio_read(codec, cur_address, &dsp_data_check[i]); in sbz_dsp_startup_check()
8940 cur_address += 0x4; in sbz_dsp_startup_check()
8942 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
8943 if (dsp_data_check[i] == 0xa1a2a3a4) in sbz_dsp_startup_check()
8947 codec_dbg(codec, "Startup Check: %d ", failure); in sbz_dsp_startup_check()
8949 codec_info(codec, "DSP not initialized properly. Attempting to fix."); in sbz_dsp_startup_check()
8955 while (failure && (reload != 0)) { in sbz_dsp_startup_check()
8956 codec_info(codec, "Reloading... Tries left: %d", reload); in sbz_dsp_startup_check()
8957 sbz_exit_chip(codec); in sbz_dsp_startup_check()
8958 spec->dsp_state = DSP_DOWNLOAD_INIT; in sbz_dsp_startup_check()
8959 codec->patch_ops.init(codec); in sbz_dsp_startup_check()
8960 failure = 0; in sbz_dsp_startup_check()
8961 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
8962 chipio_read(codec, cur_address, &dsp_data_check[i]); in sbz_dsp_startup_check()
8963 cur_address += 0x4; in sbz_dsp_startup_check()
8965 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
8966 if (dsp_data_check[i] == 0xa1a2a3a4) in sbz_dsp_startup_check()
8969 reload--; in sbz_dsp_startup_check()
8973 codec_info(codec, "DSP fixed."); in sbz_dsp_startup_check()
8978 …codec_info(codec, "DSP failed to initialize properly. Either try a full shutdown or a suspend to c… in sbz_dsp_startup_check()
8982 * This is for the extra volume verbs 0x797 (left) and 0x798 (right). These add
8987 * to 0 just incase a value has lingered from a boot into Windows.
8989 static void ca0132_alt_vol_setup(struct hda_codec *codec) in ca0132_alt_vol_setup() argument
8991 snd_hda_codec_write(codec, 0x02, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
8992 snd_hda_codec_write(codec, 0x02, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
8993 snd_hda_codec_write(codec, 0x03, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
8994 snd_hda_codec_write(codec, 0x03, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
8995 snd_hda_codec_write(codec, 0x04, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
8996 snd_hda_codec_write(codec, 0x04, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
8997 snd_hda_codec_write(codec, 0x07, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
8998 snd_hda_codec_write(codec, 0x07, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
9004 static void sbz_pre_dsp_setup(struct hda_codec *codec) in sbz_pre_dsp_setup() argument
9006 struct ca0132_spec *spec = codec->spec; in sbz_pre_dsp_setup()
9008 writel(0x00820680, spec->mem_base + 0x01C); in sbz_pre_dsp_setup()
9009 writel(0x00820680, spec->mem_base + 0x01C); in sbz_pre_dsp_setup()
9011 chipio_write(codec, 0x18b0a4, 0x000000c2); in sbz_pre_dsp_setup()
9013 snd_hda_codec_write(codec, 0x11, 0, in sbz_pre_dsp_setup()
9014 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x44); in sbz_pre_dsp_setup()
9017 static void r3d_pre_dsp_setup(struct hda_codec *codec) in r3d_pre_dsp_setup() argument
9019 chipio_write(codec, 0x18b0a4, 0x000000c2); in r3d_pre_dsp_setup()
9021 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3d_pre_dsp_setup()
9022 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x1E); in r3d_pre_dsp_setup()
9023 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3d_pre_dsp_setup()
9024 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x1C); in r3d_pre_dsp_setup()
9025 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3d_pre_dsp_setup()
9026 VENDOR_CHIPIO_8051_DATA_WRITE, 0x5B); in r3d_pre_dsp_setup()
9028 snd_hda_codec_write(codec, 0x11, 0, in r3d_pre_dsp_setup()
9029 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x44); in r3d_pre_dsp_setup()
9032 static void r3di_pre_dsp_setup(struct hda_codec *codec) in r3di_pre_dsp_setup() argument
9034 chipio_write(codec, 0x18b0a4, 0x000000c2); in r3di_pre_dsp_setup()
9036 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9037 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x1E); in r3di_pre_dsp_setup()
9038 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9039 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x1C); in r3di_pre_dsp_setup()
9040 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9041 VENDOR_CHIPIO_8051_DATA_WRITE, 0x5B); in r3di_pre_dsp_setup()
9043 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9044 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x20); in r3di_pre_dsp_setup()
9045 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9046 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x19); in r3di_pre_dsp_setup()
9047 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9048 VENDOR_CHIPIO_8051_DATA_WRITE, 0x00); in r3di_pre_dsp_setup()
9049 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9050 VENDOR_CHIPIO_8051_DATA_WRITE, 0x40); in r3di_pre_dsp_setup()
9052 snd_hda_codec_write(codec, 0x11, 0, in r3di_pre_dsp_setup()
9053 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x04); in r3di_pre_dsp_setup()
9062 0x400, 0x408, 0x40c, 0x01c, 0xc0c, 0xc00, 0xc04, 0xc0c, 0xc0c, 0xc0c,
9063 0xc0c, 0xc08, 0xc08, 0xc08, 0xc08, 0xc08, 0xc04
9067 0x00000030, 0x00000000, 0x00000003, 0x00000003, 0x00000003,
9068 0x00000003, 0x000000c1, 0x000000f1, 0x00000001, 0x000000c7,
9069 0x000000c1, 0x00000080
9073 0x00000030, 0x00000000, 0x00000000, 0x00000003, 0x00000003,
9074 0x00000003, 0x00000001, 0x000000f1, 0x00000001, 0x000000c7,
9075 0x000000c1, 0x00000080
9079 0x400, 0x42c, 0x46c, 0x4ac, 0x4ec, 0x43c, 0x47c, 0x4bc, 0x4fc, 0x408,
9080 0x100, 0x410, 0x40c, 0x100, 0x100, 0x830, 0x86c, 0x800, 0x86c, 0x800,
9081 0x804, 0x20c, 0x01c, 0xc0c, 0xc00, 0xc04, 0xc0c, 0xc0c, 0xc0c, 0xc0c,
9082 0xc08, 0xc08, 0xc08, 0xc08, 0xc08, 0xc04, 0x01c
9086 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
9087 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000001,
9088 0x00000600, 0x00000014, 0x00000001, 0x0000060f, 0x0000070f,
9089 0x00000aff, 0x00000000, 0x0000006b, 0x00000001, 0x0000006b,
9090 0x00000057, 0x00800000, 0x00880680, 0x00000080, 0x00000030,
9091 0x00000000, 0x00000000, 0x00000003, 0x00000003, 0x00000003,
9092 0x00000001, 0x000000f1, 0x00000001, 0x000000c7, 0x000000c1,
9093 0x00000080, 0x00880680
9096 static void ca0132_mmio_init_sbz(struct hda_codec *codec) in ca0132_mmio_init_sbz() argument
9098 struct ca0132_spec *spec = codec->spec; in ca0132_mmio_init_sbz()
9103 for (i = 0; i < 3; i++) in ca0132_mmio_init_sbz()
9104 writel(0x00000000, spec->mem_base + addr[i]); in ca0132_mmio_init_sbz()
9109 tmp[0] = 0x00880480; in ca0132_mmio_init_sbz()
9110 tmp[1] = 0x00000080; in ca0132_mmio_init_sbz()
9113 tmp[0] = 0x00820680; in ca0132_mmio_init_sbz()
9114 tmp[1] = 0x00000083; in ca0132_mmio_init_sbz()
9117 tmp[0] = 0x00880680; in ca0132_mmio_init_sbz()
9118 tmp[1] = 0x00000083; in ca0132_mmio_init_sbz()
9121 tmp[0] = 0x00000000; in ca0132_mmio_init_sbz()
9122 tmp[1] = 0x00000000; in ca0132_mmio_init_sbz()
9126 for (i = 0; i < 2; i++) in ca0132_mmio_init_sbz()
9127 writel(tmp[i], spec->mem_base + addr[cur_addr + i]); in ca0132_mmio_init_sbz()
9142 for (i = 0; i < count; i++) in ca0132_mmio_init_sbz()
9143 writel(data[i], spec->mem_base + addr[cur_addr + i]); in ca0132_mmio_init_sbz()
9146 static void ca0132_mmio_init_ae5(struct hda_codec *codec) in ca0132_mmio_init_ae5() argument
9148 struct ca0132_spec *spec = codec->spec; in ca0132_mmio_init_ae5()
9157 writel(0x00000680, spec->mem_base + 0x1c); in ca0132_mmio_init_ae5()
9158 writel(0x00880680, spec->mem_base + 0x1c); in ca0132_mmio_init_ae5()
9161 for (i = 0; i < count; i++) { in ca0132_mmio_init_ae5()
9163 * AE-7 shares all writes with the AE-5, except that it writes in ca0132_mmio_init_ae5()
9164 * a different value to 0x20c. in ca0132_mmio_init_ae5()
9167 writel(0x00800001, spec->mem_base + addr[i]); in ca0132_mmio_init_ae5()
9171 writel(data[i], spec->mem_base + addr[i]); in ca0132_mmio_init_ae5()
9175 writel(0x00880680, spec->mem_base + 0x1c); in ca0132_mmio_init_ae5()
9178 static void ca0132_mmio_init(struct hda_codec *codec) in ca0132_mmio_init() argument
9180 struct ca0132_spec *spec = codec->spec; in ca0132_mmio_init()
9186 ca0132_mmio_init_sbz(codec); in ca0132_mmio_init()
9189 ca0132_mmio_init_ae5(codec); in ca0132_mmio_init()
9197 0x304, 0x304, 0x304, 0x304, 0x100, 0x304, 0x100, 0x304, 0x100, 0x304,
9198 0x100, 0x304, 0x86c, 0x800, 0x86c, 0x800, 0x804
9202 0x0f, 0x0e, 0x1f, 0x0c, 0x3f, 0x08, 0x7f, 0x00, 0xff, 0x00, 0x6b,
9203 0x01, 0x6b, 0x57
9208 * eventually resets the codec with the 0x7ff verb. Not quite sure why it does
9211 static void ae5_register_set(struct hda_codec *codec) in ae5_register_set() argument
9213 struct ca0132_spec *spec = codec->spec; in ae5_register_set()
9221 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_register_set()
9222 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x41); in ae5_register_set()
9223 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_register_set()
9224 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc8); in ae5_register_set()
9227 chipio_8051_write_direct(codec, 0x93, 0x10); in ae5_register_set()
9228 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_register_set()
9229 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x44); in ae5_register_set()
9230 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_register_set()
9231 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc2); in ae5_register_set()
9234 tmp[0] = 0x03; in ae5_register_set()
9235 tmp[1] = 0x03; in ae5_register_set()
9236 tmp[2] = 0x07; in ae5_register_set()
9238 tmp[0] = 0x0f; in ae5_register_set()
9239 tmp[1] = 0x0f; in ae5_register_set()
9240 tmp[2] = 0x0f; in ae5_register_set()
9243 for (i = cur_addr = 0; i < 3; i++, cur_addr++) in ae5_register_set()
9244 writeb(tmp[i], spec->mem_base + addr[cur_addr]); in ae5_register_set()
9250 for (i = 0; cur_addr < 12; i++, cur_addr++) in ae5_register_set()
9251 writeb(data[i], spec->mem_base + addr[cur_addr]); in ae5_register_set()
9254 writel(data[i], spec->mem_base + addr[cur_addr]); in ae5_register_set()
9256 writel(0x00800001, spec->mem_base + 0x20c); in ae5_register_set()
9259 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae5_register_set()
9260 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae5_register_set()
9262 ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x3f); in ae5_register_set()
9265 chipio_8051_write_direct(codec, 0x90, 0x00); in ae5_register_set()
9266 chipio_8051_write_direct(codec, 0x90, 0x10); in ae5_register_set()
9269 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_register_set()
9271 chipio_write(codec, 0x18b0a4, 0x000000c2); in ae5_register_set()
9273 snd_hda_codec_write(codec, 0x01, 0, 0x7ff, 0x00); in ae5_register_set()
9274 snd_hda_codec_write(codec, 0x01, 0, 0x7ff, 0x00); in ae5_register_set()
9282 static void ca0132_alt_init(struct hda_codec *codec) in ca0132_alt_init() argument
9284 struct ca0132_spec *spec = codec->spec; in ca0132_alt_init()
9286 ca0132_alt_vol_setup(codec); in ca0132_alt_init()
9290 codec_dbg(codec, "SBZ alt_init"); in ca0132_alt_init()
9291 ca0132_gpio_init(codec); in ca0132_alt_init()
9292 sbz_pre_dsp_setup(codec); in ca0132_alt_init()
9293 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_alt_init()
9294 snd_hda_sequence_write(codec, spec->desktop_init_verbs); in ca0132_alt_init()
9297 codec_dbg(codec, "R3DI alt_init"); in ca0132_alt_init()
9298 ca0132_gpio_init(codec); in ca0132_alt_init()
9299 ca0132_gpio_setup(codec); in ca0132_alt_init()
9300 r3di_gpio_dsp_status_set(codec, R3DI_DSP_DOWNLOADING); in ca0132_alt_init()
9301 r3di_pre_dsp_setup(codec); in ca0132_alt_init()
9302 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_alt_init()
9303 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x6FF, 0xC4); in ca0132_alt_init()
9306 r3d_pre_dsp_setup(codec); in ca0132_alt_init()
9307 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_alt_init()
9308 snd_hda_sequence_write(codec, spec->desktop_init_verbs); in ca0132_alt_init()
9311 ca0132_gpio_init(codec); in ca0132_alt_init()
9312 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_alt_init()
9313 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x49); in ca0132_alt_init()
9314 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_alt_init()
9315 VENDOR_CHIPIO_PLL_PMU_WRITE, 0x88); in ca0132_alt_init()
9316 chipio_write(codec, 0x18b030, 0x00000020); in ca0132_alt_init()
9317 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_alt_init()
9318 snd_hda_sequence_write(codec, spec->desktop_init_verbs); in ca0132_alt_init()
9319 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ca0132_alt_init()
9322 ca0132_gpio_init(codec); in ca0132_alt_init()
9323 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_alt_init()
9324 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x49); in ca0132_alt_init()
9325 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_alt_init()
9326 VENDOR_CHIPIO_PLL_PMU_WRITE, 0x88); in ca0132_alt_init()
9327 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_alt_init()
9328 snd_hda_sequence_write(codec, spec->desktop_init_verbs); in ca0132_alt_init()
9329 chipio_write(codec, 0x18b008, 0x000000f8); in ca0132_alt_init()
9330 chipio_write(codec, 0x18b008, 0x000000f0); in ca0132_alt_init()
9331 chipio_write(codec, 0x18b030, 0x00000020); in ca0132_alt_init()
9332 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ca0132_alt_init()
9335 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_alt_init()
9336 snd_hda_sequence_write(codec, spec->desktop_init_verbs); in ca0132_alt_init()
9343 static int ca0132_init(struct hda_codec *codec) in ca0132_init() argument
9345 struct ca0132_spec *spec = codec->spec; in ca0132_init()
9346 struct auto_pin_cfg *cfg = &spec->autocfg; in ca0132_init()
9352 * there's only two reasons for it. One, the codec has awaken from a in ca0132_init()
9360 if (spec->dsp_state == DSP_DOWNLOADED) { in ca0132_init()
9361 dsp_loaded = dspload_is_loaded(codec); in ca0132_init()
9363 spec->dsp_reload = true; in ca0132_init()
9364 spec->dsp_state = DSP_DOWNLOAD_INIT; in ca0132_init()
9367 sbz_dsp_startup_check(codec); in ca0132_init()
9368 return 0; in ca0132_init()
9372 if (spec->dsp_state != DSP_DOWNLOAD_FAILED) in ca0132_init()
9373 spec->dsp_state = DSP_DOWNLOAD_INIT; in ca0132_init()
9374 spec->curr_chip_addx = INVALID_CHIP_ADDRESS; in ca0132_init()
9377 ca0132_mmio_init(codec); in ca0132_init()
9379 snd_hda_power_up_pm(codec); in ca0132_init()
9382 ae5_register_set(codec); in ca0132_init()
9384 ca0132_init_unsol(codec); in ca0132_init()
9385 ca0132_init_params(codec); in ca0132_init()
9386 ca0132_init_flags(codec); in ca0132_init()
9388 snd_hda_sequence_write(codec, spec->base_init_verbs); in ca0132_init()
9391 ca0132_alt_init(codec); in ca0132_init()
9393 ca0132_download_dsp(codec); in ca0132_init()
9395 ca0132_refresh_widget_caps(codec); in ca0132_init()
9400 r3d_setup_defaults(codec); in ca0132_init()
9404 sbz_setup_defaults(codec); in ca0132_init()
9407 ae5_setup_defaults(codec); in ca0132_init()
9410 ae7_setup_defaults(codec); in ca0132_init()
9413 ca0132_setup_defaults(codec); in ca0132_init()
9414 ca0132_init_analog_mic2(codec); in ca0132_init()
9415 ca0132_init_dmic(codec); in ca0132_init()
9419 for (i = 0; i < spec->num_outputs; i++) in ca0132_init()
9420 init_output(codec, spec->out_pins[i], spec->dacs[0]); in ca0132_init()
9422 init_output(codec, cfg->dig_out_pins[0], spec->dig_out); in ca0132_init()
9424 for (i = 0; i < spec->num_inputs; i++) in ca0132_init()
9425 init_input(codec, spec->input_pins[i], spec->adcs[i]); in ca0132_init()
9427 init_input(codec, cfg->dig_in_pin, spec->dig_in); in ca0132_init()
9430 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_init()
9431 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init()
9432 VENDOR_CHIPIO_PARAM_EX_ID_SET, 0x0D); in ca0132_init()
9433 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init()
9434 VENDOR_CHIPIO_PARAM_EX_VALUE_SET, 0x20); in ca0132_init()
9438 ca0132_gpio_setup(codec); in ca0132_init()
9440 snd_hda_sequence_write(codec, spec->spec_init_verbs); in ca0132_init()
9442 ca0132_alt_select_out(codec); in ca0132_init()
9443 ca0132_alt_select_in(codec); in ca0132_init()
9445 ca0132_select_out(codec); in ca0132_init()
9446 ca0132_select_mic(codec); in ca0132_init()
9449 snd_hda_jack_report_sync(codec); in ca0132_init()
9455 if (spec->dsp_reload) { in ca0132_init()
9456 spec->dsp_reload = false; in ca0132_init()
9457 ca0132_pe_switch_set(codec); in ca0132_init()
9460 snd_hda_power_down_pm(codec); in ca0132_init()
9462 return 0; in ca0132_init()
9465 static int dbpro_init(struct hda_codec *codec) in dbpro_init() argument
9467 struct ca0132_spec *spec = codec->spec; in dbpro_init()
9468 struct auto_pin_cfg *cfg = &spec->autocfg; in dbpro_init()
9471 init_output(codec, cfg->dig_out_pins[0], spec->dig_out); in dbpro_init()
9472 init_input(codec, cfg->dig_in_pin, spec->dig_in); in dbpro_init()
9474 for (i = 0; i < spec->num_inputs; i++) in dbpro_init()
9475 init_input(codec, spec->input_pins[i], spec->adcs[i]); in dbpro_init()
9477 return 0; in dbpro_init()
9480 static void ca0132_free(struct hda_codec *codec) in ca0132_free() argument
9482 struct ca0132_spec *spec = codec->spec; in ca0132_free()
9484 cancel_delayed_work_sync(&spec->unsol_hp_work); in ca0132_free()
9485 snd_hda_power_up(codec); in ca0132_free()
9488 sbz_exit_chip(codec); in ca0132_free()
9491 zxr_exit_chip(codec); in ca0132_free()
9494 r3d_exit_chip(codec); in ca0132_free()
9497 ae5_exit_chip(codec); in ca0132_free()
9500 ae7_exit_chip(codec); in ca0132_free()
9503 r3di_gpio_shutdown(codec); in ca0132_free()
9509 snd_hda_sequence_write(codec, spec->base_exit_verbs); in ca0132_free()
9510 ca0132_exit_chip(codec); in ca0132_free()
9512 snd_hda_power_down(codec); in ca0132_free()
9514 if (spec->mem_base) in ca0132_free()
9515 pci_iounmap(codec->bus->pci, spec->mem_base); in ca0132_free()
9517 kfree(spec->spec_init_verbs); in ca0132_free()
9518 kfree(codec->spec); in ca0132_free()
9521 static void dbpro_free(struct hda_codec *codec) in dbpro_free() argument
9523 struct ca0132_spec *spec = codec->spec; in dbpro_free()
9525 zxr_dbpro_power_state_shutdown(codec); in dbpro_free()
9527 kfree(spec->spec_init_verbs); in dbpro_free()
9528 kfree(codec->spec); in dbpro_free()
9531 static void ca0132_reboot_notify(struct hda_codec *codec) in ca0132_reboot_notify() argument
9533 codec->patch_ops.free(codec); in ca0132_reboot_notify()
9537 static int ca0132_suspend(struct hda_codec *codec) in ca0132_suspend() argument
9539 struct ca0132_spec *spec = codec->spec; in ca0132_suspend()
9541 cancel_delayed_work_sync(&spec->unsol_hp_work); in ca0132_suspend()
9542 return 0; in ca0132_suspend()
9565 static void ca0132_config(struct hda_codec *codec) in ca0132_config() argument
9567 struct ca0132_spec *spec = codec->spec; in ca0132_config()
9569 spec->dacs[0] = 0x2; in ca0132_config()
9570 spec->dacs[1] = 0x3; in ca0132_config()
9571 spec->dacs[2] = 0x4; in ca0132_config()
9573 spec->multiout.dac_nids = spec->dacs; in ca0132_config()
9574 spec->multiout.num_dacs = 3; in ca0132_config()
9577 spec->multiout.max_channels = 2; in ca0132_config()
9579 spec->multiout.max_channels = 6; in ca0132_config()
9583 codec_dbg(codec, "%s: QUIRK_ALIENWARE applied.\n", __func__); in ca0132_config()
9584 snd_hda_apply_pincfgs(codec, alienware_pincfgs); in ca0132_config()
9587 codec_dbg(codec, "%s: QUIRK_SBZ applied.\n", __func__); in ca0132_config()
9588 snd_hda_apply_pincfgs(codec, sbz_pincfgs); in ca0132_config()
9591 codec_dbg(codec, "%s: QUIRK_ZXR applied.\n", __func__); in ca0132_config()
9592 snd_hda_apply_pincfgs(codec, zxr_pincfgs); in ca0132_config()
9595 codec_dbg(codec, "%s: QUIRK_R3D applied.\n", __func__); in ca0132_config()
9596 snd_hda_apply_pincfgs(codec, r3d_pincfgs); in ca0132_config()
9599 codec_dbg(codec, "%s: QUIRK_R3DI applied.\n", __func__); in ca0132_config()
9600 snd_hda_apply_pincfgs(codec, r3di_pincfgs); in ca0132_config()
9603 codec_dbg(codec, "%s: QUIRK_AE5 applied.\n", __func__); in ca0132_config()
9604 snd_hda_apply_pincfgs(codec, ae5_pincfgs); in ca0132_config()
9607 codec_dbg(codec, "%s: QUIRK_AE7 applied.\n", __func__); in ca0132_config()
9608 snd_hda_apply_pincfgs(codec, ae7_pincfgs); in ca0132_config()
9616 spec->num_outputs = 2; in ca0132_config()
9617 spec->out_pins[0] = 0x0b; /* speaker out */ in ca0132_config()
9618 spec->out_pins[1] = 0x0f; in ca0132_config()
9619 spec->shared_out_nid = 0x2; in ca0132_config()
9620 spec->unsol_tag_hp = 0x0f; in ca0132_config()
9622 spec->adcs[0] = 0x7; /* digital mic / analog mic1 */ in ca0132_config()
9623 spec->adcs[1] = 0x8; /* analog mic2 */ in ca0132_config()
9624 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9626 spec->num_inputs = 3; in ca0132_config()
9627 spec->input_pins[0] = 0x12; in ca0132_config()
9628 spec->input_pins[1] = 0x11; in ca0132_config()
9629 spec->input_pins[2] = 0x13; in ca0132_config()
9630 spec->shared_mic_nid = 0x7; in ca0132_config()
9631 spec->unsol_tag_amic1 = 0x11; in ca0132_config()
9635 spec->num_outputs = 2; in ca0132_config()
9636 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9637 spec->out_pins[1] = 0x0F; /* Rear headphone out */ in ca0132_config()
9638 spec->out_pins[2] = 0x10; /* Front Headphone / Center/LFE*/ in ca0132_config()
9639 spec->out_pins[3] = 0x11; /* Rear surround */ in ca0132_config()
9640 spec->shared_out_nid = 0x2; in ca0132_config()
9641 spec->unsol_tag_hp = spec->out_pins[1]; in ca0132_config()
9642 spec->unsol_tag_front_hp = spec->out_pins[2]; in ca0132_config()
9644 spec->adcs[0] = 0x7; /* Rear Mic / Line-in */ in ca0132_config()
9645 spec->adcs[1] = 0x8; /* Front Mic, but only if no DSP */ in ca0132_config()
9646 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9648 spec->num_inputs = 2; in ca0132_config()
9649 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9650 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9651 spec->shared_mic_nid = 0x7; in ca0132_config()
9652 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9655 spec->dig_out = 0x05; in ca0132_config()
9656 spec->multiout.dig_out_nid = spec->dig_out; in ca0132_config()
9657 spec->dig_in = 0x09; in ca0132_config()
9660 spec->num_outputs = 2; in ca0132_config()
9661 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9662 spec->out_pins[1] = 0x0F; /* Rear headphone out */ in ca0132_config()
9663 spec->out_pins[2] = 0x10; /* Center/LFE */ in ca0132_config()
9664 spec->out_pins[3] = 0x11; /* Rear surround */ in ca0132_config()
9665 spec->shared_out_nid = 0x2; in ca0132_config()
9666 spec->unsol_tag_hp = spec->out_pins[1]; in ca0132_config()
9667 spec->unsol_tag_front_hp = spec->out_pins[2]; in ca0132_config()
9669 spec->adcs[0] = 0x7; /* Rear Mic / Line-in */ in ca0132_config()
9670 spec->adcs[1] = 0x8; /* Not connected, no front mic */ in ca0132_config()
9671 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9673 spec->num_inputs = 2; in ca0132_config()
9674 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9675 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9676 spec->shared_mic_nid = 0x7; in ca0132_config()
9677 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9680 spec->adcs[0] = 0x8; /* ZxR DBPro Aux In */ in ca0132_config()
9682 spec->num_inputs = 1; in ca0132_config()
9683 spec->input_pins[0] = 0x11; /* RCA Line-in */ in ca0132_config()
9685 spec->dig_out = 0x05; in ca0132_config()
9686 spec->multiout.dig_out_nid = spec->dig_out; in ca0132_config()
9688 spec->dig_in = 0x09; in ca0132_config()
9692 spec->num_outputs = 2; in ca0132_config()
9693 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9694 spec->out_pins[1] = 0x11; /* Rear headphone out */ in ca0132_config()
9695 spec->out_pins[2] = 0x10; /* Front Headphone / Center/LFE*/ in ca0132_config()
9696 spec->out_pins[3] = 0x0F; /* Rear surround */ in ca0132_config()
9697 spec->shared_out_nid = 0x2; in ca0132_config()
9698 spec->unsol_tag_hp = spec->out_pins[1]; in ca0132_config()
9699 spec->unsol_tag_front_hp = spec->out_pins[2]; in ca0132_config()
9701 spec->adcs[0] = 0x7; /* Rear Mic / Line-in */ in ca0132_config()
9702 spec->adcs[1] = 0x8; /* Front Mic, but only if no DSP */ in ca0132_config()
9703 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9705 spec->num_inputs = 2; in ca0132_config()
9706 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9707 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9708 spec->shared_mic_nid = 0x7; in ca0132_config()
9709 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9712 spec->dig_out = 0x05; in ca0132_config()
9713 spec->multiout.dig_out_nid = spec->dig_out; in ca0132_config()
9716 spec->num_outputs = 2; in ca0132_config()
9717 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9718 spec->out_pins[1] = 0x0F; /* Rear headphone out */ in ca0132_config()
9719 spec->out_pins[2] = 0x10; /* Front Headphone / Center/LFE*/ in ca0132_config()
9720 spec->out_pins[3] = 0x11; /* Rear surround */ in ca0132_config()
9721 spec->shared_out_nid = 0x2; in ca0132_config()
9722 spec->unsol_tag_hp = spec->out_pins[1]; in ca0132_config()
9723 spec->unsol_tag_front_hp = spec->out_pins[2]; in ca0132_config()
9725 spec->adcs[0] = 0x07; /* Rear Mic / Line-in */ in ca0132_config()
9726 spec->adcs[1] = 0x08; /* Front Mic, but only if no DSP */ in ca0132_config()
9727 spec->adcs[2] = 0x0a; /* what u hear */ in ca0132_config()
9729 spec->num_inputs = 2; in ca0132_config()
9730 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9731 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9732 spec->shared_mic_nid = 0x7; in ca0132_config()
9733 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9736 spec->dig_out = 0x05; in ca0132_config()
9737 spec->multiout.dig_out_nid = spec->dig_out; in ca0132_config()
9740 spec->num_outputs = 2; in ca0132_config()
9741 spec->out_pins[0] = 0x0b; /* speaker out */ in ca0132_config()
9742 spec->out_pins[1] = 0x10; /* headphone out */ in ca0132_config()
9743 spec->shared_out_nid = 0x2; in ca0132_config()
9744 spec->unsol_tag_hp = spec->out_pins[1]; in ca0132_config()
9746 spec->adcs[0] = 0x7; /* digital mic / analog mic1 */ in ca0132_config()
9747 spec->adcs[1] = 0x8; /* analog mic2 */ in ca0132_config()
9748 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9750 spec->num_inputs = 3; in ca0132_config()
9751 spec->input_pins[0] = 0x12; in ca0132_config()
9752 spec->input_pins[1] = 0x11; in ca0132_config()
9753 spec->input_pins[2] = 0x13; in ca0132_config()
9754 spec->shared_mic_nid = 0x7; in ca0132_config()
9755 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9758 spec->dig_out = 0x05; in ca0132_config()
9759 spec->multiout.dig_out_nid = spec->dig_out; in ca0132_config()
9760 spec->dig_in = 0x09; in ca0132_config()
9765 static int ca0132_prepare_verbs(struct hda_codec *codec) in ca0132_prepare_verbs() argument
9769 struct ca0132_spec *spec = codec->spec; in ca0132_prepare_verbs()
9771 spec->chip_init_verbs = ca0132_init_verbs0; in ca0132_prepare_verbs()
9777 spec->desktop_init_verbs = ca0132_init_verbs1; in ca0132_prepare_verbs()
9778 spec->spec_init_verbs = kcalloc(NUM_SPEC_VERBS, in ca0132_prepare_verbs()
9781 if (!spec->spec_init_verbs) in ca0132_prepare_verbs()
9782 return -ENOMEM; in ca0132_prepare_verbs()
9785 spec->spec_init_verbs[0].nid = 0x0b; in ca0132_prepare_verbs()
9786 spec->spec_init_verbs[0].param = 0x78D; in ca0132_prepare_verbs()
9787 spec->spec_init_verbs[0].verb = 0x00; in ca0132_prepare_verbs()
9791 spec->spec_init_verbs[2].nid = 0x0b; in ca0132_prepare_verbs()
9792 spec->spec_init_verbs[2].param = AC_VERB_SET_EAPD_BTLENABLE; in ca0132_prepare_verbs()
9793 spec->spec_init_verbs[2].verb = 0x02; in ca0132_prepare_verbs()
9795 spec->spec_init_verbs[3].nid = 0x10; in ca0132_prepare_verbs()
9796 spec->spec_init_verbs[3].param = 0x78D; in ca0132_prepare_verbs()
9797 spec->spec_init_verbs[3].verb = 0x02; in ca0132_prepare_verbs()
9799 spec->spec_init_verbs[4].nid = 0x10; in ca0132_prepare_verbs()
9800 spec->spec_init_verbs[4].param = AC_VERB_SET_EAPD_BTLENABLE; in ca0132_prepare_verbs()
9801 spec->spec_init_verbs[4].verb = 0x02; in ca0132_prepare_verbs()
9804 /* Terminator: spec->spec_init_verbs[NUM_SPEC_VERBS-1] */ in ca0132_prepare_verbs()
9805 return 0; in ca0132_prepare_verbs()
9810 * Sound Blaster Z cards. However, they have different HDA codec subsystem
9814 static void sbz_detect_quirk(struct hda_codec *codec) in sbz_detect_quirk() argument
9816 struct ca0132_spec *spec = codec->spec; in sbz_detect_quirk()
9818 switch (codec->core.subsystem_id) { in sbz_detect_quirk()
9819 case 0x11020033: in sbz_detect_quirk()
9820 spec->quirk = QUIRK_ZXR; in sbz_detect_quirk()
9822 case 0x1102003f: in sbz_detect_quirk()
9823 spec->quirk = QUIRK_ZXR_DBPRO; in sbz_detect_quirk()
9826 spec->quirk = QUIRK_SBZ; in sbz_detect_quirk()
9831 static int patch_ca0132(struct hda_codec *codec) in patch_ca0132() argument
9837 codec_dbg(codec, "patch_ca0132\n"); in patch_ca0132()
9841 return -ENOMEM; in patch_ca0132()
9842 codec->spec = spec; in patch_ca0132()
9843 spec->codec = codec; in patch_ca0132()
9845 /* Detect codec quirk */ in patch_ca0132()
9846 quirk = snd_pci_quirk_lookup(codec->bus->pci, ca0132_quirks); in patch_ca0132()
9848 spec->quirk = quirk->value; in patch_ca0132()
9850 spec->quirk = QUIRK_NONE; in patch_ca0132()
9852 sbz_detect_quirk(codec); in patch_ca0132()
9855 codec->patch_ops = dbpro_patch_ops; in patch_ca0132()
9857 codec->patch_ops = ca0132_patch_ops; in patch_ca0132()
9859 codec->pcm_format_first = 1; in patch_ca0132()
9860 codec->no_sticky_stream = 1; in patch_ca0132()
9863 spec->dsp_state = DSP_DOWNLOAD_INIT; in patch_ca0132()
9864 spec->num_mixers = 1; in patch_ca0132()
9869 spec->mixers[0] = desktop_mixer; in patch_ca0132()
9870 snd_hda_codec_set_name(codec, "Sound Blaster Z"); in patch_ca0132()
9873 spec->mixers[0] = desktop_mixer; in patch_ca0132()
9874 snd_hda_codec_set_name(codec, "Sound Blaster ZxR"); in patch_ca0132()
9879 spec->mixers[0] = desktop_mixer; in patch_ca0132()
9880 snd_hda_codec_set_name(codec, "Recon3D"); in patch_ca0132()
9883 spec->mixers[0] = r3di_mixer; in patch_ca0132()
9884 snd_hda_codec_set_name(codec, "Recon3Di"); in patch_ca0132()
9887 spec->mixers[0] = desktop_mixer; in patch_ca0132()
9888 snd_hda_codec_set_name(codec, "Sound BlasterX AE-5"); in patch_ca0132()
9891 spec->mixers[0] = desktop_mixer; in patch_ca0132()
9892 snd_hda_codec_set_name(codec, "Sound Blaster AE-7"); in patch_ca0132()
9895 spec->mixers[0] = ca0132_mixer; in patch_ca0132()
9906 spec->use_alt_controls = true; in patch_ca0132()
9907 spec->use_alt_functions = true; in patch_ca0132()
9908 spec->use_pci_mmio = true; in patch_ca0132()
9911 spec->use_alt_controls = true; in patch_ca0132()
9912 spec->use_alt_functions = true; in patch_ca0132()
9913 spec->use_pci_mmio = false; in patch_ca0132()
9916 spec->use_alt_controls = false; in patch_ca0132()
9917 spec->use_alt_functions = false; in patch_ca0132()
9918 spec->use_pci_mmio = false; in patch_ca0132()
9923 if (spec->use_pci_mmio) { in patch_ca0132()
9924 spec->mem_base = pci_iomap(codec->bus->pci, 2, 0xC20); in patch_ca0132()
9925 if (spec->mem_base == NULL) { in patch_ca0132()
9926 codec_warn(codec, "pci_iomap failed! Setting quirk to QUIRK_NONE."); in patch_ca0132()
9927 spec->quirk = QUIRK_NONE; in patch_ca0132()
9932 spec->base_init_verbs = ca0132_base_init_verbs; in patch_ca0132()
9933 spec->base_exit_verbs = ca0132_base_exit_verbs; in patch_ca0132()
9935 INIT_DELAYED_WORK(&spec->unsol_hp_work, ca0132_unsol_hp_delayed); in patch_ca0132()
9937 ca0132_init_chip(codec); in patch_ca0132()
9939 ca0132_config(codec); in patch_ca0132()
9941 err = ca0132_prepare_verbs(codec); in patch_ca0132()
9942 if (err < 0) in patch_ca0132()
9945 err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL); in patch_ca0132()
9946 if (err < 0) in patch_ca0132()
9949 return 0; in patch_ca0132()
9952 ca0132_free(codec); in patch_ca0132()
9960 HDA_CODEC_ENTRY(0x11020011, "CA0132", patch_ca0132),
9966 MODULE_DESCRIPTION("Creative Sound Core3D codec");