Lines Matching +full:stm +full:- +full:base

1 /* SPDX-License-Identifier: GPL-2.0 */
4  * This file contains definitions from Hyper-V Hypervisor Top-Level Functional
6  * https://docs.microsoft.com/en-us/virtualization/hyper-v-on-windows/reference/tlfs
89  * than inter-processor interrupts
94  * EOI, ICR and TPR rather than their memory-mapped counterparts
97 /* Recommend using the hypervisor-provided MSR to initiate a system RESET */
107  * Recommend not using Auto End-Of-Interrupt feature
119 /* Indicates that the hypervisor is nested within a Hyper-V partition. */
155  * flushes gva -> hpa mapping entries. To flush the TLB entries derived
176 /* Hyper-V specific model specific registers (MSRs) */
193 /* MSR used to read the per-partition time reference counter */
257 /* Hyper-V guest idle MSR */
260 /* Hyper-V guest crash notification MSR's */
312 /* Hyper-V memory host visibility */
320 #define HV_MAX_MODIFY_GPA_REP_COUNT	((PAGE_SIZE / sizeof(u64)) - 2)
371 		(~((1ull << HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT) - 1))
374 		(1 + (HV_X64_MSR_CRASH_P4 - HV_X64_MSR_CRASH_P0))
382 		(~((1ull << HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_SHIFT) - 1))
384 /* Hyper-V Enlightened VMCS version mask in nested features CPUID */
642  * Note, Hyper-V isn't actually stealing bit 28 from Intel, just abusing it by
644  * on SMI exits to a SMI transfer monitor (STM) and if and only if a MTF VM-Exit
645  * is pending.  I.e. it will never be set by hardware for non-SMI exits (there
646  * are only three), nor will it ever be set unless the VMM is an STM.
651  * Hyper-V uses the software reserved 32 bytes in VMCB control area to expose
668  * Hyper-V uses the software reserved clean bit in VMCB.
672 /* Synthetic VM-Exit */
728 	u64 base;  member
750 	u64 base;  member
802 #include <asm-generic/hyperv-tlfs.h>