Lines Matching +full:4 +full:kb

45 #define KB (1024)  macro
57 	pci_direct_conf1.read(0, 1, reg->dev_func, reg->reg, 4,  in reg_init()
74 	pci_direct_conf1.read(0, 1, PCI_DEVFN(14, 0), 0x10, 4,  in sata_reg_init()
106 	DEFINE_REG(2, 1, 0x10, (64*KB), reg_init, reg_read, reg_write)
107 	DEFINE_REG(3, 0, 0x10, (64*KB), reg_init, reg_read, reg_write)
108 	DEFINE_REG(4, 0, 0x10, (128*KB), reg_init, reg_read, reg_write)
109 	DEFINE_REG(4, 1, 0x10, (128*KB), reg_init, reg_read, reg_write)
110 	DEFINE_REG(6, 0, 0x10, (512*KB), reg_init, reg_read, reg_write)
111 	DEFINE_REG(6, 1, 0x10, (512*KB), reg_init, reg_read, reg_write)
112 	DEFINE_REG(6, 2, 0x10, (64*KB), reg_init, reg_read, reg_write)
114 	DEFINE_REG(8, 1, 0x10, (64*KB), reg_init, reg_read, reg_write)
115 	DEFINE_REG(8, 2, 0x10, (64*KB), reg_init, reg_read, reg_write)
117 	DEFINE_REG(9, 0, 0x14, (64*KB), reg_init, reg_read, reg_write)
128 	DEFINE_REG(11, 4, 0x10, (256), reg_init, reg_read, reg_write)
129 	DEFINE_REG(11, 5, 0x10, (64*KB), reg_init, reg_read, reg_write)
131 	DEFINE_REG(11, 7, 0x10, (64*KB), reg_init, reg_read, reg_write)
133 	DEFINE_REG(12, 0, 0x10, (128*KB), reg_init, reg_read, reg_write)
136 	DEFINE_REG(13, 0, 0x10, (32*KB), reg_init, ehci_reg_read, reg_write)
137 	DEFINE_REG(13, 1, 0x10, (32*KB), reg_init, ehci_reg_read, reg_write)
145 	DEFINE_REG(15, 0, 0x10, (64*KB), reg_init, reg_read, reg_write)
146 	DEFINE_REG(15, 0, 0x14, (64*KB), reg_init, reg_read, reg_write)
147 	DEFINE_REG(16, 0, 0x10, (64*KB), reg_init, reg_read, reg_write)
151 	DEFINE_REG(17, 0, 0x10, (128*KB), reg_init, reg_read, reg_write)
152 	DEFINE_REG(18, 0, 0x10, (1*KB), reg_init, reg_read, reg_write)
171 	mask = 0xFFFFFFFF >> ((4 - len) * 8);  in extract_bytes()
193 		if (len == 4)  in bridge_read()
205 				PCI_BASE_ADDRESS_0, 4, &av_bridge_base);  in bridge_read()