Lines Matching +full:0 +full:x8ff
28 IMX_TIMER1MS = 0x00e0,
30 IMX_P0PHYCR = 0x0178,
37 IMX_P0PHYSR = 0x017c,
39 IMX_P0PHYSR_CR_DATA_OUT = 0xffff << 0,
41 IMX_LANE0_OUT_STAT = 0x2003,
44 IMX_CLOCK_RESET = 0x7f3f,
45 IMX_CLOCK_RESET_RESET = 1 << 0,
47 IMX8QM_SATA_PHY_RX_IMPED_RATIO_OFFSET = 0x03,
48 IMX8QM_SATA_PHY_TX_IMPED_RATIO_OFFSET = 0x09,
49 IMX8QM_SATA_PHY_IMPED_RATIO_85OHM = 0x6c,
50 IMX8QM_LPCG_PHYX2_OFFSET = 0x00000,
51 IMX8QM_CSR_PHYX2_OFFSET = 0x90000,
52 IMX8QM_CSR_PHYX1_OFFSET = 0xa0000,
53 IMX8QM_CSR_PHYX_STTS0_OFFSET = 0x4,
54 IMX8QM_CSR_PCIEA_OFFSET = 0xb0000,
55 IMX8QM_CSR_PCIEB_OFFSET = 0xc0000,
56 IMX8QM_CSR_SATA_OFFSET = 0xd0000,
57 IMX8QM_CSR_PCIE_CTRL2_OFFSET = 0x8,
58 IMX8QM_CSR_MISC_OFFSET = 0xe0000,
60 IMX8QM_LPCG_PHYX2_PCLK0_MASK = (0x3 << 16),
61 IMX8QM_LPCG_PHYX2_PCLK1_MASK = (0x3 << 20),
62 IMX8QM_PHY_APB_RSTN_0 = BIT(0),
64 IMX8QM_PHY_MODE_MASK = (0xf << 17),
70 IMX8QM_MISC_IOB_RXENA = BIT(0),
113 MODULE_PARM_DESC(hotplug, "AHCI IMX hot-plug support (0=Don't support, 1=support)");
139 return timeout ? 0 : -ETIMEDOUT; in imx_phy_crbit_assert()
160 return 0; in imx_phy_reg_addressing()
202 return 0; in imx_phy_reg_write()
222 return 0; in imx_phy_reg_read()
236 IMX6Q_GPR5_SATA_SW_PD, 0); in imx_sata_phy_reset()
239 IMX6Q_GPR5_SATA_SW_RST, 0); in imx_sata_phy_reset()
244 return 0; in imx_sata_phy_reset()
268 return timeout ? 0 : -ETIMEDOUT; in imx_sata_phy_reset()
273 SATA_PHY_CR_CLOCK_CRCMP_LT_LIMIT = 0x0001,
274 SATA_PHY_CR_CLOCK_DAC_CTL = 0x0008,
275 SATA_PHY_CR_CLOCK_RTUNE_CTL = 0x0009,
276 SATA_PHY_CR_CLOCK_ADC_OUT = 0x000A,
277 SATA_PHY_CR_CLOCK_MPLL_TST = 0x0017,
290 index = 0; in read_adc_sum()
291 read_attempt = 0; in read_adc_sum()
292 adc_out_reg = 0; in read_adc_sum()
297 if (adc_out_reg & 0x400) in read_adc_sum()
308 index = 0; in read_adc_sum()
309 read_attempt = 0; in read_adc_sum()
310 read_sum = 0; in read_adc_sum()
313 if (adc_out_reg & 0x400) { in read_adc_sum()
314 read_sum = read_sum + (adc_out_reg & 0x3FF); in read_adc_sum()
339 read_sum = 0; in __sata_ahci_read_temperature()
343 if ((read_sum & 0xffff) != 0) in __sata_ahci_read_temperature()
344 dev_err(dev, "Read/Write REG error, 0x%x!\n", read_sum); in __sata_ahci_read_temperature()
346 imx_phy_reg_write(0x5A5A, mmio); in __sata_ahci_read_temperature()
348 if ((read_sum & 0xffff) != 0x5A5A) in __sata_ahci_read_temperature()
349 dev_err(dev, "Read/Write REG error, 0x%x!\n", read_sum); in __sata_ahci_read_temperature()
351 imx_phy_reg_write(0x1234, mmio); in __sata_ahci_read_temperature()
353 if ((read_sum & 0xffff) != 0x1234) in __sata_ahci_read_temperature()
354 dev_err(dev, "Read/Write REG error, 0x%x!\n", read_sum); in __sata_ahci_read_temperature()
365 str1 = (mpll_test_reg >> 2) & 0x7FF; in __sata_ahci_read_temperature()
366 /* rtune_ctl.mode ([1:0]) */ in __sata_ahci_read_temperature()
367 str2 = (rtune_ctl_reg) & 0x3; in __sata_ahci_read_temperature()
369 str3 = (dac_ctl_reg >> 12) & 0x7; in __sata_ahci_read_temperature()
375 mpll_test_reg = (mpll_test_reg & 0xE03) | (512) << 2; in __sata_ahci_read_temperature()
377 rtune_ctl_reg = (rtune_ctl_reg & 0xFFC) | (1); in __sata_ahci_read_temperature()
379 dac_ctl_reg = (dac_ctl_reg & 0x8FF) | (4) << 12; in __sata_ahci_read_temperature()
381 rtune_ctl_reg = (rtune_ctl_reg & 0xFEF) | (0) << 4; in __sata_ahci_read_temperature()
390 rtune_ctl_reg = (rtune_ctl_reg & 0xFEF) | (1) << 4; in __sata_ahci_read_temperature()
395 mpll_test_reg = (mpll_test_reg & 0xE03) | (str1) << 2; in __sata_ahci_read_temperature()
397 rtune_ctl_reg = (rtune_ctl_reg & 0xFFC) | (str2); in __sata_ahci_read_temperature()
399 dac_ctl_reg = (dac_ctl_reg & 0x8FF) | (str3) << 12; in __sata_ahci_read_temperature()
401 rtune_ctl_reg = (rtune_ctl_reg & 0xFEF) | (str4) << 4; in __sata_ahci_read_temperature()
416 return 0; in __sata_ahci_read_temperature()
428 unsigned int temp = 0; in sata_ahci_show_temp()
432 if (err < 0) in sata_ahci_show_temp()
442 static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, sata_ahci_show_temp, NULL, 0);
459 if (ret < 0) { in imx8_sata_enable()
464 if (ret < 0) { in imx8_sata_enable()
469 if (ret < 0) { in imx8_sata_enable()
474 if (ret < 0) { in imx8_sata_enable()
479 if (ret < 0) { in imx8_sata_enable()
486 if ((val & IMX8QM_CTRL_LTSSM_ENABLE) == 0) { in imx8_sata_enable()
497 if ((reg & IMX8QM_CTRL_LTSSM_ENABLE) == 0) { in imx8_sata_enable()
506 if (((reg | val) & IMX8QM_CTRL_LTSSM_ENABLE) == 0) { in imx8_sata_enable()
512 0); in imx8_sata_enable()
533 * BIT0 RXENA 1, BIT1 TXENA 0 in imx8_sata_enable()
543 0); in imx8_sata_enable()
572 0); in imx8_sata_enable()
588 0); in imx8_sata_enable()
600 for (i = 0; i < 100; i++) { in imx8_sata_enable()
658 return 0; in imx_sata_enable()
665 if (ret < 0) in imx_sata_enable()
672 * is 0x07ffffff, and the other one write for setting in imx_sata_enable()
704 return 0; in imx_sata_enable()
872 { 0, IMX6Q_GPR13_SATA_TX_BOOST_0_00_DB },
934 .set_value = 0,
942 u32 reg_value = 0; in imx_ahci_parse_props()
945 for (i = 0; i < num; i++, prop++) { in imx_ahci_parse_props()
948 if (prop->num_values == 0) { in imx_ahci_parse_props()
963 for (j = 0; j < prop->num_values; j++) { in imx_ahci_parse_props()
1047 return 0; in imx8_sata_probe()
1115 hpriv = ahci_platform_get_resources(pdev, 0); in imx_ahci_probe()
1139 devm_thermal_of_zone_register(hwmon_dev, 0, hwmon_dev, in imx_ahci_probe()
1161 if (!(reg_val & 0x1)) { in imx_ahci_probe()
1162 reg_val |= 0x1; in imx_ahci_probe()
1174 return 0; in imx_ahci_probe()
1205 return 0; in imx_ahci_suspend()