Lines Matching +full:data +full:- +full:shift
1 // SPDX-License-Identifier: GPL-2.0+
3 * Amlogic Meson-G12A Clock Controller Driver
13 #include <linux/clk-provider.h>
20 #include "clk-mpll.h"
21 #include "clk-pll.h"
22 #include "clk-regmap.h"
23 #include "clk-cpu-dyndiv.h"
24 #include "vid-pll-div.h"
25 #include "meson-eeclk.h"
28 #include <dt-bindings/clock/g12a-clkc.h>
33 .data = &(struct meson_clk_pll_data){
36 .shift = 28,
41 .shift = 0,
46 .shift = 10,
51 .shift = 0,
56 .shift = 31,
61 .shift = 29,
76 .data = &(struct clk_regmap_div_data){
78 .shift = 16,
102 .data = &(struct meson_clk_pll_data){
105 .shift = 28,
110 .shift = 0,
115 .shift = 10,
120 .shift = 31,
125 .shift = 29,
143 .data = &(struct clk_regmap_div_data){
145 .shift = 16,
161 .data = &(struct meson_clk_pll_data){
164 .shift = 28,
169 .shift = 0,
174 .shift = 10,
179 .shift = 31,
184 .shift = 29,
202 .data = &(struct clk_regmap_div_data){
204 .shift = 16,
220 .data = &(struct clk_regmap_gate_data){
237 .data = &(struct clk_regmap_gate_data){
293 .data = &(struct clk_regmap_gate_data){
311 * b) CCF has a clock hand-off mechanism to make the sure the
330 .data = &(struct clk_regmap_gate_data){
347 * b) CCF has a clock hand-off mechanism to make the sure the
356 .data = &(struct clk_regmap_mux_data){
359 .shift = 0,
377 .data = &(struct clk_regmap_mux_data){
380 .shift = 16,
391 /* This sub-tree is used a parking clock */
398 .data = &(struct meson_clk_cpu_dyndiv_data){
401 .shift = 4,
406 .shift = 26,
423 .data = &(struct clk_regmap_mux_data){
426 .shift = 2,
443 .data = &(struct clk_regmap_div_data){
445 .shift = 20,
460 .data = &(struct clk_regmap_mux_data){
463 .shift = 18,
473 /* This sub-tree is used a parking clock */
480 .data = &(struct clk_regmap_mux_data){
483 .shift = 10,
500 .data = &(struct clk_regmap_mux_data){
503 .shift = 11,
520 .data = &(struct clk_regmap_mux_data){
523 .shift = 11,
540 .data = &(struct clk_regmap_mux_data){
543 .shift = 0,
561 .data = &(struct meson_clk_cpu_dyndiv_data){
564 .shift = 4,
569 .shift = 26,
586 .data = &(struct clk_regmap_mux_data){
589 .shift = 2,
606 .data = &(struct clk_regmap_mux_data){
609 .shift = 16,
620 /* This sub-tree is used a parking clock */
627 .data = &(struct clk_regmap_div_data){
629 .shift = 20,
644 .data = &(struct clk_regmap_mux_data){
647 .shift = 18,
657 /* This sub-tree is used a parking clock */
664 .data = &(struct clk_regmap_mux_data){
667 .shift = 10,
684 .data = &(struct clk_regmap_mux_data){
687 .shift = 11,
706 .data = &(struct clk_regmap_mux_data){
709 .shift = 0,
726 .data = &(struct clk_regmap_mux_data){
729 .shift = 16,
746 .data = &(struct clk_regmap_div_data){
748 .shift = 4,
763 .data = &(struct clk_regmap_mux_data){
766 .shift = 2,
781 .data = &(struct clk_regmap_div_data){
783 .shift = 20,
798 .data = &(struct clk_regmap_mux_data){
801 .shift = 18,
816 .data = &(struct clk_regmap_mux_data){
819 .shift = 10,
834 .data = &(struct clk_regmap_mux_data){
837 .shift = 11,
852 .data = &(struct clk_regmap_mux_data){
855 .shift = 24,
870 .data = &(struct clk_regmap_mux_data){
873 .shift = 25,
888 .data = &(struct clk_regmap_mux_data){
891 .shift = 26,
906 .data = &(struct clk_regmap_mux_data){
909 .shift = 27,
923 unsigned long event, void *data) in g12a_cpu_clk_mux_notifier_cb() argument
948 unsigned long event, void *data) in g12a_cpu_clk_postmux_notifier_cb() argument
959 * \- cpu_clk_dyn in g12a_cpu_clk_postmux_notifier_cb()
960 * \- cpu_clk_postmux0 in g12a_cpu_clk_postmux_notifier_cb()
961 * \- cpu_clk_muxX_div in g12a_cpu_clk_postmux_notifier_cb()
962 * \- cpu_clk_premux0 in g12a_cpu_clk_postmux_notifier_cb()
963 * \- fclk_div3 or fclk_div2 in g12a_cpu_clk_postmux_notifier_cb()
965 * \- cpu_clk_premux0 in g12a_cpu_clk_postmux_notifier_cb()
966 * \- fclk_div3 or fclk_div2 in g12a_cpu_clk_postmux_notifier_cb()
970 clk_hw_set_parent(nb_data->cpu_clk_premux1, in g12a_cpu_clk_postmux_notifier_cb()
971 nb_data->xtal); in g12a_cpu_clk_postmux_notifier_cb()
974 clk_hw_set_parent(nb_data->cpu_clk_postmux1, in g12a_cpu_clk_postmux_notifier_cb()
975 nb_data->cpu_clk_premux1); in g12a_cpu_clk_postmux_notifier_cb()
978 clk_hw_set_parent(nb_data->cpu_clk_dyn, in g12a_cpu_clk_postmux_notifier_cb()
979 nb_data->cpu_clk_postmux1); in g12a_cpu_clk_postmux_notifier_cb()
984 * \- cpu_clk_dyn in g12a_cpu_clk_postmux_notifier_cb()
985 * \- cpu_clk_postmux1 in g12a_cpu_clk_postmux_notifier_cb()
986 * \- cpu_clk_premux1 in g12a_cpu_clk_postmux_notifier_cb()
987 * \- xtal in g12a_cpu_clk_postmux_notifier_cb()
1002 clk_hw_set_parent(nb_data->cpu_clk_dyn, in g12a_cpu_clk_postmux_notifier_cb()
1003 nb_data->cpu_clk_postmux0); in g12a_cpu_clk_postmux_notifier_cb()
1008 * \- cpu_clk_dyn in g12a_cpu_clk_postmux_notifier_cb()
1009 * \- cpu_clk_postmux0 in g12a_cpu_clk_postmux_notifier_cb()
1010 * \- cpu_clk_muxX_div in g12a_cpu_clk_postmux_notifier_cb()
1011 * \- cpu_clk_premux0 in g12a_cpu_clk_postmux_notifier_cb()
1012 * \- fclk_div3 or fclk_div2 in g12a_cpu_clk_postmux_notifier_cb()
1014 * \- cpu_clk_premux0 in g12a_cpu_clk_postmux_notifier_cb()
1015 * \- fclk_div3 or fclk_div2 in g12a_cpu_clk_postmux_notifier_cb()
1051 unsigned long event, void *data) in g12a_sys_pll_notifier_cb() argument
1062 * \- sys_pll in g12a_sys_pll_notifier_cb()
1063 * \- sys_pll_dco in g12a_sys_pll_notifier_cb()
1067 clk_hw_set_parent(nb_data->cpu_clk, in g12a_sys_pll_notifier_cb()
1068 nb_data->cpu_clk_dyn); in g12a_sys_pll_notifier_cb()
1073 * \- cpu_clk_dyn in g12a_sys_pll_notifier_cb()
1074 * \- cpu_clk_dynX in g12a_sys_pll_notifier_cb()
1075 * \- cpu_clk_dynX_sel in g12a_sys_pll_notifier_cb()
1076 * \- cpu_clk_dynX_div in g12a_sys_pll_notifier_cb()
1077 * \- xtal/fclk_div2/fclk_div3 in g12a_sys_pll_notifier_cb()
1078 * \- xtal/fclk_div2/fclk_div3 in g12a_sys_pll_notifier_cb()
1092 clk_hw_set_parent(nb_data->cpu_clk, in g12a_sys_pll_notifier_cb()
1093 nb_data->sys_pll); in g12a_sys_pll_notifier_cb()
1099 * \- sys_pll in g12a_sys_pll_notifier_cb()
1100 * \- sys_pll_dco in g12a_sys_pll_notifier_cb()
1134 .data = &(struct clk_regmap_gate_data){
1152 .index = -1,
1163 .data = &(struct clk_regmap_gate_data){
1208 .data = &(struct clk_regmap_div_data){
1210 .shift = 3,
1219 .index = -1,
1226 .data = &(struct clk_regmap_gate_data){
1245 .data = &(struct clk_regmap_div_data){
1247 .shift = 6,
1256 .index = -1,
1263 .data = &(struct clk_regmap_gate_data){
1282 .data = &(struct clk_regmap_div_data){
1284 .shift = 9,
1293 .index = -1,
1300 .data = &(struct clk_regmap_gate_data){
1319 .data = &(struct clk_regmap_div_data){
1321 .shift = 20,
1330 .index = -1,
1337 .data = &(struct clk_regmap_gate_data){
1448 .data = &(struct clk_regmap_mux_data){
1451 .shift = 3,
1471 .data = &(struct clk_regmap_gate_data){
1491 .data = &(struct clk_regmap_mux_data){
1494 .shift = 6,
1514 .data = &(struct clk_regmap_gate_data){
1534 .data = &(struct clk_regmap_mux_data){
1537 .shift = 9,
1557 .data = &(struct clk_regmap_gate_data){
1577 .data = &(struct clk_regmap_mux_data){
1580 .shift = 20,
1600 .data = &(struct clk_regmap_gate_data){
1637 .data = &(struct meson_clk_pll_data){
1640 .shift = 28,
1645 .shift = 0,
1650 .shift = 10,
1655 .shift = 0,
1660 .shift = 31,
1665 .shift = 29,
1683 .data = &(struct clk_regmap_div_data){
1685 .shift = 16,
1702 .data = &(struct meson_clk_pll_data){
1705 .shift = 28,
1710 .shift = 0,
1715 .shift = 10,
1720 .shift = 0,
1725 .shift = 31,
1730 .shift = 29,
1747 .data = &(struct clk_regmap_div_data){
1749 .shift = 16,
1777 .data = &(struct meson_clk_pll_data){
1780 .shift = 28,
1785 .shift = 0,
1790 .shift = 10,
1795 .shift = 0,
1800 .shift = 31,
1805 .shift = 29,
1824 .data = &(struct clk_regmap_div_data){
1826 .shift = 16,
1869 .data = &(struct meson_clk_pll_data){
1872 .shift = 28,
1877 .shift = 0,
1882 .shift = 10,
1887 .shift = 0,
1892 .shift = 31,
1897 .shift = 29,
1929 .data = &(struct clk_regmap_div_data){
1931 .shift = 16,
1963 .data = &(struct meson_clk_pll_data){
1966 .shift = 28,
1971 .shift = 0,
1976 .shift = 10,
1981 .shift = 0,
1986 .shift = 30,
1991 .shift = 29,
2011 .data = &(struct clk_regmap_div_data){
2013 .shift = 16,
2029 .data = &(struct clk_regmap_div_data){
2031 .shift = 18,
2047 .data = &(struct clk_regmap_div_data){
2049 .shift = 20,
2076 .data = &(struct clk_regmap_gate_data){
2102 .data = &(struct clk_regmap_gate_data){
2128 .data = &(struct clk_regmap_gate_data){
2156 .data = &(struct clk_regmap_gate_data){
2184 .data = &(struct clk_regmap_mux_data){
2187 .shift = 5,
2218 .data = &(struct meson_clk_mpll_data){
2221 .shift = 0,
2226 .shift = 30,
2231 .shift = 20,
2236 .shift = 29,
2254 .data = &(struct clk_regmap_gate_data){
2272 .data = &(struct meson_clk_mpll_data){
2275 .shift = 0,
2280 .shift = 30,
2285 .shift = 20,
2290 .shift = 29,
2308 .data = &(struct clk_regmap_gate_data){
2326 .data = &(struct meson_clk_mpll_data){
2329 .shift = 0,
2334 .shift = 30,
2339 .shift = 20,
2344 .shift = 29,
2362 .data = &(struct clk_regmap_gate_data){
2380 .data = &(struct meson_clk_mpll_data){
2383 .shift = 0,
2388 .shift = 30,
2393 .shift = 20,
2398 .shift = 29,
2416 .data = &(struct clk_regmap_gate_data){
2441 .data = &(struct clk_regmap_mux_data){
2444 .shift = 12,
2456 .data = &(struct clk_regmap_div_data){
2458 .shift = 0,
2473 .data = &(struct clk_regmap_gate_data){
2504 .data = &(struct clk_regmap_mux_data){
2507 .shift = 9,
2519 .data = &(struct clk_regmap_div_data){
2521 .shift = 0,
2536 .data = &(struct clk_regmap_gate_data){
2553 .data = &(struct clk_regmap_mux_data){
2556 .shift = 25,
2568 .data = &(struct clk_regmap_div_data){
2570 .shift = 16,
2585 .data = &(struct clk_regmap_gate_data){
2602 .data = &(struct clk_regmap_mux_data){
2605 .shift = 9,
2617 .data = &(struct clk_regmap_div_data){
2619 .shift = 0,
2634 .data = &(struct clk_regmap_gate_data){
2652 .data = &(struct meson_vid_pll_div_data){
2655 .shift = 0,
2660 .shift = 16,
2679 .data = &(struct clk_regmap_mux_data){
2682 .shift = 18,
2698 .data = &(struct clk_regmap_gate_data){
2727 .data = &(struct clk_regmap_mux_data){
2730 .shift = 9,
2742 .data = &(struct clk_regmap_div_data){
2744 .shift = 0,
2757 .data = &(struct clk_regmap_gate_data){
2771 .data = &(struct clk_regmap_mux_data){
2774 .shift = 25,
2786 .data = &(struct clk_regmap_div_data){
2788 .shift = 16,
2801 .data = &(struct clk_regmap_gate_data){
2815 .data = &(struct clk_regmap_mux_data){
2818 .shift = 31,
2849 .data = &(struct clk_regmap_mux_data){
2852 .shift = 9,
2865 .data = &(struct clk_regmap_div_data){
2867 .shift = 0,
2883 .data = &(struct clk_regmap_gate_data){
2899 .data = &(struct clk_regmap_mux_data){
2902 .shift = 9,
2915 .data = &(struct clk_regmap_div_data){
2917 .shift = 0,
2933 .data = &(struct clk_regmap_gate_data){
2949 .data = &(struct clk_regmap_mux_data){
2952 .shift = 25,
2965 .data = &(struct clk_regmap_div_data){
2967 .shift = 16,
2983 .data = &(struct clk_regmap_gate_data){
3012 .data = &(struct clk_regmap_mux_data){
3015 .shift = 9,
3027 .data = &(struct clk_regmap_div_data){
3029 .shift = 0,
3044 .data = &(struct clk_regmap_gate_data){
3060 .data = &(struct clk_regmap_mux_data){
3063 .shift = 25,
3075 .data = &(struct clk_regmap_div_data){
3077 .shift = 16,
3092 .data = &(struct clk_regmap_gate_data){
3108 .data = &(struct clk_regmap_mux_data){
3111 .shift = 31,
3130 .data = &(struct clk_regmap_gate_data){
3155 .data = &(struct clk_regmap_mux_data){
3158 .shift = 16,
3170 .data = &(struct clk_regmap_mux_data){
3173 .shift = 16,
3185 .data = &(struct clk_regmap_gate_data){
3199 .data = &(struct clk_regmap_gate_data){
3213 .data = &(struct clk_regmap_div_data){
3215 .shift = 0,
3230 .data = &(struct clk_regmap_div_data){
3232 .shift = 0,
3247 .data = &(struct clk_regmap_gate_data){
3261 .data = &(struct clk_regmap_gate_data){
3275 .data = &(struct clk_regmap_gate_data){
3289 .data = &(struct clk_regmap_gate_data){
3303 .data = &(struct clk_regmap_gate_data){
3317 .data = &(struct clk_regmap_gate_data){
3331 .data = &(struct clk_regmap_gate_data){
3345 .data = &(struct clk_regmap_gate_data){
3359 .data = &(struct clk_regmap_gate_data){
3373 .data = &(struct clk_regmap_gate_data){
3387 .data = &(struct clk_regmap_gate_data){
3401 .data = &(struct clk_regmap_gate_data){
3533 .data = &(struct clk_regmap_mux_data){
3536 .shift = 28,
3549 .data = &(struct clk_regmap_mux_data){
3552 .shift = 20,
3565 .data = &(struct clk_regmap_mux_data){
3568 .shift = 28,
3596 .data = &(struct clk_regmap_mux_data){
3599 .shift = 16,
3612 .data = &(struct clk_regmap_gate_data){
3628 .data = &(struct clk_regmap_gate_data){
3644 .data = &(struct clk_regmap_gate_data){
3660 .data = &(struct clk_regmap_gate_data){
3689 .data = &(struct clk_regmap_mux_data){
3692 .shift = 12,
3705 .data = &(struct clk_regmap_div_data){
3707 .shift = 0,
3722 .data = &(struct clk_regmap_gate_data){
3747 .data = &(struct clk_regmap_mux_data){
3750 .shift = 9,
3763 .data = &(struct clk_regmap_div_data){
3765 .shift = 0,
3778 .data = &(struct clk_regmap_gate_data){
3793 * muxed by a glitch-free switch. The CCF can manage this glitch-free
3794 * mux because it does top-to-bottom updates the each clock tree and
3809 .data = &(struct clk_regmap_mux_data){
3812 .shift = 9,
3830 .data = &(struct clk_regmap_div_data){
3832 .shift = 0,
3847 .data = &(struct clk_regmap_gate_data){
3863 .data = &(struct clk_regmap_mux_data){
3866 .shift = 25,
3884 .data = &(struct clk_regmap_div_data){
3886 .shift = 16,
3901 .data = &(struct clk_regmap_gate_data){
3922 .data = &(struct clk_regmap_mux_data){
3925 .shift = 31,
3937 .data = &(struct clk_regmap_div_data){
3939 .shift = 0,
3953 .data = &(struct clk_regmap_gate_data){
3980 .data = &(struct clk_regmap_mux_data){
3983 .shift = 7,
3994 .data = &(struct clk_regmap_div_data){
3996 .shift = 0,
4011 .data = &(struct clk_regmap_gate_data){
4027 .data = &(struct clk_regmap_mux_data){
4030 .shift = 23,
4041 .data = &(struct clk_regmap_div_data){
4043 .shift = 16,
4058 .data = &(struct clk_regmap_gate_data){
4087 .data = &(struct clk_regmap_mux_data){
4090 .shift = 9,
4101 .data = &(struct clk_regmap_div_data){
4103 .shift = 0,
4118 .data = &(struct clk_regmap_gate_data){
4134 .data = &(struct clk_regmap_mux_data){
4137 .shift = 25,
4148 .data = &(struct clk_regmap_div_data){
4150 .shift = 16,
4165 .data = &(struct clk_regmap_gate_data){
5281 struct device *dev = &pdev->dev; in meson_g12b_dvfs_setup()
5358 struct device *dev = &pdev->dev; in meson_g12a_dvfs_setup()
5398 eeclkc_data = of_device_get_match_data(&pdev->dev); in meson_g12a_probe()
5400 return -EINVAL; in meson_g12a_probe()
5409 if (g12a_data->dvfs_setup) in meson_g12a_probe()
5410 return g12a_data->dvfs_setup(pdev); in meson_g12a_probe()
5455 .compatible = "amlogic,g12a-clkc",
5456 .data = &g12a_clkc_data.eeclkc_data
5459 .compatible = "amlogic,g12b-clkc",
5460 .data = &g12b_clkc_data.eeclkc_data
5463 .compatible = "amlogic,sm1-clkc",
5464 .data = &sm1_clkc_data.eeclkc_data
5473 .name = "g12a-clkc",