Lines Matching +full:dma +full:- +full:engine
1 // SPDX-License-Identifier: GPL-2.0-only
6 * Author: Boris Brezillon <boris.brezillon@free-electrons.com>
19 if (!sgiter->sg) in mv_cesa_req_dma_iter_next_transfer()
22 sgiter->op_offset += len; in mv_cesa_req_dma_iter_next_transfer()
23 sgiter->offset += len; in mv_cesa_req_dma_iter_next_transfer()
24 if (sgiter->offset == sg_dma_len(sgiter->sg)) { in mv_cesa_req_dma_iter_next_transfer()
25 if (sg_is_last(sgiter->sg)) in mv_cesa_req_dma_iter_next_transfer()
27 sgiter->offset = 0; in mv_cesa_req_dma_iter_next_transfer()
28 sgiter->sg = sg_next(sgiter->sg); in mv_cesa_req_dma_iter_next_transfer()
31 if (sgiter->op_offset == iter->op_len) in mv_cesa_req_dma_iter_next_transfer()
39 struct mv_cesa_engine *engine = dreq->engine; in mv_cesa_dma_step() local
41 spin_lock_bh(&engine->lock); in mv_cesa_dma_step()
42 if (engine->chain_sw.first == dreq->chain.first) { in mv_cesa_dma_step()
43 engine->chain_sw.first = NULL; in mv_cesa_dma_step()
44 engine->chain_sw.last = NULL; in mv_cesa_dma_step()
46 engine->chain_hw.first = dreq->chain.first; in mv_cesa_dma_step()
47 engine->chain_hw.last = dreq->chain.last; in mv_cesa_dma_step()
48 spin_unlock_bh(&engine->lock); in mv_cesa_dma_step()
50 writel_relaxed(0, engine->regs + CESA_SA_CFG); in mv_cesa_dma_step()
52 mv_cesa_set_int_mask(engine, CESA_SA_INT_ACC0_IDMA_DONE); in mv_cesa_dma_step()
55 engine->regs + CESA_TDMA_CONTROL); in mv_cesa_dma_step()
59 engine->regs + CESA_SA_CFG); in mv_cesa_dma_step()
60 writel_relaxed(dreq->chain.first->cur_dma, in mv_cesa_dma_step()
61 engine->regs + CESA_TDMA_NEXT_ADDR); in mv_cesa_dma_step()
62 WARN_ON(readl(engine->regs + CESA_SA_CMD) & in mv_cesa_dma_step()
64 writel(CESA_SA_CMD_EN_CESA_SA_ACCL0, engine->regs + CESA_SA_CMD); in mv_cesa_dma_step()
71 for (tdma = dreq->chain.first; tdma;) { in mv_cesa_dma_cleanup()
73 u32 type = tdma->flags & CESA_TDMA_TYPE_MSK; in mv_cesa_dma_cleanup()
76 dma_pool_free(cesa_dev->dma->op_pool, tdma->op, in mv_cesa_dma_cleanup()
77 le32_to_cpu(tdma->src)); in mv_cesa_dma_cleanup()
79 tdma = tdma->next; in mv_cesa_dma_cleanup()
80 dma_pool_free(cesa_dev->dma->tdma_desc_pool, old_tdma, in mv_cesa_dma_cleanup()
81 old_tdma->cur_dma); in mv_cesa_dma_cleanup()
84 dreq->chain.first = NULL; in mv_cesa_dma_cleanup()
85 dreq->chain.last = NULL; in mv_cesa_dma_cleanup()
89 struct mv_cesa_engine *engine) in mv_cesa_dma_prepare() argument
93 for (tdma = dreq->chain.first; tdma; tdma = tdma->next) { in mv_cesa_dma_prepare()
94 if (tdma->flags & CESA_TDMA_DST_IN_SRAM) in mv_cesa_dma_prepare()
95 tdma->dst = cpu_to_le32(tdma->dst_dma + engine->sram_dma); in mv_cesa_dma_prepare()
97 if (tdma->flags & CESA_TDMA_SRC_IN_SRAM) in mv_cesa_dma_prepare()
98 tdma->src = cpu_to_le32(tdma->src_dma + engine->sram_dma); in mv_cesa_dma_prepare()
100 if ((tdma->flags & CESA_TDMA_TYPE_MSK) == CESA_TDMA_OP) in mv_cesa_dma_prepare()
101 mv_cesa_adjust_op(engine, tdma->op); in mv_cesa_dma_prepare()
105 void mv_cesa_tdma_chain(struct mv_cesa_engine *engine, in mv_cesa_tdma_chain() argument
108 struct mv_cesa_tdma_desc *last = engine->chain_sw.last; in mv_cesa_tdma_chain()
111 * Break the DMA chain if the request being queued needs the IV in mv_cesa_tdma_chain()
114 if (!last || dreq->chain.first->flags & CESA_TDMA_SET_STATE) in mv_cesa_tdma_chain()
115 engine->chain_sw.first = dreq->chain.first; in mv_cesa_tdma_chain()
117 last->next = dreq->chain.first; in mv_cesa_tdma_chain()
118 last->next_dma = cpu_to_le32(dreq->chain.first->cur_dma); in mv_cesa_tdma_chain()
120 last = dreq->chain.last; in mv_cesa_tdma_chain()
121 engine->chain_sw.last = last; in mv_cesa_tdma_chain()
123 * Break the DMA chain if the CESA_TDMA_BREAK_CHAIN is set on in mv_cesa_tdma_chain()
126 if (last->flags & CESA_TDMA_BREAK_CHAIN) { in mv_cesa_tdma_chain()
127 engine->chain_sw.first = NULL; in mv_cesa_tdma_chain()
128 engine->chain_sw.last = NULL; in mv_cesa_tdma_chain()
132 int mv_cesa_tdma_process(struct mv_cesa_engine *engine, u32 status) in mv_cesa_tdma_process() argument
139 tdma_cur = readl(engine->regs + CESA_TDMA_CUR); in mv_cesa_tdma_process()
141 for (tdma = engine->chain_hw.first; tdma; tdma = next) { in mv_cesa_tdma_process()
142 spin_lock_bh(&engine->lock); in mv_cesa_tdma_process()
143 next = tdma->next; in mv_cesa_tdma_process()
144 spin_unlock_bh(&engine->lock); in mv_cesa_tdma_process()
146 if (tdma->flags & CESA_TDMA_END_OF_REQ) { in mv_cesa_tdma_process()
151 spin_lock_bh(&engine->lock); in mv_cesa_tdma_process()
154 * request in engine->req. in mv_cesa_tdma_process()
157 req = engine->req; in mv_cesa_tdma_process()
159 req = mv_cesa_dequeue_req_locked(engine, in mv_cesa_tdma_process()
162 /* Re-chaining to the next request */ in mv_cesa_tdma_process()
163 engine->chain_hw.first = tdma->next; in mv_cesa_tdma_process()
164 tdma->next = NULL; in mv_cesa_tdma_process()
167 if (engine->chain_hw.first == NULL) in mv_cesa_tdma_process()
168 engine->chain_hw.last = NULL; in mv_cesa_tdma_process()
169 spin_unlock_bh(&engine->lock); in mv_cesa_tdma_process()
171 ctx = crypto_tfm_ctx(req->tfm); in mv_cesa_tdma_process()
172 current_status = (tdma->cur_dma == tdma_cur) ? in mv_cesa_tdma_process()
174 res = ctx->ops->process(req, current_status); in mv_cesa_tdma_process()
175 ctx->ops->complete(req); in mv_cesa_tdma_process()
178 mv_cesa_engine_enqueue_complete_request(engine, in mv_cesa_tdma_process()
182 crypto_request_complete(backlog, -EINPROGRESS); in mv_cesa_tdma_process()
185 if (res || tdma->cur_dma == tdma_cur) in mv_cesa_tdma_process()
190 * Save the last request in error to engine->req, so that the core in mv_cesa_tdma_process()
194 spin_lock_bh(&engine->lock); in mv_cesa_tdma_process()
195 engine->req = req; in mv_cesa_tdma_process()
196 spin_unlock_bh(&engine->lock); in mv_cesa_tdma_process()
208 new_tdma = dma_pool_zalloc(cesa_dev->dma->tdma_desc_pool, flags, in mv_cesa_dma_add_desc()
211 return ERR_PTR(-ENOMEM); in mv_cesa_dma_add_desc()
213 new_tdma->cur_dma = dma_handle; in mv_cesa_dma_add_desc()
214 if (chain->last) { in mv_cesa_dma_add_desc()
215 chain->last->next_dma = cpu_to_le32(dma_handle); in mv_cesa_dma_add_desc()
216 chain->last->next = new_tdma; in mv_cesa_dma_add_desc()
218 chain->first = new_tdma; in mv_cesa_dma_add_desc()
221 chain->last = new_tdma; in mv_cesa_dma_add_desc()
235 /* We re-use an existing op_desc object to retrieve the context in mv_cesa_dma_add_result_op()
240 for (op_desc = chain->first; op_desc; op_desc = op_desc->next) { in mv_cesa_dma_add_result_op()
241 u32 type = op_desc->flags & CESA_TDMA_TYPE_MSK; in mv_cesa_dma_add_result_op()
248 return -EIO; in mv_cesa_dma_add_result_op()
250 tdma->byte_cnt = cpu_to_le32(size | BIT(31)); in mv_cesa_dma_add_result_op()
251 tdma->src_dma = src; in mv_cesa_dma_add_result_op()
252 tdma->dst_dma = op_desc->src_dma; in mv_cesa_dma_add_result_op()
253 tdma->op = op_desc->op; in mv_cesa_dma_add_result_op()
256 tdma->flags = flags | CESA_TDMA_RESULT; in mv_cesa_dma_add_result_op()
274 op = dma_pool_alloc(cesa_dev->dma->op_pool, flags, &dma_handle); in mv_cesa_dma_add_op()
276 return ERR_PTR(-ENOMEM); in mv_cesa_dma_add_op()
280 size = skip_ctx ? sizeof(op->desc) : sizeof(*op); in mv_cesa_dma_add_op()
282 tdma = chain->last; in mv_cesa_dma_add_op()
283 tdma->op = op; in mv_cesa_dma_add_op()
284 tdma->byte_cnt = cpu_to_le32(size | BIT(31)); in mv_cesa_dma_add_op()
285 tdma->src = cpu_to_le32(dma_handle); in mv_cesa_dma_add_op()
286 tdma->dst_dma = CESA_SA_CFG_SRAM_OFFSET; in mv_cesa_dma_add_op()
287 tdma->flags = CESA_TDMA_DST_IN_SRAM | CESA_TDMA_OP; in mv_cesa_dma_add_op()
302 tdma->byte_cnt = cpu_to_le32(size | BIT(31)); in mv_cesa_dma_add_data_transfer()
303 tdma->src_dma = src; in mv_cesa_dma_add_data_transfer()
304 tdma->dst_dma = dst; in mv_cesa_dma_add_data_transfer()
307 tdma->flags = flags | CESA_TDMA_DATA; in mv_cesa_dma_add_data_transfer()
328 tdma->byte_cnt = cpu_to_le32(BIT(31)); in mv_cesa_dma_add_dummy_end()
338 u32 flags = sgiter->dir == DMA_TO_DEVICE ? in mv_cesa_dma_add_op_transfers()
347 if (sgiter->dir == DMA_TO_DEVICE) { in mv_cesa_dma_add_op_transfers()
348 dst = CESA_SA_DATA_SRAM_OFFSET + sgiter->op_offset; in mv_cesa_dma_add_op_transfers()
349 src = sg_dma_address(sgiter->sg) + sgiter->offset; in mv_cesa_dma_add_op_transfers()
351 dst = sg_dma_address(sgiter->sg) + sgiter->offset; in mv_cesa_dma_add_op_transfers()
352 src = CESA_SA_DATA_SRAM_OFFSET + sgiter->op_offset; in mv_cesa_dma_add_op_transfers()
365 size_t mv_cesa_sg_copy(struct mv_cesa_engine *engine, in mv_cesa_sg_copy() argument
387 len = min(miter.length, buflen - offset); in mv_cesa_sg_copy()
390 if (engine->pool) in mv_cesa_sg_copy()
391 memcpy(engine->sram_pool + sram_off + offset, in mv_cesa_sg_copy()
394 memcpy_toio(engine->sram + sram_off + offset, in mv_cesa_sg_copy()
397 if (engine->pool) in mv_cesa_sg_copy()
399 engine->sram_pool + sram_off + offset, in mv_cesa_sg_copy()
403 engine->sram + sram_off + offset, in mv_cesa_sg_copy()