Lines Matching +full:memory +full:- +full:controllers
1 /* SPDX-License-Identifier: GPL-2.0 */
32 #define SKX_NUM_IMC 2 /* Memory controllers per socket */
33 #define SKX_NUM_CHANNELS 3 /* Channels per memory controller */
61 * Table 15-10 "IA32_MCi_Status [15:0] Compound Error Code Encoding"
62 * memory errors should fit one of these masks:
73 * Errors from either the memory of the 1-level memory system or the
74 * 2nd level memory (the slow "far" memory) of the 2-level memory system.
78 * Errors from the 1st level memory (the fast "near" memory as cache)
79 * of the 2-level memory system.
83 /* Max RRL register sets per {,sub-,pseudo-}channel. */
89 * memory controllers on the die.
98 struct pci_dev *pcu_cr3; /* for HBM memory detection */
101 * Some server BIOS may hide certain memory controllers, and the
102 * EDAC driver skips those hidden memory controllers. However, the
103 * ADXL still decodes memory error address using physical memory
106 * (used the EDAC driver) of present memory controllers during the
115 int num_channels; /* channels per memory controller */
126 * settings of two {sub-,pseudo-}channels in Linux RRL control mode.
211 /* DDR memory controllers per socket */
213 /* DDR channels per DDR memory controller */
215 /* DDR DIMMs per DDR memory channel */
217 /* Per DDR channel memory-mapped I/O size */
219 /* HBM memory controllers per socket */
221 /* HBM channels per HBM memory controller */
223 /* HBM DIMMs per HBM memory channel */
225 /* Per HBM channel memory-mapped I/O size */