Lines Matching +full:edp +full:- +full:bridge
1 // SPDX-License-Identifier: GPL-2.0
134 * struct ti_sn65dsi86 - Platform data for ti-sn65dsi86 driver.
135 * @bridge_aux: AUX-bus sub device for MIPI-to-eDP bridge functionality.
136 * @gpio_aux: AUX-bus sub device for GPIO controller functionality.
137 * @aux_aux: AUX-bus sub device for eDP AUX channel functionality.
138 * @pwm_aux: AUX-bus sub device for PWM controller functionality.
143 * @bridge: Our bridge.
148 * @next_bridge: The bridge on the eDP side.
149 * @enable_gpio: The GPIO we toggle to enable the bridge.
153 * @ln_polrs: Value for the 4-bit LN_POLRS field of SN_ENH_FRAME_REG.
159 * serves double-duty of keeping track of the direction and
165 * each other's read-modify-write.
181 struct drm_bridge bridge; member
230 ret = regmap_bulk_read(pdata->regmap, reg, buf, ARRAY_SIZE(buf)); in ti_sn65dsi86_read_u16()
244 regmap_bulk_write(pdata->regmap, reg, buf, ARRAY_SIZE(buf)); in ti_sn65dsi86_write_u16()
251 &pdata->bridge.encoder->crtc->state->adjusted_mode; in ti_sn_bridge_get_dsi_freq()
253 bit_rate_khz = mode->clock * in ti_sn_bridge_get_dsi_freq()
254 mipi_dsi_pixel_format_to_bpp(pdata->dsi->format); in ti_sn_bridge_get_dsi_freq()
255 clk_freq_khz = bit_rate_khz / (pdata->dsi->lanes * 2); in ti_sn_bridge_get_dsi_freq()
260 /* clk frequencies supported by bridge in Hz in case derived from REFCLK pin */
269 /* clk frequencies supported by bridge in Hz in case derived from DACP/N pin */
285 if (pdata->refclk) { in ti_sn_bridge_set_refclk_freq()
286 refclk_rate = clk_get_rate(pdata->refclk); in ti_sn_bridge_set_refclk_freq()
289 clk_prepare_enable(pdata->refclk); in ti_sn_bridge_set_refclk_freq()
305 regmap_update_bits(pdata->regmap, SN_DPPLL_SRC_REG, REFCLK_FREQ_MASK, in ti_sn_bridge_set_refclk_freq()
312 pdata->pwm_refclk_freq = ti_sn_bridge_refclk_lut[i]; in ti_sn_bridge_set_refclk_freq()
317 mutex_lock(&pdata->comms_mutex); in ti_sn65dsi86_enable_comms()
319 /* configure bridge ref_clk */ in ti_sn65dsi86_enable_comms()
323 * HPD on this bridge chip is a bit useless. This is an eDP bridge in ti_sn65dsi86_enable_comms()
325 * the panel is done powering up. ...but the bridge chip debounces in ti_sn65dsi86_enable_comms()
327 * voltage, and temperate--I measured it at about 200 ms). One in ti_sn65dsi86_enable_comms()
334 * For DisplayPort bridge type, we need HPD. So we use the bridge type in ti_sn65dsi86_enable_comms()
336 * NOTE: The bridge type is set in ti_sn_bridge_probe() but enable_comms() in ti_sn65dsi86_enable_comms()
338 * bridge type is set. We are using bridge type instead of "no-hpd" in ti_sn65dsi86_enable_comms()
343 if (pdata->bridge.type != DRM_MODE_CONNECTOR_DisplayPort) in ti_sn65dsi86_enable_comms()
344 regmap_update_bits(pdata->regmap, SN_HPD_DISABLE_REG, HPD_DISABLE, in ti_sn65dsi86_enable_comms()
347 pdata->comms_enabled = true; in ti_sn65dsi86_enable_comms()
349 mutex_unlock(&pdata->comms_mutex); in ti_sn65dsi86_enable_comms()
354 mutex_lock(&pdata->comms_mutex); in ti_sn65dsi86_disable_comms()
356 pdata->comms_enabled = false; in ti_sn65dsi86_disable_comms()
357 clk_disable_unprepare(pdata->refclk); in ti_sn65dsi86_disable_comms()
359 mutex_unlock(&pdata->comms_mutex); in ti_sn65dsi86_disable_comms()
367 ret = regulator_bulk_enable(SN_REGULATOR_SUPPLY_NUM, pdata->supplies); in ti_sn65dsi86_resume()
376 gpiod_set_value_cansleep(pdata->enable_gpio, 1); in ti_sn65dsi86_resume()
385 if (pdata->refclk) in ti_sn65dsi86_resume()
396 if (pdata->refclk) in ti_sn65dsi86_suspend()
399 gpiod_set_value_cansleep(pdata->enable_gpio, 0); in ti_sn65dsi86_suspend()
401 ret = regulator_bulk_disable(SN_REGULATOR_SUPPLY_NUM, pdata->supplies); in ti_sn65dsi86_suspend()
416 struct ti_sn65dsi86 *pdata = s->private; in status_show()
421 pm_runtime_get_sync(pdata->dev); in status_show()
425 regmap_read(pdata->regmap, reg, &val); in status_show()
429 pm_runtime_put_autosuspend(pdata->dev); in status_show()
435 /* -----------------------------------------------------------------------------
460 struct device *dev = pdata->dev; in ti_sn65dsi86_add_aux_device()
467 return -ENOMEM; in ti_sn65dsi86_add_aux_device()
469 aux->name = name; in ti_sn65dsi86_add_aux_device()
470 aux->id = (client->adapter->nr << 10) | client->addr; in ti_sn65dsi86_add_aux_device()
471 aux->dev.parent = dev; in ti_sn65dsi86_add_aux_device()
472 aux->dev.release = ti_sn65dsi86_aux_device_release; in ti_sn65dsi86_add_aux_device()
473 device_set_of_node_from_dev(&aux->dev, dev); in ti_sn65dsi86_add_aux_device()
493 /* -----------------------------------------------------------------------------
506 u32 request = msg->request & ~(DP_AUX_I2C_MOT | DP_AUX_I2C_WRITE_STATUS_UPDATE); in ti_sn_aux_transfer()
507 u32 request_val = AUX_CMD_REQ(msg->request); in ti_sn_aux_transfer()
508 u8 *buf = msg->buffer; in ti_sn_aux_transfer()
509 unsigned int len = msg->size; in ti_sn_aux_transfer()
513 u8 addr_len[SN_AUX_LENGTH_REG + 1 - SN_AUX_ADDR_19_16_REG]; in ti_sn_aux_transfer()
516 return -EINVAL; in ti_sn_aux_transfer()
518 pm_runtime_get_sync(pdata->dev); in ti_sn_aux_transfer()
519 mutex_lock(&pdata->comms_mutex); in ti_sn_aux_transfer()
524 * do it. Fail right away. This prevents non-refclk users from reading in ti_sn_aux_transfer()
527 if (!pdata->comms_enabled) { in ti_sn_aux_transfer()
528 ret = -EIO; in ti_sn_aux_transfer()
537 regmap_write(pdata->regmap, SN_AUX_CMD_REG, request_val); in ti_sn_aux_transfer()
539 msg->reply = 0; in ti_sn_aux_transfer()
542 ret = -EINVAL; in ti_sn_aux_transfer()
547 put_unaligned_be32((msg->address & SN_AUX_ADDR_MASK) << 8 | len, in ti_sn_aux_transfer()
549 regmap_bulk_write(pdata->regmap, SN_AUX_ADDR_19_16_REG, addr_len, in ti_sn_aux_transfer()
553 regmap_bulk_write(pdata->regmap, SN_AUX_WDATA_REG(0), buf, len); in ti_sn_aux_transfer()
556 regmap_write(pdata->regmap, SN_AUX_CMD_STATUS_REG, in ti_sn_aux_transfer()
561 regmap_write(pdata->regmap, SN_AUX_CMD_REG, request_val | AUX_CMD_SEND); in ti_sn_aux_transfer()
564 ret = regmap_read_poll_timeout(pdata->regmap, SN_AUX_CMD_REG, val, in ti_sn_aux_transfer()
569 ret = regmap_read(pdata->regmap, SN_AUX_CMD_STATUS_REG, &val); in ti_sn_aux_transfer()
579 ret = -ETIMEDOUT; in ti_sn_aux_transfer()
584 ret = regmap_read(pdata->regmap, SN_AUX_LENGTH_REG, &short_len); in ti_sn_aux_transfer()
592 msg->reply |= DP_AUX_I2C_REPLY_NACK; in ti_sn_aux_transfer()
596 msg->reply |= DP_AUX_NATIVE_REPLY_NACK; in ti_sn_aux_transfer()
604 ret = regmap_bulk_read(pdata->regmap, SN_AUX_RDATA_REG(0), buf, len); in ti_sn_aux_transfer()
607 mutex_unlock(&pdata->comms_mutex); in ti_sn_aux_transfer()
608 pm_runtime_mark_last_busy(pdata->dev); in ti_sn_aux_transfer()
609 pm_runtime_put_autosuspend(pdata->dev); in ti_sn_aux_transfer()
637 struct ti_sn65dsi86 *pdata = dev_get_drvdata(adev->dev.parent); in ti_sn_aux_probe()
640 pdata->aux.name = "ti-sn65dsi86-aux"; in ti_sn_aux_probe()
641 pdata->aux.dev = &adev->dev; in ti_sn_aux_probe()
642 pdata->aux.transfer = ti_sn_aux_transfer; in ti_sn_aux_probe()
643 pdata->aux.wait_hpd_asserted = ti_sn_aux_wait_hpd_asserted; in ti_sn_aux_probe()
644 drm_dp_aux_init(&pdata->aux); in ti_sn_aux_probe()
646 ret = devm_of_dp_aux_populate_ep_devices(&pdata->aux); in ti_sn_aux_probe()
651 * The eDP to MIPI bridge parts don't work until the AUX channel is in ti_sn_aux_probe()
654 return ti_sn65dsi86_add_aux_device(pdata, &pdata->bridge_aux, "bridge"); in ti_sn_aux_probe()
668 /*------------------------------------------------------------------------------
669 * DRM Bridge
672 static struct ti_sn65dsi86 *bridge_to_ti_sn65dsi86(struct drm_bridge *bridge) in bridge_to_ti_sn65dsi86() argument
674 return container_of(bridge, struct ti_sn65dsi86, bridge); in bridge_to_ti_sn65dsi86()
682 struct device *dev = pdata->dev; in ti_sn_attach_host()
688 host = of_find_mipi_dsi_host_by_node(pdata->host_node); in ti_sn_attach_host()
690 return -EPROBE_DEFER; in ti_sn_attach_host()
692 dsi = devm_mipi_dsi_device_register_full(&adev->dev, host, &info); in ti_sn_attach_host()
697 dsi->lanes = 4; in ti_sn_attach_host()
698 dsi->format = MIPI_DSI_FMT_RGB888; in ti_sn_attach_host()
699 dsi->mode_flags = MIPI_DSI_MODE_VIDEO; in ti_sn_attach_host()
703 regmap_read(pdata->regmap, SN_DPPLL_SRC_REG, &val); in ti_sn_attach_host()
706 dsi->mode_flags |= MIPI_DSI_CLOCK_NON_CONTINUOUS; in ti_sn_attach_host()
708 pdata->dsi = dsi; in ti_sn_attach_host()
710 return devm_mipi_dsi_attach(&adev->dev, dsi); in ti_sn_attach_host()
713 static int ti_sn_bridge_attach(struct drm_bridge *bridge, in ti_sn_bridge_attach() argument
716 struct ti_sn65dsi86 *pdata = bridge_to_ti_sn65dsi86(bridge); in ti_sn_bridge_attach()
719 pdata->aux.drm_dev = bridge->dev; in ti_sn_bridge_attach()
720 ret = drm_dp_aux_register(&pdata->aux); in ti_sn_bridge_attach()
722 drm_err(bridge->dev, "Failed to register DP AUX channel: %d\n", ret); in ti_sn_bridge_attach()
727 * Attach the next bridge. in ti_sn_bridge_attach()
728 * We never want the next bridge to *also* create a connector. in ti_sn_bridge_attach()
730 ret = drm_bridge_attach(bridge->encoder, pdata->next_bridge, in ti_sn_bridge_attach()
731 &pdata->bridge, flags | DRM_BRIDGE_ATTACH_NO_CONNECTOR); in ti_sn_bridge_attach()
738 pdata->connector = drm_bridge_connector_init(pdata->bridge.dev, in ti_sn_bridge_attach()
739 pdata->bridge.encoder); in ti_sn_bridge_attach()
740 if (IS_ERR(pdata->connector)) { in ti_sn_bridge_attach()
741 ret = PTR_ERR(pdata->connector); in ti_sn_bridge_attach()
745 drm_connector_attach_encoder(pdata->connector, pdata->bridge.encoder); in ti_sn_bridge_attach()
750 drm_dp_aux_unregister(&pdata->aux); in ti_sn_bridge_attach()
754 static void ti_sn_bridge_detach(struct drm_bridge *bridge) in ti_sn_bridge_detach() argument
756 drm_dp_aux_unregister(&bridge_to_ti_sn65dsi86(bridge)->aux); in ti_sn_bridge_detach()
760 ti_sn_bridge_mode_valid(struct drm_bridge *bridge, in ti_sn_bridge_mode_valid() argument
765 if (mode->clock > 594000) in ti_sn_bridge_mode_valid()
773 if ((mode->hsync_start - mode->hdisplay) > 0xff) in ti_sn_bridge_mode_valid()
776 if ((mode->vsync_start - mode->vdisplay) > 0xff) in ti_sn_bridge_mode_valid()
779 if ((mode->hsync_end - mode->hsync_start) > 0x7fff) in ti_sn_bridge_mode_valid()
782 if ((mode->vsync_end - mode->vsync_start) > 0x7fff) in ti_sn_bridge_mode_valid()
785 if ((mode->htotal - mode->hsync_end) > 0xff) in ti_sn_bridge_mode_valid()
788 if ((mode->vtotal - mode->vsync_end) > 0xff) in ti_sn_bridge_mode_valid()
794 static void ti_sn_bridge_atomic_disable(struct drm_bridge *bridge, in ti_sn_bridge_atomic_disable() argument
797 struct ti_sn65dsi86 *pdata = bridge_to_ti_sn65dsi86(bridge); in ti_sn_bridge_atomic_disable()
800 regmap_update_bits(pdata->regmap, SN_ENH_FRAME_REG, VSTREAM_ENABLE, 0); in ti_sn_bridge_atomic_disable()
808 &pdata->bridge.encoder->crtc->state->adjusted_mode; in ti_sn_bridge_set_dsi_rate()
811 bit_rate_mhz = (mode->clock / 1000) * in ti_sn_bridge_set_dsi_rate()
812 mipi_dsi_pixel_format_to_bpp(pdata->dsi->format); in ti_sn_bridge_set_dsi_rate()
813 clk_freq_mhz = bit_rate_mhz / (pdata->dsi->lanes * 2); in ti_sn_bridge_set_dsi_rate()
817 (((clk_freq_mhz - MIN_DSI_CLK_FREQ_MHZ) / 5) & 0xFF); in ti_sn_bridge_set_dsi_rate()
818 regmap_write(pdata->regmap, SN_DSIA_CLK_FREQ_REG, val); in ti_sn_bridge_set_dsi_rate()
823 if (connector->display_info.bpc <= 6) in ti_sn_bridge_get_bpp()
832 * by the bridge in Mbps unit.
843 &pdata->bridge.encoder->crtc->state->adjusted_mode; in ti_sn_bridge_calc_min_dp_rate_idx()
846 bit_rate_khz = mode->clock * bpp; in ti_sn_bridge_calc_min_dp_rate_idx()
850 1000 * pdata->dp_lanes * DP_CLK_FUDGE_DEN); in ti_sn_bridge_calc_min_dp_rate_idx()
852 for (i = 1; i < ARRAY_SIZE(ti_sn_bridge_dp_rate_lut) - 1; i++) in ti_sn_bridge_calc_min_dp_rate_idx()
868 ret = drm_dp_dpcd_readb(&pdata->aux, DP_EDP_DPCD_REV, &dpcd_val); in ti_sn_bridge_read_valid_rates()
870 DRM_DEV_ERROR(pdata->dev, in ti_sn_bridge_read_valid_rates()
871 "Can't read eDP rev (%d), assuming 1.1\n", ret); in ti_sn_bridge_read_valid_rates()
876 /* eDP 1.4 devices must provide a custom table */ in ti_sn_bridge_read_valid_rates()
879 ret = drm_dp_dpcd_read(&pdata->aux, DP_SUPPORTED_LINK_RATES, in ti_sn_bridge_read_valid_rates()
883 DRM_DEV_ERROR(pdata->dev, in ti_sn_bridge_read_valid_rates()
909 DRM_DEV_ERROR(pdata->dev, in ti_sn_bridge_read_valid_rates()
910 "No matching eDP rates in table; falling back\n"); in ti_sn_bridge_read_valid_rates()
914 ret = drm_dp_dpcd_readb(&pdata->aux, DP_MAX_LINK_RATE, &dpcd_val); in ti_sn_bridge_read_valid_rates()
916 DRM_DEV_ERROR(pdata->dev, in ti_sn_bridge_read_valid_rates()
924 DRM_DEV_ERROR(pdata->dev, in ti_sn_bridge_read_valid_rates()
945 &pdata->bridge.encoder->crtc->state->adjusted_mode; in ti_sn_bridge_set_video_timings()
948 if (mode->flags & DRM_MODE_FLAG_NHSYNC) in ti_sn_bridge_set_video_timings()
950 if (mode->flags & DRM_MODE_FLAG_NVSYNC) in ti_sn_bridge_set_video_timings()
954 mode->hdisplay); in ti_sn_bridge_set_video_timings()
956 mode->vdisplay); in ti_sn_bridge_set_video_timings()
957 regmap_write(pdata->regmap, SN_CHA_HSYNC_PULSE_WIDTH_LOW_REG, in ti_sn_bridge_set_video_timings()
958 (mode->hsync_end - mode->hsync_start) & 0xFF); in ti_sn_bridge_set_video_timings()
959 regmap_write(pdata->regmap, SN_CHA_HSYNC_PULSE_WIDTH_HIGH_REG, in ti_sn_bridge_set_video_timings()
960 (((mode->hsync_end - mode->hsync_start) >> 8) & 0x7F) | in ti_sn_bridge_set_video_timings()
962 regmap_write(pdata->regmap, SN_CHA_VSYNC_PULSE_WIDTH_LOW_REG, in ti_sn_bridge_set_video_timings()
963 (mode->vsync_end - mode->vsync_start) & 0xFF); in ti_sn_bridge_set_video_timings()
964 regmap_write(pdata->regmap, SN_CHA_VSYNC_PULSE_WIDTH_HIGH_REG, in ti_sn_bridge_set_video_timings()
965 (((mode->vsync_end - mode->vsync_start) >> 8) & 0x7F) | in ti_sn_bridge_set_video_timings()
968 regmap_write(pdata->regmap, SN_CHA_HORIZONTAL_BACK_PORCH_REG, in ti_sn_bridge_set_video_timings()
969 (mode->htotal - mode->hsync_end) & 0xFF); in ti_sn_bridge_set_video_timings()
970 regmap_write(pdata->regmap, SN_CHA_VERTICAL_BACK_PORCH_REG, in ti_sn_bridge_set_video_timings()
971 (mode->vtotal - mode->vsync_end) & 0xFF); in ti_sn_bridge_set_video_timings()
973 regmap_write(pdata->regmap, SN_CHA_HORIZONTAL_FRONT_PORCH_REG, in ti_sn_bridge_set_video_timings()
974 (mode->hsync_start - mode->hdisplay) & 0xFF); in ti_sn_bridge_set_video_timings()
975 regmap_write(pdata->regmap, SN_CHA_VERTICAL_FRONT_PORCH_REG, in ti_sn_bridge_set_video_timings()
976 (mode->vsync_start - mode->vdisplay) & 0xFF); in ti_sn_bridge_set_video_timings()
986 ret = drm_dp_dpcd_readb(&pdata->aux, DP_MAX_LANE_COUNT, &data); in ti_sn_get_max_lanes()
988 DRM_DEV_ERROR(pdata->dev, in ti_sn_get_max_lanes()
1004 regmap_update_bits(pdata->regmap, SN_DATARATE_CONFIG_REG, in ti_sn_link_training()
1008 regmap_write(pdata->regmap, SN_PLL_ENABLE_REG, 1); in ti_sn_link_training()
1010 ret = regmap_read_poll_timeout(pdata->regmap, SN_DPPLL_SRC_REG, val, in ti_sn_link_training()
1020 * the bridge chip will write DP_SET_POWER_D0 to DP_SET_POWER. If in ti_sn_link_training()
1026 regmap_write(pdata->regmap, SN_ML_TX_MODE_REG, 0x0A); in ti_sn_link_training()
1027 ret = regmap_read_poll_timeout(pdata->regmap, SN_ML_TX_MODE_REG, val, in ti_sn_link_training()
1035 ret = -EIO; in ti_sn_link_training()
1044 DRM_DEV_INFO(pdata->dev, "Link training needed %d retries\n", i); in ti_sn_link_training()
1049 regmap_write(pdata->regmap, SN_PLL_ENABLE_REG, 0); in ti_sn_link_training()
1054 static void ti_sn_bridge_atomic_enable(struct drm_bridge *bridge, in ti_sn_bridge_atomic_enable() argument
1057 struct ti_sn65dsi86 *pdata = bridge_to_ti_sn65dsi86(bridge); in ti_sn_bridge_atomic_enable()
1063 int ret = -EINVAL; in ti_sn_bridge_atomic_enable()
1067 connector = drm_atomic_get_new_connector_for_encoder(old_bridge_state->base.state, in ti_sn_bridge_atomic_enable()
1068 bridge->encoder); in ti_sn_bridge_atomic_enable()
1070 dev_err_ratelimited(pdata->dev, "Could not get the connector\n"); in ti_sn_bridge_atomic_enable()
1075 pdata->dp_lanes = min(pdata->dp_lanes, max_dp_lanes); in ti_sn_bridge_atomic_enable()
1078 val = CHA_DSI_LANES(SN_MAX_DP_LANES - pdata->dsi->lanes); in ti_sn_bridge_atomic_enable()
1079 regmap_update_bits(pdata->regmap, SN_DSI_LANES_REG, in ti_sn_bridge_atomic_enable()
1082 regmap_write(pdata->regmap, SN_LN_ASSIGN_REG, pdata->ln_assign); in ti_sn_bridge_atomic_enable()
1083 regmap_update_bits(pdata->regmap, SN_ENH_FRAME_REG, LN_POLRS_MASK, in ti_sn_bridge_atomic_enable()
1084 pdata->ln_polrs << LN_POLRS_OFFSET); in ti_sn_bridge_atomic_enable()
1091 * this method is enabled for eDP panels. An eDP panel must support this in ti_sn_bridge_atomic_enable()
1092 * authentication method. We need to enable this method in the eDP panel in ti_sn_bridge_atomic_enable()
1098 if (pdata->bridge.type == DRM_MODE_CONNECTOR_eDP) { in ti_sn_bridge_atomic_enable()
1099 drm_dp_dpcd_writeb(&pdata->aux, DP_EDP_CONFIGURATION_SET, in ti_sn_bridge_atomic_enable()
1102 regmap_update_bits(pdata->regmap, SN_TRAINING_SETTING_REG, in ti_sn_bridge_atomic_enable()
1105 regmap_update_bits(pdata->regmap, SN_TRAINING_SETTING_REG, in ti_sn_bridge_atomic_enable()
1112 regmap_update_bits(pdata->regmap, SN_DATA_FORMAT_REG, BPP_18_RGB, val); in ti_sn_bridge_atomic_enable()
1115 val = DP_NUM_LANES(min(pdata->dp_lanes, 3)); in ti_sn_bridge_atomic_enable()
1116 regmap_update_bits(pdata->regmap, SN_SSC_CONFIG_REG, DP_NUM_LANES_MASK, in ti_sn_bridge_atomic_enable()
1133 DRM_DEV_ERROR(pdata->dev, "%s (%d)\n", last_err_str, ret); in ti_sn_bridge_atomic_enable()
1141 regmap_update_bits(pdata->regmap, SN_ENH_FRAME_REG, VSTREAM_ENABLE, in ti_sn_bridge_atomic_enable()
1145 static void ti_sn_bridge_atomic_pre_enable(struct drm_bridge *bridge, in ti_sn_bridge_atomic_pre_enable() argument
1148 struct ti_sn65dsi86 *pdata = bridge_to_ti_sn65dsi86(bridge); in ti_sn_bridge_atomic_pre_enable()
1150 pm_runtime_get_sync(pdata->dev); in ti_sn_bridge_atomic_pre_enable()
1152 if (!pdata->refclk) in ti_sn_bridge_atomic_pre_enable()
1159 static void ti_sn_bridge_atomic_post_disable(struct drm_bridge *bridge, in ti_sn_bridge_atomic_post_disable() argument
1162 struct ti_sn65dsi86 *pdata = bridge_to_ti_sn65dsi86(bridge); in ti_sn_bridge_atomic_post_disable()
1165 regmap_write(pdata->regmap, SN_ML_TX_MODE_REG, 0); in ti_sn_bridge_atomic_post_disable()
1167 regmap_update_bits(pdata->regmap, SN_SSC_CONFIG_REG, DP_NUM_LANES_MASK, 0); in ti_sn_bridge_atomic_post_disable()
1169 regmap_write(pdata->regmap, SN_PLL_ENABLE_REG, 0); in ti_sn_bridge_atomic_post_disable()
1171 if (!pdata->refclk) in ti_sn_bridge_atomic_post_disable()
1174 pm_runtime_put_sync(pdata->dev); in ti_sn_bridge_atomic_post_disable()
1177 static enum drm_connector_status ti_sn_bridge_detect(struct drm_bridge *bridge) in ti_sn_bridge_detect() argument
1179 struct ti_sn65dsi86 *pdata = bridge_to_ti_sn65dsi86(bridge); in ti_sn_bridge_detect()
1186 * debounce time (~100-400 ms). in ti_sn_bridge_detect()
1189 regmap_read(pdata->regmap, SN_HPD_DISABLE_REG, &val); in ti_sn_bridge_detect()
1195 static struct edid *ti_sn_bridge_get_edid(struct drm_bridge *bridge, in ti_sn_bridge_get_edid() argument
1198 struct ti_sn65dsi86 *pdata = bridge_to_ti_sn65dsi86(bridge); in ti_sn_bridge_get_edid()
1200 return drm_get_edid(connector, &pdata->aux.ddc); in ti_sn_bridge_get_edid()
1203 static void ti_sn65dsi86_debugfs_init(struct drm_bridge *bridge, struct dentry *root) in ti_sn65dsi86_debugfs_init() argument
1205 struct ti_sn65dsi86 *pdata = bridge_to_ti_sn65dsi86(bridge); in ti_sn65dsi86_debugfs_init()
1208 debugfs = debugfs_create_dir(dev_name(pdata->dev), root); in ti_sn65dsi86_debugfs_init()
1212 static void ti_sn_bridge_hpd_enable(struct drm_bridge *bridge) in ti_sn_bridge_hpd_enable() argument
1214 struct ti_sn65dsi86 *pdata = bridge_to_ti_sn65dsi86(bridge); in ti_sn_bridge_hpd_enable()
1222 pm_runtime_get_sync(pdata->dev); in ti_sn_bridge_hpd_enable()
1225 static void ti_sn_bridge_hpd_disable(struct drm_bridge *bridge) in ti_sn_bridge_hpd_disable() argument
1227 struct ti_sn65dsi86 *pdata = bridge_to_ti_sn65dsi86(bridge); in ti_sn_bridge_hpd_disable()
1229 pm_runtime_put_autosuspend(pdata->dev); in ti_sn_bridge_hpd_disable()
1265 * data-lanes but not lane-polarities but not vice versa. in ti_sn_bridge_parse_lanes()
1271 endpoint = of_graph_get_endpoint_by_regs(np, 1, -1); in ti_sn_bridge_parse_lanes()
1274 of_property_read_u32_array(endpoint, "data-lanes", in ti_sn_bridge_parse_lanes()
1276 of_property_read_u32_array(endpoint, "lane-polarities", in ti_sn_bridge_parse_lanes()
1285 * data-lanes had fewer elements so that we nicely initialize in ti_sn_bridge_parse_lanes()
1288 for (i = SN_MAX_DP_LANES - 1; i >= 0; i--) { in ti_sn_bridge_parse_lanes()
1294 pdata->dp_lanes = dp_lanes; in ti_sn_bridge_parse_lanes()
1295 pdata->ln_assign = ln_assign; in ti_sn_bridge_parse_lanes()
1296 pdata->ln_polrs = ln_polrs; in ti_sn_bridge_parse_lanes()
1301 struct device_node *np = pdata->dev->of_node; in ti_sn_bridge_parse_dsi_host()
1303 pdata->host_node = of_graph_get_remote_node(np, 0, 0); in ti_sn_bridge_parse_dsi_host()
1305 if (!pdata->host_node) { in ti_sn_bridge_parse_dsi_host()
1307 return -ENODEV; in ti_sn_bridge_parse_dsi_host()
1316 struct ti_sn65dsi86 *pdata = dev_get_drvdata(adev->dev.parent); in ti_sn_bridge_probe()
1317 struct device_node *np = pdata->dev->of_node; in ti_sn_bridge_probe()
1320 pdata->next_bridge = devm_drm_of_get_bridge(&adev->dev, np, 1, 0); in ti_sn_bridge_probe()
1321 if (IS_ERR(pdata->next_bridge)) in ti_sn_bridge_probe()
1322 return dev_err_probe(&adev->dev, PTR_ERR(pdata->next_bridge), in ti_sn_bridge_probe()
1323 "failed to create panel bridge\n"); in ti_sn_bridge_probe()
1331 pdata->bridge.funcs = &ti_sn_bridge_funcs; in ti_sn_bridge_probe()
1332 pdata->bridge.of_node = np; in ti_sn_bridge_probe()
1333 pdata->bridge.type = pdata->next_bridge->type == DRM_MODE_CONNECTOR_DisplayPort in ti_sn_bridge_probe()
1336 if (pdata->bridge.type == DRM_MODE_CONNECTOR_DisplayPort) { in ti_sn_bridge_probe()
1337 pdata->bridge.ops = DRM_BRIDGE_OP_EDID | DRM_BRIDGE_OP_DETECT | in ti_sn_bridge_probe()
1344 * is doing AUX channel xfers before the bridge is added so in ti_sn_bridge_probe()
1346 * the eDP case where the panel wants to read the EDID before in ti_sn_bridge_probe()
1347 * the bridge is added. We always consistently have HPD disabled in ti_sn_bridge_probe()
1348 * for eDP. in ti_sn_bridge_probe()
1350 mutex_lock(&pdata->comms_mutex); in ti_sn_bridge_probe()
1351 if (pdata->comms_enabled) in ti_sn_bridge_probe()
1352 regmap_update_bits(pdata->regmap, SN_HPD_DISABLE_REG, in ti_sn_bridge_probe()
1354 mutex_unlock(&pdata->comms_mutex); in ti_sn_bridge_probe()
1357 drm_bridge_add(&pdata->bridge); in ti_sn_bridge_probe()
1361 dev_err_probe(&adev->dev, ret, "failed to attach dsi host\n"); in ti_sn_bridge_probe()
1368 drm_bridge_remove(&pdata->bridge); in ti_sn_bridge_probe()
1374 struct ti_sn65dsi86 *pdata = dev_get_drvdata(adev->dev.parent); in ti_sn_bridge_remove()
1379 drm_bridge_remove(&pdata->bridge); in ti_sn_bridge_remove()
1381 of_node_put(pdata->host_node); in ti_sn_bridge_remove()
1385 { .name = "ti_sn65dsi86.bridge", },
1390 .name = "bridge",
1396 /* -----------------------------------------------------------------------------
1402 return atomic_xchg(&pdata->pwm_pin_busy, 1) ? -EBUSY : 0; in ti_sn_pwm_pin_request()
1407 atomic_set(&pdata->pwm_pin_busy, 0); in ti_sn_pwm_pin_release()
1431 * - The PWM signal is not driven when the chip is powered down, or in its
1433 * described in the documentation. In order to save power, state->enabled is
1436 * - Changing both period and duty_cycle is not done atomically, neither is the
1437 * multi-byte register updates, so the output might briefly be undefined
1452 if (!pdata->pwm_enabled) { in ti_sn_pwm_apply()
1453 ret = pm_runtime_get_sync(pdata->dev); in ti_sn_pwm_apply()
1455 pm_runtime_put_sync(pdata->dev); in ti_sn_pwm_apply()
1460 if (state->enabled) { in ti_sn_pwm_apply()
1461 if (!pdata->pwm_enabled) { in ti_sn_pwm_apply()
1467 ret = regmap_update_bits(pdata->regmap, SN_GPIO_CTRL_REG, in ti_sn_pwm_apply()
1471 dev_err(pdata->dev, "failed to mux in PWM function\n"); in ti_sn_pwm_apply()
1480 * PWM_FREQ = ----------------------------------- in ti_sn_pwm_apply()
1495 * PWM_PRE_DIV >= ------------------------- in ti_sn_pwm_apply()
1504 * BACKLIGHT_SCALE = ---------------------- - 1 in ti_sn_pwm_apply()
1512 if (state->period <= NSEC_PER_SEC / pdata->pwm_refclk_freq) { in ti_sn_pwm_apply()
1513 ret = -EINVAL; in ti_sn_pwm_apply()
1522 pdata->pwm_refclk_freq); in ti_sn_pwm_apply()
1523 period = min(state->period, period_max); in ti_sn_pwm_apply()
1525 pre_div = DIV64_U64_ROUND_UP(period * pdata->pwm_refclk_freq, in ti_sn_pwm_apply()
1527 scale = div64_u64(period * pdata->pwm_refclk_freq, (u64)NSEC_PER_SEC * pre_div) - 1; in ti_sn_pwm_apply()
1533 * ------- = --------------------- in ti_sn_pwm_apply()
1540 backlight = div64_u64(state->duty_cycle * pdata->pwm_refclk_freq, in ti_sn_pwm_apply()
1545 ret = regmap_write(pdata->regmap, SN_PWM_PRE_DIV_REG, pre_div); in ti_sn_pwm_apply()
1547 dev_err(pdata->dev, "failed to update PWM_PRE_DIV\n"); in ti_sn_pwm_apply()
1555 pwm_en_inv = FIELD_PREP(SN_PWM_EN_MASK, state->enabled) | in ti_sn_pwm_apply()
1556 FIELD_PREP(SN_PWM_INV_MASK, state->polarity == PWM_POLARITY_INVERSED); in ti_sn_pwm_apply()
1557 ret = regmap_write(pdata->regmap, SN_PWM_EN_INV_REG, pwm_en_inv); in ti_sn_pwm_apply()
1559 dev_err(pdata->dev, "failed to update PWM_EN/PWM_INV\n"); in ti_sn_pwm_apply()
1563 pdata->pwm_enabled = state->enabled; in ti_sn_pwm_apply()
1566 if (!pdata->pwm_enabled) in ti_sn_pwm_apply()
1567 pm_runtime_put_sync(pdata->dev); in ti_sn_pwm_apply()
1582 ret = regmap_read(pdata->regmap, SN_PWM_EN_INV_REG, &pwm_en_inv); in ti_sn_pwm_get_state()
1594 ret = regmap_read(pdata->regmap, SN_PWM_PRE_DIV_REG, &pre_div); in ti_sn_pwm_get_state()
1598 state->enabled = FIELD_GET(SN_PWM_EN_MASK, pwm_en_inv); in ti_sn_pwm_get_state()
1600 state->polarity = PWM_POLARITY_INVERSED; in ti_sn_pwm_get_state()
1602 state->polarity = PWM_POLARITY_NORMAL; in ti_sn_pwm_get_state()
1604 state->period = DIV_ROUND_UP_ULL((u64)NSEC_PER_SEC * pre_div * (scale + 1), in ti_sn_pwm_get_state()
1605 pdata->pwm_refclk_freq); in ti_sn_pwm_get_state()
1606 state->duty_cycle = DIV_ROUND_UP_ULL((u64)NSEC_PER_SEC * pre_div * backlight, in ti_sn_pwm_get_state()
1607 pdata->pwm_refclk_freq); in ti_sn_pwm_get_state()
1609 if (state->duty_cycle > state->period) in ti_sn_pwm_get_state()
1610 state->duty_cycle = state->period; in ti_sn_pwm_get_state()
1626 struct ti_sn65dsi86 *pdata = dev_get_drvdata(adev->dev.parent); in ti_sn_pwm_probe()
1628 pdata->pchip.dev = pdata->dev; in ti_sn_pwm_probe()
1629 pdata->pchip.ops = &ti_sn_pwm_ops; in ti_sn_pwm_probe()
1630 pdata->pchip.npwm = 1; in ti_sn_pwm_probe()
1631 pdata->pchip.of_xlate = of_pwm_single_xlate; in ti_sn_pwm_probe()
1632 pdata->pchip.of_pwm_n_cells = 1; in ti_sn_pwm_probe()
1634 return pwmchip_add(&pdata->pchip); in ti_sn_pwm_probe()
1639 struct ti_sn65dsi86 *pdata = dev_get_drvdata(adev->dev.parent); in ti_sn_pwm_remove()
1641 pwmchip_remove(&pdata->pchip); in ti_sn_pwm_remove()
1643 if (pdata->pwm_enabled) in ti_sn_pwm_remove()
1644 pm_runtime_put_sync(pdata->dev); in ti_sn_pwm_remove()
1677 /* -----------------------------------------------------------------------------
1686 if (WARN_ON(gpiospec->args_count < chip->of_gpio_n_cells)) in tn_sn_bridge_of_xlate()
1687 return -EINVAL; in tn_sn_bridge_of_xlate()
1689 if (gpiospec->args[0] > chip->ngpio || gpiospec->args[0] < 1) in tn_sn_bridge_of_xlate()
1690 return -EINVAL; in tn_sn_bridge_of_xlate()
1693 *flags = gpiospec->args[1]; in tn_sn_bridge_of_xlate()
1695 return gpiospec->args[0] - SN_GPIO_PHYSICAL_OFFSET; in tn_sn_bridge_of_xlate()
1709 return test_bit(offset, pdata->gchip_output) ? in ti_sn_bridge_gpio_get_direction()
1720 * When the pin is an input we don't forcibly keep the bridge in ti_sn_bridge_gpio_get()
1721 * powered--we just power it on to read the pin. NOTE: part of in ti_sn_bridge_gpio_get()
1722 * the reason this works is that the bridge defaults (when in ti_sn_bridge_gpio_get()
1727 pm_runtime_get_sync(pdata->dev); in ti_sn_bridge_gpio_get()
1728 ret = regmap_read(pdata->regmap, SN_GPIO_IO_REG, &val); in ti_sn_bridge_gpio_get()
1729 pm_runtime_put_autosuspend(pdata->dev); in ti_sn_bridge_gpio_get()
1743 if (!test_bit(offset, pdata->gchip_output)) { in ti_sn_bridge_gpio_set()
1744 dev_err(pdata->dev, "Ignoring GPIO set while input\n"); in ti_sn_bridge_gpio_set()
1749 ret = regmap_update_bits(pdata->regmap, SN_GPIO_IO_REG, in ti_sn_bridge_gpio_set()
1753 dev_warn(pdata->dev, in ti_sn_bridge_gpio_set()
1754 "Failed to set bridge GPIO %u: %d\n", offset, ret); in ti_sn_bridge_gpio_set()
1764 if (!test_and_clear_bit(offset, pdata->gchip_output)) in ti_sn_bridge_gpio_direction_input()
1767 ret = regmap_update_bits(pdata->regmap, SN_GPIO_CTRL_REG, in ti_sn_bridge_gpio_direction_input()
1771 set_bit(offset, pdata->gchip_output); in ti_sn_bridge_gpio_direction_input()
1780 pm_runtime_put_autosuspend(pdata->dev); in ti_sn_bridge_gpio_direction_input()
1792 if (test_and_set_bit(offset, pdata->gchip_output)) in ti_sn_bridge_gpio_direction_output()
1795 pm_runtime_get_sync(pdata->dev); in ti_sn_bridge_gpio_direction_output()
1801 ret = regmap_update_bits(pdata->regmap, SN_GPIO_CTRL_REG, in ti_sn_bridge_gpio_direction_output()
1805 clear_bit(offset, pdata->gchip_output); in ti_sn_bridge_gpio_direction_output()
1806 pm_runtime_put_autosuspend(pdata->dev); in ti_sn_bridge_gpio_direction_output()
1840 struct ti_sn65dsi86 *pdata = dev_get_drvdata(adev->dev.parent); in ti_sn_gpio_probe()
1844 if (!of_property_read_bool(pdata->dev->of_node, "gpio-controller")) in ti_sn_gpio_probe()
1847 pdata->gchip.label = dev_name(pdata->dev); in ti_sn_gpio_probe()
1848 pdata->gchip.parent = pdata->dev; in ti_sn_gpio_probe()
1849 pdata->gchip.owner = THIS_MODULE; in ti_sn_gpio_probe()
1850 pdata->gchip.of_xlate = tn_sn_bridge_of_xlate; in ti_sn_gpio_probe()
1851 pdata->gchip.of_gpio_n_cells = 2; in ti_sn_gpio_probe()
1852 pdata->gchip.request = ti_sn_bridge_gpio_request; in ti_sn_gpio_probe()
1853 pdata->gchip.free = ti_sn_bridge_gpio_free; in ti_sn_gpio_probe()
1854 pdata->gchip.get_direction = ti_sn_bridge_gpio_get_direction; in ti_sn_gpio_probe()
1855 pdata->gchip.direction_input = ti_sn_bridge_gpio_direction_input; in ti_sn_gpio_probe()
1856 pdata->gchip.direction_output = ti_sn_bridge_gpio_direction_output; in ti_sn_gpio_probe()
1857 pdata->gchip.get = ti_sn_bridge_gpio_get; in ti_sn_gpio_probe()
1858 pdata->gchip.set = ti_sn_bridge_gpio_set; in ti_sn_gpio_probe()
1859 pdata->gchip.can_sleep = true; in ti_sn_gpio_probe()
1860 pdata->gchip.names = ti_sn_bridge_gpio_names; in ti_sn_gpio_probe()
1861 pdata->gchip.ngpio = SN_NUM_GPIOS; in ti_sn_gpio_probe()
1862 pdata->gchip.base = -1; in ti_sn_gpio_probe()
1863 ret = devm_gpiochip_add_data(&adev->dev, &pdata->gchip, pdata); in ti_sn_gpio_probe()
1865 dev_err(pdata->dev, "can't add gpio chip\n"); in ti_sn_gpio_probe()
1900 /* -----------------------------------------------------------------------------
1918 pdata->supplies[i].supply = ti_sn_bridge_supply_names[i]; in ti_sn65dsi86_parse_regulators()
1920 return devm_regulator_bulk_get(pdata->dev, SN_REGULATOR_SUPPLY_NUM, in ti_sn65dsi86_parse_regulators()
1921 pdata->supplies); in ti_sn65dsi86_parse_regulators()
1926 struct device *dev = &client->dev; in ti_sn65dsi86_probe()
1930 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { in ti_sn65dsi86_probe()
1932 return -ENODEV; in ti_sn65dsi86_probe()
1937 return -ENOMEM; in ti_sn65dsi86_probe()
1939 pdata->dev = dev; in ti_sn65dsi86_probe()
1941 mutex_init(&pdata->comms_mutex); in ti_sn65dsi86_probe()
1943 pdata->regmap = devm_regmap_init_i2c(client, in ti_sn65dsi86_probe()
1945 if (IS_ERR(pdata->regmap)) in ti_sn65dsi86_probe()
1946 return dev_err_probe(dev, PTR_ERR(pdata->regmap), in ti_sn65dsi86_probe()
1949 pdata->enable_gpio = devm_gpiod_get_optional(dev, "enable", in ti_sn65dsi86_probe()
1951 if (IS_ERR(pdata->enable_gpio)) in ti_sn65dsi86_probe()
1952 return dev_err_probe(dev, PTR_ERR(pdata->enable_gpio), in ti_sn65dsi86_probe()
1959 pdata->refclk = devm_clk_get_optional(dev, "refclk"); in ti_sn65dsi86_probe()
1960 if (IS_ERR(pdata->refclk)) in ti_sn65dsi86_probe()
1961 return dev_err_probe(dev, PTR_ERR(pdata->refclk), in ti_sn65dsi86_probe()
1965 pm_runtime_set_autosuspend_delay(pdata->dev, 500); in ti_sn65dsi86_probe()
1966 pm_runtime_use_autosuspend(pdata->dev); in ti_sn65dsi86_probe()
1973 * motiviation here is to solve the chicken-and-egg problem of probe in ti_sn65dsi86_probe()
1974 * ordering. The bridge wants the panel to be there when it probes. in ti_sn65dsi86_probe()
1977 * bus or the pwm_chip. Having sub-devices allows the some sub devices in ti_sn65dsi86_probe()
1978 * to finish probing even if others return -EPROBE_DEFER and gets us in ti_sn65dsi86_probe()
1983 ret = ti_sn65dsi86_add_aux_device(pdata, &pdata->gpio_aux, "gpio"); in ti_sn65dsi86_probe()
1989 ret = ti_sn65dsi86_add_aux_device(pdata, &pdata->pwm_aux, "pwm"); in ti_sn65dsi86_probe()
1996 * for the bridge. This is because the bridge can't be used until the in ti_sn65dsi86_probe()
2000 return ti_sn65dsi86_add_aux_device(pdata, &pdata->aux_aux, "aux"); in ti_sn65dsi86_probe()
2075 MODULE_DESCRIPTION("sn65dsi86 DSI to eDP bridge driver");