Lines Matching +full:vref +full:- +full:buffered
1 // SPDX-License-Identifier: GPL-2.0+
179 struct regulator *vref[4]; member
207 .name = "ad7124-4",
212 .name = "ad7124-8",
228 diff_new = abs(val - array[i]); in ad7124_find_closest_match()
247 ret = ad_sd_read_reg(&st->sd, addr, bytes, &readval); in ad7124_spi_write_mask()
254 return ad_sd_write_reg(&st->sd, addr, bytes, readval); in ad7124_spi_write_mask()
262 st->adc_control &= ~AD7124_ADC_CTRL_MODE_MSK; in ad7124_set_mode()
263 st->adc_control |= AD7124_ADC_CTRL_MODE(mode); in ad7124_set_mode()
265 return ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, 2, st->adc_control); in ad7124_set_mode()
272 fclk = clk_get_rate(st->mclk); in ad7124_set_channel_odr()
286 if (odr_sel_bits != st->channels[channel].cfg.odr_sel_bits) in ad7124_set_channel_odr()
287 st->channels[channel].cfg.live = false; in ad7124_set_channel_odr()
290 st->channels[channel].cfg.odr = DIV_ROUND_CLOSEST(fclk, odr_sel_bits * 32); in ad7124_set_channel_odr()
291 st->channels[channel].cfg.odr_sel_bits = odr_sel_bits; in ad7124_set_channel_odr()
299 fadc = st->channels[channel].cfg.odr; in ad7124_get_3db_filter_freq()
301 switch (st->channels[channel].cfg.filter_type) { in ad7124_get_3db_filter_freq()
307 return -EINVAL; in ad7124_get_3db_filter_freq()
330 if (new_odr != st->channels[channel].cfg.odr) in ad7124_set_3db_filter_freq()
331 st->channels[channel].cfg.live = false; in ad7124_set_3db_filter_freq()
333 st->channels[channel].cfg.filter_type = new_filter; in ad7124_set_3db_filter_freq()
334 st->channels[channel].cfg.odr = new_odr; in ad7124_set_3db_filter_freq()
360 for (i = 0; i < st->num_channels; i++) { in ad7124_find_similar_live_cfg()
361 cfg_aux = &st->channels[i].cfg; in ad7124_find_similar_live_cfg()
363 if (cfg_aux->live && in ad7124_find_similar_live_cfg()
364 cfg->refsel == cfg_aux->refsel && in ad7124_find_similar_live_cfg()
365 cfg->bipolar == cfg_aux->bipolar && in ad7124_find_similar_live_cfg()
366 cfg->buf_positive == cfg_aux->buf_positive && in ad7124_find_similar_live_cfg()
367 cfg->buf_negative == cfg_aux->buf_negative && in ad7124_find_similar_live_cfg()
368 cfg->vref_mv == cfg_aux->vref_mv && in ad7124_find_similar_live_cfg()
369 cfg->pga_bits == cfg_aux->pga_bits && in ad7124_find_similar_live_cfg()
370 cfg->odr == cfg_aux->odr && in ad7124_find_similar_live_cfg()
371 cfg->odr_sel_bits == cfg_aux->odr_sel_bits && in ad7124_find_similar_live_cfg()
372 cfg->filter_type == cfg_aux->filter_type) in ad7124_find_similar_live_cfg()
383 free_cfg_slot = find_first_zero_bit(&st->cfg_slots_status, AD7124_MAX_CONFIGS); in ad7124_find_free_config_slot()
385 return -1; in ad7124_find_free_config_slot()
392 unsigned int refsel = cfg->refsel; in ad7124_init_config_vref()
398 if (IS_ERR(st->vref[refsel])) { in ad7124_init_config_vref()
399 dev_err(&st->sd.spi->dev, in ad7124_init_config_vref()
402 return PTR_ERR(st->vref[refsel]); in ad7124_init_config_vref()
404 cfg->vref_mv = regulator_get_voltage(st->vref[refsel]); in ad7124_init_config_vref()
406 cfg->vref_mv /= 1000; in ad7124_init_config_vref()
409 cfg->vref_mv = 2500; in ad7124_init_config_vref()
410 st->adc_control &= ~AD7124_ADC_CTRL_REF_EN_MSK; in ad7124_init_config_vref()
411 st->adc_control |= AD7124_ADC_CTRL_REF_EN(1); in ad7124_init_config_vref()
412 return ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, in ad7124_init_config_vref()
413 2, st->adc_control); in ad7124_init_config_vref()
415 dev_err(&st->sd.spi->dev, "Invalid reference %d\n", refsel); in ad7124_init_config_vref()
416 return -EINVAL; in ad7124_init_config_vref()
427 cfg->cfg_slot = cfg_slot; in ad7124_write_config()
429 tmp = (cfg->buf_positive << 1) + cfg->buf_negative; in ad7124_write_config()
430 val = AD7124_CONFIG_BIPOLAR(cfg->bipolar) | AD7124_CONFIG_REF_SEL(cfg->refsel) | in ad7124_write_config()
432 ret = ad_sd_write_reg(&st->sd, AD7124_CONFIG(cfg->cfg_slot), 2, val); in ad7124_write_config()
436 tmp = AD7124_FILTER_TYPE_SEL(cfg->filter_type); in ad7124_write_config()
437 ret = ad7124_spi_write_mask(st, AD7124_FILTER(cfg->cfg_slot), AD7124_FILTER_TYPE_MSK, in ad7124_write_config()
442 ret = ad7124_spi_write_mask(st, AD7124_FILTER(cfg->cfg_slot), AD7124_FILTER_FS_MSK, in ad7124_write_config()
443 AD7124_FILTER_FS(cfg->odr_sel_bits), 3); in ad7124_write_config()
447 return ad7124_spi_write_mask(st, AD7124_CONFIG(cfg->cfg_slot), AD7124_CONFIG_PGA_MSK, in ad7124_write_config()
448 AD7124_CONFIG_PGA(cfg->pga_bits), 2); in ad7124_write_config()
462 ret = kfifo_get(&st->live_cfgs_fifo, &lru_cfg); in ad7124_pop_config()
466 lru_cfg->live = false; in ad7124_pop_config()
469 assign_bit(lru_cfg->cfg_slot, &st->cfg_slots_status, 0); in ad7124_pop_config()
472 for (i = 0; i < st->num_channels; i++) { in ad7124_pop_config()
473 cfg = &st->channels[i].cfg; in ad7124_pop_config()
475 if (cfg->cfg_slot == lru_cfg->cfg_slot) in ad7124_pop_config()
476 cfg->live = false; in ad7124_pop_config()
490 kfifo_put(&st->live_cfgs_fifo, cfg); in ad7124_push_config()
495 return -EINVAL; in ad7124_push_config()
498 free_cfg_slot = lru_cfg->cfg_slot; in ad7124_push_config()
499 kfifo_put(&st->live_cfgs_fifo, cfg); in ad7124_push_config()
503 assign_bit(free_cfg_slot, &st->cfg_slots_status, 1); in ad7124_push_config()
510 ch->cfg.live = true; in ad7124_enable_channel()
511 return ad_sd_write_reg(&st->sd, AD7124_CHANNEL(ch->nr), 2, ch->ain | in ad7124_enable_channel()
512 AD7124_CHANNEL_SETUP(ch->cfg.cfg_slot) | AD7124_CHANNEL_EN(1)); in ad7124_enable_channel()
517 struct ad7124_channel_config *cfg = &st->channels[address].cfg; in ad7124_prepare_read()
524 if (!cfg->live) { in ad7124_prepare_read()
530 cfg->cfg_slot = live_cfg->cfg_slot; in ad7124_prepare_read()
534 return ad7124_enable_channel(st, &st->channels[address]); in ad7124_prepare_read()
549 mutex_lock(&st->cfgs_lock); in ad7124_set_channel()
551 mutex_unlock(&st->cfgs_lock); in ad7124_set_channel()
559 unsigned int adc_control = st->adc_control; in ad7124_append_status()
565 ret = ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, 2, adc_control); in ad7124_append_status()
569 st->adc_control = adc_control; in ad7124_append_status()
580 for (i = 0; i < st->num_channels; i++) { in ad7124_disable_all()
617 ret = ad_sd_write_reg(&st->sd, AD7124_CHANNEL(chan->address), 2, in ad7124_read_raw()
618 st->channels[chan->address].ain | AD7124_CHANNEL_EN(0)); in ad7124_read_raw()
624 mutex_lock(&st->cfgs_lock); in ad7124_read_raw()
626 idx = st->channels[chan->address].cfg.pga_bits; in ad7124_read_raw()
627 *val = st->channels[chan->address].cfg.vref_mv; in ad7124_read_raw()
628 if (st->channels[chan->address].cfg.bipolar) in ad7124_read_raw()
629 *val2 = chan->scan_type.realbits - 1 + idx; in ad7124_read_raw()
631 *val2 = chan->scan_type.realbits + idx; in ad7124_read_raw()
633 mutex_unlock(&st->cfgs_lock); in ad7124_read_raw()
636 mutex_lock(&st->cfgs_lock); in ad7124_read_raw()
637 if (st->channels[chan->address].cfg.bipolar) in ad7124_read_raw()
638 *val = -(1 << (chan->scan_type.realbits - 1)); in ad7124_read_raw()
642 mutex_unlock(&st->cfgs_lock); in ad7124_read_raw()
645 mutex_lock(&st->cfgs_lock); in ad7124_read_raw()
646 *val = st->channels[chan->address].cfg.odr; in ad7124_read_raw()
647 mutex_unlock(&st->cfgs_lock); in ad7124_read_raw()
651 mutex_lock(&st->cfgs_lock); in ad7124_read_raw()
652 *val = ad7124_get_3db_filter_freq(st, chan->scan_index); in ad7124_read_raw()
653 mutex_unlock(&st->cfgs_lock); in ad7124_read_raw()
657 return -EINVAL; in ad7124_read_raw()
666 unsigned int res, gain, full_scale, vref; in ad7124_write_raw() local
669 mutex_lock(&st->cfgs_lock); in ad7124_write_raw()
674 ret = -EINVAL; in ad7124_write_raw()
678 ad7124_set_channel_odr(st, chan->address, val); in ad7124_write_raw()
682 ret = -EINVAL; in ad7124_write_raw()
686 if (st->channels[chan->address].cfg.bipolar) in ad7124_write_raw()
687 full_scale = 1 << (chan->scan_type.realbits - 1); in ad7124_write_raw()
689 full_scale = 1 << chan->scan_type.realbits; in ad7124_write_raw()
691 vref = st->channels[chan->address].cfg.vref_mv * 1000000LL; in ad7124_write_raw()
692 res = DIV_ROUND_CLOSEST(vref, full_scale); in ad7124_write_raw()
696 if (st->channels[chan->address].cfg.pga_bits != res) in ad7124_write_raw()
697 st->channels[chan->address].cfg.live = false; in ad7124_write_raw()
699 st->channels[chan->address].cfg.pga_bits = res; in ad7124_write_raw()
703 ret = -EINVAL; in ad7124_write_raw()
707 ad7124_set_3db_filter_freq(st, chan->address, val); in ad7124_write_raw()
710 ret = -EINVAL; in ad7124_write_raw()
713 mutex_unlock(&st->cfgs_lock); in ad7124_write_raw()
726 return -EINVAL; in ad7124_reg_access()
729 ret = ad_sd_read_reg(&st->sd, reg, ad7124_reg_size[reg], in ad7124_reg_access()
732 ret = ad_sd_write_reg(&st->sd, reg, ad7124_reg_size[reg], in ad7124_reg_access()
758 mutex_lock(&st->cfgs_lock); in ad7124_update_scan_mode()
759 for (i = 0; i < st->num_channels; i++) { in ad7124_update_scan_mode()
762 ret = __ad7124_set_channel(&st->sd, i); in ad7124_update_scan_mode()
767 mutex_unlock(&st->cfgs_lock); in ad7124_update_scan_mode()
773 mutex_unlock(&st->cfgs_lock); in ad7124_update_scan_mode()
792 ret = ad_sd_reset(&st->sd, 64); in ad7124_soft_reset()
799 ret = ad_sd_read_reg(&st->sd, AD7124_STATUS, 1, &readval); in ad7124_soft_reset()
808 } while (--timeout); in ad7124_soft_reset()
810 dev_err(&st->sd.spi->dev, "Soft reset failed\n"); in ad7124_soft_reset()
812 return -EIO; in ad7124_soft_reset()
820 ret = ad_sd_read_reg(&st->sd, AD7124_ID, 1, &readval); in ad7124_check_chip_id()
827 if (chip_id != st->chip_info->chip_id) { in ad7124_check_chip_id()
828 dev_err(&st->sd.spi->dev, in ad7124_check_chip_id()
830 st->chip_info->chip_id, chip_id); in ad7124_check_chip_id()
831 return -ENODEV; in ad7124_check_chip_id()
835 dev_err(&st->sd.spi->dev, in ad7124_check_chip_id()
837 return -ENODEV; in ad7124_check_chip_id()
853 st->num_channels = device_get_child_node_count(dev); in ad7124_parse_channel_config()
854 if (!st->num_channels) in ad7124_parse_channel_config()
855 return dev_err_probe(dev, -ENODEV, "no channel children\n"); in ad7124_parse_channel_config()
857 chan = devm_kcalloc(indio_dev->dev.parent, st->num_channels, in ad7124_parse_channel_config()
860 return -ENOMEM; in ad7124_parse_channel_config()
862 channels = devm_kcalloc(indio_dev->dev.parent, st->num_channels, sizeof(*channels), in ad7124_parse_channel_config()
865 return -ENOMEM; in ad7124_parse_channel_config()
867 indio_dev->channels = chan; in ad7124_parse_channel_config()
868 indio_dev->num_channels = st->num_channels; in ad7124_parse_channel_config()
869 st->channels = channels; in ad7124_parse_channel_config()
876 if (channel >= indio_dev->num_channels) in ad7124_parse_channel_config()
877 return dev_err_probe(dev, -EINVAL, in ad7124_parse_channel_config()
880 ret = fwnode_property_read_u32_array(child, "diff-channels", in ad7124_parse_channel_config()
885 st->channels[channel].nr = channel; in ad7124_parse_channel_config()
886 st->channels[channel].ain = AD7124_CHANNEL_AINP(ain[0]) | in ad7124_parse_channel_config()
889 cfg = &st->channels[channel].cfg; in ad7124_parse_channel_config()
890 cfg->bipolar = fwnode_property_read_bool(child, "bipolar"); in ad7124_parse_channel_config()
892 ret = fwnode_property_read_u32(child, "adi,reference-select", &tmp); in ad7124_parse_channel_config()
894 cfg->refsel = AD7124_INT_REF; in ad7124_parse_channel_config()
896 cfg->refsel = tmp; in ad7124_parse_channel_config()
898 cfg->buf_positive = in ad7124_parse_channel_config()
899 fwnode_property_read_bool(child, "adi,buffered-positive"); in ad7124_parse_channel_config()
900 cfg->buf_negative = in ad7124_parse_channel_config()
901 fwnode_property_read_bool(child, "adi,buffered-negative"); in ad7124_parse_channel_config()
918 fclk = clk_get_rate(st->mclk); in ad7124_setup()
920 return -EINVAL; in ad7124_setup()
927 ret = clk_set_rate(st->mclk, fclk); in ad7124_setup()
933 st->adc_control &= ~AD7124_ADC_CTRL_PWR_MSK; in ad7124_setup()
934 st->adc_control |= AD7124_ADC_CTRL_PWR(power_mode); in ad7124_setup()
935 ret = ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, 2, st->adc_control); in ad7124_setup()
939 mutex_init(&st->cfgs_lock); in ad7124_setup()
940 INIT_KFIFO(st->live_cfgs_fifo); in ad7124_setup()
941 for (i = 0; i < st->num_channels; i++) { in ad7124_setup()
943 ret = ad7124_init_config_vref(st, &st->channels[i].cfg); in ad7124_setup()
955 ad_sd_write_reg(&st->sd, AD7124_CHANNEL(i), 2, 0); in ad7124_setup()
975 return -ENODEV; in ad7124_probe()
977 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); in ad7124_probe()
979 return -ENOMEM; in ad7124_probe()
983 st->chip_info = info; in ad7124_probe()
985 indio_dev->name = st->chip_info->name; in ad7124_probe()
986 indio_dev->modes = INDIO_DIRECT_MODE; in ad7124_probe()
987 indio_dev->info = &ad7124_info; in ad7124_probe()
989 ret = ad_sd_init(&st->sd, indio_dev, spi, &ad7124_sigma_delta_info); in ad7124_probe()
993 ret = ad7124_parse_channel_config(indio_dev, &spi->dev); in ad7124_probe()
997 for (i = 0; i < ARRAY_SIZE(st->vref); i++) { in ad7124_probe()
1001 st->vref[i] = devm_regulator_get_optional(&spi->dev, in ad7124_probe()
1003 if (PTR_ERR(st->vref[i]) == -ENODEV) in ad7124_probe()
1005 else if (IS_ERR(st->vref[i])) in ad7124_probe()
1006 return PTR_ERR(st->vref[i]); in ad7124_probe()
1008 ret = regulator_enable(st->vref[i]); in ad7124_probe()
1012 ret = devm_add_action_or_reset(&spi->dev, ad7124_reg_disable, in ad7124_probe()
1013 st->vref[i]); in ad7124_probe()
1018 st->mclk = devm_clk_get_enabled(&spi->dev, "mclk"); in ad7124_probe()
1019 if (IS_ERR(st->mclk)) in ad7124_probe()
1020 return PTR_ERR(st->mclk); in ad7124_probe()
1034 ret = devm_ad_sd_setup_buffer_and_trigger(&spi->dev, indio_dev); in ad7124_probe()
1038 return devm_iio_device_register(&spi->dev, indio_dev); in ad7124_probe()
1043 { .compatible = "adi,ad7124-4",
1045 { .compatible = "adi,ad7124-8",
1052 { "ad7124-4", (kernel_ulong_t)&ad7124_chip_info_tbl[ID_AD7124_4] },
1053 { "ad7124-8", (kernel_ulong_t)&ad7124_chip_info_tbl[ID_AD7124_8] },