Lines Matching +full:skip +full:- +full:sz +full:- +full:protect +full:- +full:en
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013-2017 ARM Limited, All Rights Reserved.
34 #include <linux/irqchip/arm-gic-v3.h>
35 #include <linux/irqchip/arm-gic-v4.h>
40 #include "irq-gic-common.h"
65 * Collection structure - just an ID, and a redistributor address to
75 * The ITS_BASER structure - contains memory information, cached
88 * The ITS structure - contains most of the infrastructure, with the
89 * top-level MSI domain, the command queue, the collections, and the
122 #define is_v4(its) (!!((its)->typer & GITS_TYPER_VLPIS))
123 #define is_v4_1(its) (!!((its)->typer & GITS_TYPER_VMAPP))
124 #define device_ids(its) (FIELD_GET(GITS_TYPER_DEVBITS, (its)->typer) + 1)
132 if (gic_rdists->has_rvpeid && \
133 gic_rdists->gicd_typer2 & GICD_TYPER2_VIL) \
134 nvpeid = 1 + (gic_rdists->gicd_typer2 & \
156 * The ITS view of a device - belongs to an ITS, owns an interrupt
196 #define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist))
197 #define gic_data_rdist_cpu(cpu) (per_cpu_ptr(gic_rdists->rdist, cpu))
198 #define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base)
202 * Skip ITSs that have no vLPIs mapped, unless we're on GICv4.1, as we
207 return (gic_rdists->has_rvpeid || vm->vlpi_count[its->list_nr]); in require_its_list_vmovp()
212 return !(gic_rdists->flags & RDIST_FLAGS_FORCE_NON_SHAREABLE); in rdists_support_shareable()
225 __set_bit(its->list_nr, &its_list); in get_its_list()
234 return d->hwirq - its_dev->event_map.lpi_base; in its_get_event_id()
240 struct its_node *its = its_dev->its; in dev_event_to_col()
242 return its->collections + its_dev->event_map.col_map[event]; in dev_event_to_col()
248 if (WARN_ON_ONCE(event >= its_dev->event_map.nr_lpis)) in dev_event_to_vlpi_map()
251 return &its_dev->event_map.vlpi_maps[event]; in dev_event_to_vlpi_map()
268 raw_spin_lock_irqsave(&vpe->vpe_lock, *flags); in vpe_to_cpuid_lock()
269 return vpe->col_idx; in vpe_to_cpuid_lock()
274 raw_spin_unlock_irqrestore(&vpe->vpe_lock, flags); in vpe_to_cpuid_unlock()
284 if (d->chip == &its_vpe_irq_chip) { in irq_to_cpuid_lock()
289 vpe = map->vpe; in irq_to_cpuid_lock()
297 cpu = its_dev->event_map.col_map[its_get_event_id(d)]; in irq_to_cpuid_lock()
309 if (d->chip == &its_vpe_irq_chip) { in irq_to_cpuid_unlock()
314 vpe = map->vpe; in irq_to_cpuid_unlock()
323 if (WARN_ON_ONCE(col->target_address & GENMASK_ULL(15, 0))) in valid_col()
331 if (valid_col(its->collections + vpe->col_idx)) in valid_vpe()
338 * ITS command descriptors - parameters to be encoded in a command
466 its_mask_encode(&cmd->raw_cmd[0], cmd_nr, 7, 0); in its_encode_cmd()
471 its_mask_encode(&cmd->raw_cmd[0], devid, 63, 32); in its_encode_devid()
476 its_mask_encode(&cmd->raw_cmd[1], id, 31, 0); in its_encode_event_id()
481 its_mask_encode(&cmd->raw_cmd[1], phys_id, 63, 32); in its_encode_phys_id()
486 its_mask_encode(&cmd->raw_cmd[1], size, 4, 0); in its_encode_size()
491 its_mask_encode(&cmd->raw_cmd[2], itt_addr >> 8, 51, 8); in its_encode_itt()
496 its_mask_encode(&cmd->raw_cmd[2], !!valid, 63, 63); in its_encode_valid()
501 its_mask_encode(&cmd->raw_cmd[2], target_addr >> 16, 51, 16); in its_encode_target()
506 its_mask_encode(&cmd->raw_cmd[2], col, 15, 0); in its_encode_collection()
511 its_mask_encode(&cmd->raw_cmd[1], vpeid, 47, 32); in its_encode_vpeid()
516 its_mask_encode(&cmd->raw_cmd[2], virt_id, 31, 0); in its_encode_virt_id()
521 its_mask_encode(&cmd->raw_cmd[2], db_phys_id, 63, 32); in its_encode_db_phys_id()
526 its_mask_encode(&cmd->raw_cmd[2], db_valid, 0, 0); in its_encode_db_valid()
531 its_mask_encode(&cmd->raw_cmd[0], seq_num, 47, 32); in its_encode_seq_num()
536 its_mask_encode(&cmd->raw_cmd[1], its_list, 15, 0); in its_encode_its_list()
541 its_mask_encode(&cmd->raw_cmd[3], vpt_pa >> 16, 51, 16); in its_encode_vpt_addr()
546 its_mask_encode(&cmd->raw_cmd[3], vpt_size, 4, 0); in its_encode_vpt_size()
551 its_mask_encode(&cmd->raw_cmd[0], vconf_pa >> 16, 51, 16); in its_encode_vconf_addr()
556 its_mask_encode(&cmd->raw_cmd[0], alloc, 8, 8); in its_encode_alloc()
561 its_mask_encode(&cmd->raw_cmd[0], ptz, 9, 9); in its_encode_ptz()
567 its_mask_encode(&cmd->raw_cmd[1], vpe_db_lpi, 31, 0); in its_encode_vmapp_default_db()
573 its_mask_encode(&cmd->raw_cmd[3], vpe_db_lpi, 31, 0); in its_encode_vmovp_default_db()
578 its_mask_encode(&cmd->raw_cmd[2], db, 63, 63); in its_encode_db()
583 its_mask_encode(&cmd->raw_cmd[0], sgi, 35, 32); in its_encode_sgi_intid()
588 its_mask_encode(&cmd->raw_cmd[0], prio >> 4, 23, 20); in its_encode_sgi_priority()
593 its_mask_encode(&cmd->raw_cmd[0], grp, 10, 10); in its_encode_sgi_group()
598 its_mask_encode(&cmd->raw_cmd[0], clr, 9, 9); in its_encode_sgi_clear()
601 static void its_encode_sgi_enable(struct its_cmd_block *cmd, bool en) in its_encode_sgi_enable() argument
603 its_mask_encode(&cmd->raw_cmd[0], en, 8, 8); in its_encode_sgi_enable()
609 cmd->raw_cmd_le[0] = cpu_to_le64(cmd->raw_cmd[0]); in its_fixup_cmd()
610 cmd->raw_cmd_le[1] = cpu_to_le64(cmd->raw_cmd[1]); in its_fixup_cmd()
611 cmd->raw_cmd_le[2] = cpu_to_le64(cmd->raw_cmd[2]); in its_fixup_cmd()
612 cmd->raw_cmd_le[3] = cpu_to_le64(cmd->raw_cmd[3]); in its_fixup_cmd()
620 u8 size = ilog2(desc->its_mapd_cmd.dev->nr_ites); in its_build_mapd_cmd()
622 itt_addr = virt_to_phys(desc->its_mapd_cmd.dev->itt); in its_build_mapd_cmd()
626 its_encode_devid(cmd, desc->its_mapd_cmd.dev->device_id); in its_build_mapd_cmd()
627 its_encode_size(cmd, size - 1); in its_build_mapd_cmd()
629 its_encode_valid(cmd, desc->its_mapd_cmd.valid); in its_build_mapd_cmd()
641 its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); in its_build_mapc_cmd()
642 its_encode_target(cmd, desc->its_mapc_cmd.col->target_address); in its_build_mapc_cmd()
643 its_encode_valid(cmd, desc->its_mapc_cmd.valid); in its_build_mapc_cmd()
647 return desc->its_mapc_cmd.col; in its_build_mapc_cmd()
656 col = dev_event_to_col(desc->its_mapti_cmd.dev, in its_build_mapti_cmd()
657 desc->its_mapti_cmd.event_id); in its_build_mapti_cmd()
660 its_encode_devid(cmd, desc->its_mapti_cmd.dev->device_id); in its_build_mapti_cmd()
661 its_encode_event_id(cmd, desc->its_mapti_cmd.event_id); in its_build_mapti_cmd()
662 its_encode_phys_id(cmd, desc->its_mapti_cmd.phys_id); in its_build_mapti_cmd()
663 its_encode_collection(cmd, col->col_id); in its_build_mapti_cmd()
676 col = dev_event_to_col(desc->its_movi_cmd.dev, in its_build_movi_cmd()
677 desc->its_movi_cmd.event_id); in its_build_movi_cmd()
680 its_encode_devid(cmd, desc->its_movi_cmd.dev->device_id); in its_build_movi_cmd()
681 its_encode_event_id(cmd, desc->its_movi_cmd.event_id); in its_build_movi_cmd()
682 its_encode_collection(cmd, desc->its_movi_cmd.col->col_id); in its_build_movi_cmd()
695 col = dev_event_to_col(desc->its_discard_cmd.dev, in its_build_discard_cmd()
696 desc->its_discard_cmd.event_id); in its_build_discard_cmd()
699 its_encode_devid(cmd, desc->its_discard_cmd.dev->device_id); in its_build_discard_cmd()
700 its_encode_event_id(cmd, desc->its_discard_cmd.event_id); in its_build_discard_cmd()
713 col = dev_event_to_col(desc->its_inv_cmd.dev, in its_build_inv_cmd()
714 desc->its_inv_cmd.event_id); in its_build_inv_cmd()
717 its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); in its_build_inv_cmd()
718 its_encode_event_id(cmd, desc->its_inv_cmd.event_id); in its_build_inv_cmd()
731 col = dev_event_to_col(desc->its_int_cmd.dev, in its_build_int_cmd()
732 desc->its_int_cmd.event_id); in its_build_int_cmd()
735 its_encode_devid(cmd, desc->its_int_cmd.dev->device_id); in its_build_int_cmd()
736 its_encode_event_id(cmd, desc->its_int_cmd.event_id); in its_build_int_cmd()
749 col = dev_event_to_col(desc->its_clear_cmd.dev, in its_build_clear_cmd()
750 desc->its_clear_cmd.event_id); in its_build_clear_cmd()
753 its_encode_devid(cmd, desc->its_clear_cmd.dev->device_id); in its_build_clear_cmd()
754 its_encode_event_id(cmd, desc->its_clear_cmd.event_id); in its_build_clear_cmd()
766 its_encode_collection(cmd, desc->its_invall_cmd.col->col_id); in its_build_invall_cmd()
770 return desc->its_invall_cmd.col; in its_build_invall_cmd()
778 its_encode_vpeid(cmd, desc->its_vinvall_cmd.vpe->vpe_id); in its_build_vinvall_cmd()
782 return valid_vpe(its, desc->its_vinvall_cmd.vpe); in its_build_vinvall_cmd()
789 struct its_vpe *vpe = valid_vpe(its, desc->its_vmapp_cmd.vpe); in its_build_vmapp_cmd()
795 its_encode_vpeid(cmd, desc->its_vmapp_cmd.vpe->vpe_id); in its_build_vmapp_cmd()
796 its_encode_valid(cmd, desc->its_vmapp_cmd.valid); in its_build_vmapp_cmd()
798 if (!desc->its_vmapp_cmd.valid) { in its_build_vmapp_cmd()
799 alloc = !atomic_dec_return(&desc->its_vmapp_cmd.vpe->vmapp_count); in its_build_vmapp_cmd()
803 * Unmapping a VPE is self-synchronizing on GICv4.1, in its_build_vmapp_cmd()
812 vpt_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->vpt_page)); in its_build_vmapp_cmd()
813 target = desc->its_vmapp_cmd.col->target_address + its->vlpi_redist_offset; in its_build_vmapp_cmd()
817 its_encode_vpt_size(cmd, LPI_NRBITS - 1); in its_build_vmapp_cmd()
819 alloc = !atomic_fetch_inc(&desc->its_vmapp_cmd.vpe->vmapp_count); in its_build_vmapp_cmd()
824 vconf_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->its_vm->vprop_page)); in its_build_vmapp_cmd()
836 its_encode_vmapp_default_db(cmd, desc->its_vmapp_cmd.vpe->vpe_db_lpi); in its_build_vmapp_cmd()
850 if (!is_v4_1(its) && desc->its_vmapti_cmd.db_enabled) in its_build_vmapti_cmd()
851 db = desc->its_vmapti_cmd.vpe->vpe_db_lpi; in its_build_vmapti_cmd()
856 its_encode_devid(cmd, desc->its_vmapti_cmd.dev->device_id); in its_build_vmapti_cmd()
857 its_encode_vpeid(cmd, desc->its_vmapti_cmd.vpe->vpe_id); in its_build_vmapti_cmd()
858 its_encode_event_id(cmd, desc->its_vmapti_cmd.event_id); in its_build_vmapti_cmd()
860 its_encode_virt_id(cmd, desc->its_vmapti_cmd.virt_id); in its_build_vmapti_cmd()
864 return valid_vpe(its, desc->its_vmapti_cmd.vpe); in its_build_vmapti_cmd()
873 if (!is_v4_1(its) && desc->its_vmovi_cmd.db_enabled) in its_build_vmovi_cmd()
874 db = desc->its_vmovi_cmd.vpe->vpe_db_lpi; in its_build_vmovi_cmd()
879 its_encode_devid(cmd, desc->its_vmovi_cmd.dev->device_id); in its_build_vmovi_cmd()
880 its_encode_vpeid(cmd, desc->its_vmovi_cmd.vpe->vpe_id); in its_build_vmovi_cmd()
881 its_encode_event_id(cmd, desc->its_vmovi_cmd.event_id); in its_build_vmovi_cmd()
887 return valid_vpe(its, desc->its_vmovi_cmd.vpe); in its_build_vmovi_cmd()
896 target = desc->its_vmovp_cmd.col->target_address + its->vlpi_redist_offset; in its_build_vmovp_cmd()
898 its_encode_seq_num(cmd, desc->its_vmovp_cmd.seq_num); in its_build_vmovp_cmd()
899 its_encode_its_list(cmd, desc->its_vmovp_cmd.its_list); in its_build_vmovp_cmd()
900 its_encode_vpeid(cmd, desc->its_vmovp_cmd.vpe->vpe_id); in its_build_vmovp_cmd()
905 its_encode_vmovp_default_db(cmd, desc->its_vmovp_cmd.vpe->vpe_db_lpi); in its_build_vmovp_cmd()
910 return valid_vpe(its, desc->its_vmovp_cmd.vpe); in its_build_vmovp_cmd()
919 map = dev_event_to_vlpi_map(desc->its_inv_cmd.dev, in its_build_vinv_cmd()
920 desc->its_inv_cmd.event_id); in its_build_vinv_cmd()
923 its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); in its_build_vinv_cmd()
924 its_encode_event_id(cmd, desc->its_inv_cmd.event_id); in its_build_vinv_cmd()
928 return valid_vpe(its, map->vpe); in its_build_vinv_cmd()
937 map = dev_event_to_vlpi_map(desc->its_int_cmd.dev, in its_build_vint_cmd()
938 desc->its_int_cmd.event_id); in its_build_vint_cmd()
941 its_encode_devid(cmd, desc->its_int_cmd.dev->device_id); in its_build_vint_cmd()
942 its_encode_event_id(cmd, desc->its_int_cmd.event_id); in its_build_vint_cmd()
946 return valid_vpe(its, map->vpe); in its_build_vint_cmd()
955 map = dev_event_to_vlpi_map(desc->its_clear_cmd.dev, in its_build_vclear_cmd()
956 desc->its_clear_cmd.event_id); in its_build_vclear_cmd()
959 its_encode_devid(cmd, desc->its_clear_cmd.dev->device_id); in its_build_vclear_cmd()
960 its_encode_event_id(cmd, desc->its_clear_cmd.event_id); in its_build_vclear_cmd()
964 return valid_vpe(its, map->vpe); in its_build_vclear_cmd()
975 its_encode_vpeid(cmd, desc->its_invdb_cmd.vpe->vpe_id); in its_build_invdb_cmd()
979 return valid_vpe(its, desc->its_invdb_cmd.vpe); in its_build_invdb_cmd()
990 its_encode_vpeid(cmd, desc->its_vsgi_cmd.vpe->vpe_id); in its_build_vsgi_cmd()
991 its_encode_sgi_intid(cmd, desc->its_vsgi_cmd.sgi); in its_build_vsgi_cmd()
992 its_encode_sgi_priority(cmd, desc->its_vsgi_cmd.priority); in its_build_vsgi_cmd()
993 its_encode_sgi_group(cmd, desc->its_vsgi_cmd.group); in its_build_vsgi_cmd()
994 its_encode_sgi_clear(cmd, desc->its_vsgi_cmd.clear); in its_build_vsgi_cmd()
995 its_encode_sgi_enable(cmd, desc->its_vsgi_cmd.enable); in its_build_vsgi_cmd()
999 return valid_vpe(its, desc->its_vsgi_cmd.vpe); in its_build_vsgi_cmd()
1005 return (ptr - its->cmd_base) * sizeof(*ptr); in its_cmd_ptr_to_offset()
1013 widx = its->cmd_write - its->cmd_base; in its_queue_full()
1014 ridx = readl_relaxed(its->base + GITS_CREADR) / sizeof(struct its_cmd_block); in its_queue_full()
1029 count--; in its_allocate_entry()
1038 cmd = its->cmd_write++; in its_allocate_entry()
1041 if (its->cmd_write == (its->cmd_base + ITS_CMD_QUEUE_NR_ENTRIES)) in its_allocate_entry()
1042 its->cmd_write = its->cmd_base; in its_allocate_entry()
1045 cmd->raw_cmd[0] = 0; in its_allocate_entry()
1046 cmd->raw_cmd[1] = 0; in its_allocate_entry()
1047 cmd->raw_cmd[2] = 0; in its_allocate_entry()
1048 cmd->raw_cmd[3] = 0; in its_allocate_entry()
1055 u64 wr = its_cmd_ptr_to_offset(its, its->cmd_write); in its_post_commands()
1057 writel_relaxed(wr, its->base + GITS_CWRITER); in its_post_commands()
1059 return its->cmd_write; in its_post_commands()
1068 if (its->flags & ITS_FLAGS_CMDQ_NEEDS_FLUSHING) in its_flush_cmd()
1091 rd_idx = readl_relaxed(its->base + GITS_CREADR); in its_wait_for_range_completion()
1095 * potential wrap-around into account. in its_wait_for_range_completion()
1097 delta = rd_idx - prev_idx; in its_wait_for_range_completion()
1105 count--; in its_wait_for_range_completion()
1109 return -1; in its_wait_for_range_completion()
1130 raw_spin_lock_irqsave(&its->lock, flags); \
1134 raw_spin_unlock_irqrestore(&its->lock, flags); \
1150 rd_idx = readl_relaxed(its->base + GITS_CREADR); \
1152 raw_spin_unlock_irqrestore(&its->lock, flags); \
1163 its_encode_target(sync_cmd, sync_col->target_address); in its_build_sync_cmd()
1176 its_encode_vpeid(sync_cmd, sync_vpe->vpe_id); in BUILD_SINGLE_CMD_FUNC()
1191 its_send_single_command(dev->its, its_build_int_cmd, &desc); in BUILD_SINGLE_CMD_FUNC()
1201 its_send_single_command(dev->its, its_build_clear_cmd, &desc); in its_send_clear()
1211 its_send_single_command(dev->its, its_build_inv_cmd, &desc); in its_send_inv()
1221 its_send_single_command(dev->its, its_build_mapd_cmd, &desc); in its_send_mapd()
1243 its_send_single_command(dev->its, its_build_mapti_cmd, &desc); in its_send_mapti()
1255 its_send_single_command(dev->its, its_build_movi_cmd, &desc); in its_send_movi()
1265 its_send_single_command(dev->its, its_build_discard_cmd, &desc); in its_send_discard()
1282 desc.its_vmapti_cmd.vpe = map->vpe; in its_send_vmapti()
1284 desc.its_vmapti_cmd.virt_id = map->vintid; in its_send_vmapti()
1286 desc.its_vmapti_cmd.db_enabled = map->db_enabled; in its_send_vmapti()
1288 its_send_single_vcommand(dev->its, its_build_vmapti_cmd, &desc); in its_send_vmapti()
1296 desc.its_vmovi_cmd.vpe = map->vpe; in its_send_vmovi()
1299 desc.its_vmovi_cmd.db_enabled = map->db_enabled; in its_send_vmovi()
1301 its_send_single_vcommand(dev->its, its_build_vmovi_cmd, &desc); in its_send_vmovi()
1311 desc.its_vmapp_cmd.col = &its->collections[vpe->col_idx]; in its_send_vmapp()
1321 int col_id = vpe->col_idx; in its_send_vmovp()
1327 desc.its_vmovp_cmd.col = &its->collections[col_id]; in its_send_vmovp()
1338 * Wall <-- Head. in its_send_vmovp()
1343 desc.its_vmovp_cmd.its_list = get_its_list(vpe->its_vm); in its_send_vmovp()
1350 if (!require_its_list_vmovp(vpe->its_vm, its)) in its_send_vmovp()
1353 desc.its_vmovp_cmd.col = &its->collections[col_id]; in its_send_vmovp()
1379 its_send_single_vcommand(dev->its, its_build_vinv_cmd, &desc); in its_send_vinv()
1393 its_send_single_vcommand(dev->its, its_build_vint_cmd, &desc); in its_send_vint()
1407 its_send_single_vcommand(dev->its, its_build_vclear_cmd, &desc); in its_send_vclear()
1419 * irqchip functions - assumes MSI, mostly.
1429 va = page_address(map->vm->vprop_page); in lpi_write_config()
1430 hwirq = map->vintid; in lpi_write_config()
1433 map->properties &= ~clr; in lpi_write_config()
1434 map->properties |= set | LPI_PROP_GROUP1; in lpi_write_config()
1436 va = gic_rdists->prop_table_va; in lpi_write_config()
1437 hwirq = d->hwirq; in lpi_write_config()
1440 cfg = va + hwirq - 8192; in lpi_write_config()
1449 if (gic_rdists->flags & RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING) in lpi_write_config()
1469 raw_spin_lock(&gic_data_rdist_cpu(cpu)->rd_lock); in __direct_lpi_inv()
1471 rdbase = per_cpu_ptr(gic_rdists->rdist, cpu)->rd_base; in __direct_lpi_inv()
1475 raw_spin_unlock(&gic_data_rdist_cpu(cpu)->rd_lock); in __direct_lpi_inv()
1487 WARN_ON(!is_v4_1(its_dev->its)); in direct_lpi_inv()
1490 val |= FIELD_PREP(GICR_INVLPIR_VPEID, map->vpe->vpe_id); in direct_lpi_inv()
1491 val |= FIELD_PREP(GICR_INVLPIR_INTID, map->vintid); in direct_lpi_inv()
1493 val = d->hwirq; in direct_lpi_inv()
1504 if (gic_rdists->has_direct_lpi && in lpi_update_config()
1505 (is_v4_1(its_dev->its) || !irqd_is_forwarded_to_vcpu(d))) in lpi_update_config()
1520 * GICv4.1 does away with the per-LPI nonsense, nothing to do in its_vlpi_set_doorbell()
1523 if (is_v4_1(its_dev->its)) in its_vlpi_set_doorbell()
1528 if (map->db_enabled == enable) in its_vlpi_set_doorbell()
1531 map->db_enabled = enable; in its_vlpi_set_doorbell()
1565 return atomic_read(&per_cpu_ptr(&cpu_lpi_count, cpu)->managed); in its_read_lpi_count()
1567 return atomic_read(&per_cpu_ptr(&cpu_lpi_count, cpu)->unmanaged); in its_read_lpi_count()
1573 atomic_inc(&per_cpu_ptr(&cpu_lpi_count, cpu)->managed); in its_inc_lpi_count()
1575 atomic_inc(&per_cpu_ptr(&cpu_lpi_count, cpu)->unmanaged); in its_inc_lpi_count()
1581 atomic_dec(&per_cpu_ptr(&cpu_lpi_count, cpu)->managed); in its_dec_lpi_count()
1583 atomic_dec(&per_cpu_ptr(&cpu_lpi_count, cpu)->unmanaged); in its_dec_lpi_count()
1616 node = its_dev->its->numa_node; in its_select_cpu()
1648 if ((its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144)) in its_select_cpu()
1666 if ((its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) && in its_select_cpu()
1675 pr_debug("IRQ%d -> %*pbl CPU%d\n", d->irq, cpumask_pr_args(aff_mask), cpu); in its_select_cpu()
1689 return -EINVAL; in its_set_affinity()
1691 prev_cpu = its_dev->event_map.col_map[id]; in its_set_affinity()
1704 target_col = &its_dev->its->collections[cpu]; in its_set_affinity()
1706 its_dev->event_map.col_map[id] = cpu; in its_set_affinity()
1716 return -EINVAL; in its_set_affinity()
1721 struct its_node *its = its_dev->its; in its_irq_get_msi_base()
1723 return its->phys_base + GITS_TRANSLATER; in its_irq_get_msi_base()
1732 its = its_dev->its; in its_irq_compose_msi_msg()
1733 addr = its->get_msi_base(its_dev); in its_irq_compose_msi_msg()
1735 msg->address_lo = lower_32_bits(addr); in its_irq_compose_msi_msg()
1736 msg->address_hi = upper_32_bits(addr); in its_irq_compose_msi_msg()
1737 msg->data = its_get_event_id(d); in its_irq_compose_msi_msg()
1750 return -EINVAL; in its_irq_set_irqchip_state()
1786 if (!its_list_map || gic_rdists->has_rvpeid) in gic_requires_eager_mapping()
1805 vm->vlpi_count[its->list_nr]++; in its_map_vm()
1807 if (vm->vlpi_count[its->list_nr] == 1) { in its_map_vm()
1810 for (i = 0; i < vm->nr_vpes; i++) { in its_map_vm()
1811 struct its_vpe *vpe = vm->vpes[i]; in its_map_vm()
1812 struct irq_data *d = irq_get_irq_data(vpe->irq); in its_map_vm()
1815 vpe->col_idx = cpumask_first(cpu_online_mask); in its_map_vm()
1818 irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); in its_map_vm()
1835 if (!--vm->vlpi_count[its->list_nr]) { in its_unmap_vm()
1838 for (i = 0; i < vm->nr_vpes; i++) in its_unmap_vm()
1839 its_send_vmapp(its, vm->vpes[i], false); in its_unmap_vm()
1850 if (!info->map) in its_vlpi_map()
1851 return -EINVAL; in its_vlpi_map()
1853 if (!its_dev->event_map.vm) { in its_vlpi_map()
1856 maps = kcalloc(its_dev->event_map.nr_lpis, sizeof(*maps), in its_vlpi_map()
1859 return -ENOMEM; in its_vlpi_map()
1861 its_dev->event_map.vm = info->map->vm; in its_vlpi_map()
1862 its_dev->event_map.vlpi_maps = maps; in its_vlpi_map()
1863 } else if (its_dev->event_map.vm != info->map->vm) { in its_vlpi_map()
1864 return -EINVAL; in its_vlpi_map()
1868 its_dev->event_map.vlpi_maps[event] = *info->map; in its_vlpi_map()
1875 its_map_vm(its_dev->its, info->map->vm); in its_vlpi_map()
1884 lpi_write_config(d, 0xff, info->map->properties); in its_vlpi_map()
1893 its_dev->event_map.nr_vlpis++; in its_vlpi_map()
1906 if (!its_dev->event_map.vm || !map) in its_vlpi_get()
1907 return -EINVAL; in its_vlpi_get()
1910 *info->map = *map; in its_vlpi_get()
1920 if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) in its_vlpi_unmap()
1921 return -EINVAL; in its_vlpi_unmap()
1928 its_send_mapti(its_dev, d->hwirq, event); in its_vlpi_unmap()
1934 its_unmap_vm(its_dev->its, its_dev->event_map.vm); in its_vlpi_unmap()
1940 if (!--its_dev->event_map.nr_vlpis) { in its_vlpi_unmap()
1941 its_dev->event_map.vm = NULL; in its_vlpi_unmap()
1942 kfree(its_dev->event_map.vlpi_maps); in its_vlpi_unmap()
1952 if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) in its_vlpi_prop_update()
1953 return -EINVAL; in its_vlpi_prop_update()
1955 if (info->cmd_type == PROP_UPDATE_AND_INV_VLPI) in its_vlpi_prop_update()
1956 lpi_update_config(d, 0xff, info->config); in its_vlpi_prop_update()
1958 lpi_write_config(d, 0xff, info->config); in its_vlpi_prop_update()
1959 its_vlpi_set_doorbell(d, !!(info->config & LPI_PROP_ENABLED)); in its_vlpi_prop_update()
1970 if (!is_v4(its_dev->its)) in its_irq_set_vcpu_affinity()
1971 return -EINVAL; in its_irq_set_vcpu_affinity()
1973 guard(raw_spinlock)(&its_dev->event_map.vlpi_lock); in its_irq_set_vcpu_affinity()
1979 switch (info->cmd_type) { in its_irq_set_vcpu_affinity()
1991 return -EINVAL; in its_irq_set_vcpu_affinity()
2040 range->base_id = base; in mk_lpi_range()
2041 range->span = span; in mk_lpi_range()
2050 int err = -ENOSPC; in alloc_lpi_range()
2055 if (range->span >= nr_lpis) { in alloc_lpi_range()
2056 *base = range->base_id; in alloc_lpi_range()
2057 range->base_id += nr_lpis; in alloc_lpi_range()
2058 range->span -= nr_lpis; in alloc_lpi_range()
2060 if (range->span == 0) { in alloc_lpi_range()
2061 list_del(&range->entry); in alloc_lpi_range()
2078 if (&a->entry == &lpi_range_list || &b->entry == &lpi_range_list) in merge_lpi_ranges()
2080 if (a->base_id + a->span != b->base_id) in merge_lpi_ranges()
2082 b->base_id = a->base_id; in merge_lpi_ranges()
2083 b->span += a->span; in merge_lpi_ranges()
2084 list_del(&a->entry); in merge_lpi_ranges()
2094 return -ENOMEM; in free_lpi_range()
2099 if (old->base_id < base) in free_lpi_range()
2103 * old is the last element with ->base_id smaller than base, in free_lpi_range()
2105 * ->base_id smaller than base, &old->entry ends up pointing in free_lpi_range()
2109 list_add(&new->entry, &old->entry); in free_lpi_range()
2123 u32 lpis = (1UL << id_bits) - 8192; in its_lpi_init()
2127 numlpis = 1UL << GICD_TYPER_NUM_LPIS(gic_rdists->gicd_typer); in its_lpi_init()
2158 err = -ENOSPC; in its_lpi_alloc()
2184 /* Priority 0xa0, Group-1, disabled */ in gic_reset_prop_table()
2223 addr_end = addr + size - 1; in gic_check_reserved_range()
2247 if (gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED) { in its_setup_lpi_prop_table()
2253 gic_rdists->prop_table_pa = val & GENMASK_ULL(51, 12); in its_setup_lpi_prop_table()
2254 gic_rdists->prop_table_va = memremap(gic_rdists->prop_table_pa, in its_setup_lpi_prop_table()
2257 gic_reset_prop_table(gic_rdists->prop_table_va); in its_setup_lpi_prop_table()
2262 GICD_TYPER_ID_BITS(gic_rdists->gicd_typer), in its_setup_lpi_prop_table()
2267 return -ENOMEM; in its_setup_lpi_prop_table()
2270 gic_rdists->prop_table_pa = page_to_phys(page); in its_setup_lpi_prop_table()
2271 gic_rdists->prop_table_va = page_address(page); in its_setup_lpi_prop_table()
2272 WARN_ON(gic_reserve_range(gic_rdists->prop_table_pa, in its_setup_lpi_prop_table()
2277 &gic_rdists->prop_table_pa); in its_setup_lpi_prop_table()
2294 u32 idx = baser - its->tables; in its_read_baser()
2296 return gits_read_baser(its->base + GITS_BASER + (idx << 3)); in its_read_baser()
2302 u32 idx = baser - its->tables; in its_write_baser()
2304 gits_write_baser(val, its->base + GITS_BASER + (idx << 3)); in its_write_baser()
2305 baser->val = its_read_baser(its, baser); in its_write_baser()
2319 psz = baser->psz; in its_setup_baser()
2322 pr_warn("ITS@%pa: %s too large, reduce ITS pages %u->%u\n", in its_setup_baser()
2323 &its->phys_base, its_base_type_string[type], in its_setup_baser()
2329 page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, order); in its_setup_baser()
2331 return -ENOMEM; in its_setup_baser()
2343 return -ENXIO; in its_setup_baser()
2353 ((esz - 1) << GITS_BASER_ENTRY_SIZE_SHIFT) | in its_setup_baser()
2354 ((alloc_pages - 1) << GITS_BASER_PAGES_SHIFT) | in its_setup_baser()
2377 tmp = baser->val; in its_setup_baser()
2385 * non-cacheable as well. in its_setup_baser()
2396 &its->phys_base, its_base_type_string[type], in its_setup_baser()
2399 return -ENXIO; in its_setup_baser()
2402 baser->order = order; in its_setup_baser()
2403 baser->base = base; in its_setup_baser()
2404 baser->psz = psz; in its_setup_baser()
2408 &its->phys_base, (int)(PAGE_ORDER_TO_SIZE(order) / (int)tmp), in its_setup_baser()
2426 u32 psz = baser->psz; in its_parse_indirect_baser()
2432 * Find out whether hw supports a single or two-level table by in its_parse_indirect_baser()
2436 indirect = !!(baser->val & GITS_BASER_INDIRECT); in its_parse_indirect_baser()
2446 ids -= ilog2(psz / (int)esz); in its_parse_indirect_baser()
2455 * massive waste of memory if two-level device table in its_parse_indirect_baser()
2462 pr_warn("ITS@%pa: %s Table too large, reduce ids %llu->%u\n", in its_parse_indirect_baser()
2463 &its->phys_base, its_base_type_string[type], in its_parse_indirect_baser()
2492 svpet = FIELD_GET(GITS_TYPER_SVPET, its->typer); in compute_its_aff()
2494 val |= FIELD_PREP(GICR_TYPER_AFFINITY, its->mpidr); in compute_its_aff()
2503 if (!FIELD_GET(GITS_TYPER_SVPET, cur_its->typer)) in find_sibling_its()
2514 if (!FIELD_GET(GITS_TYPER_SVPET, its->typer)) in find_sibling_its()
2521 baser = its->tables[2].val; in find_sibling_its()
2536 if (its->tables[i].base) { in its_free_tables()
2537 free_pages((unsigned long)its->tables[i].base, in its_free_tables()
2538 its->tables[i].order); in its_free_tables()
2539 its->tables[i].base = NULL; in its_free_tables()
2572 if (FIELD_GET(GITS_BASER_PAGE_SIZE_MASK, baser->val) == gpsz) in its_probe_baser_psz()
2584 return -1; in its_probe_baser_psz()
2588 baser->psz = psz; in its_probe_baser_psz()
2598 if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_22375) in its_alloc_tables()
2602 if (its->flags & ITS_FLAGS_FORCE_NON_SHAREABLE) { in its_alloc_tables()
2608 struct its_baser *baser = its->tables + i; in its_alloc_tables()
2619 return -ENXIO; in its_alloc_tables()
2622 order = get_order(baser->psz); in its_alloc_tables()
2636 *baser = sibling->tables[2]; in its_alloc_tables()
2637 its_write_baser(its, baser, baser->val); in its_alloc_tables()
2654 cache = baser->val & GITS_BASER_CACHEABILITY_MASK; in its_alloc_tables()
2655 shr = baser->val & GITS_BASER_SHAREABILITY_MASK; in its_alloc_tables()
2676 if (!FIELD_GET(GITS_TYPER_SVPET, its->typer)) in inherit_vpe_l1_table_from_its()
2683 baser = its->tables[2].val; in inherit_vpe_l1_table_from_its()
2688 gic_data_rdist()->vpe_l1_base = its->tables[2].base; in inherit_vpe_l1_table_from_its()
2710 val |= FIELD_PREP(GICR_VPROPBASER_4_1_SIZE, GITS_BASER_NR_PAGES(baser) - 1); in inherit_vpe_l1_table_from_its()
2728 void __iomem *base = gic_data_rdist_cpu(cpu)->rd_base; in inherit_vpe_l1_table_from_rd()
2746 gic_data_rdist()->vpe_l1_base = gic_data_rdist_cpu(cpu)->vpe_l1_base; in inherit_vpe_l1_table_from_rd()
2747 *mask = gic_data_rdist_cpu(cpu)->vpe_table_mask; in inherit_vpe_l1_table_from_rd()
2757 void __iomem *base = gic_data_rdist_cpu(cpu)->rd_base; in allocate_vpe_l2_table()
2763 if (!gic_rdists->has_rvpeid) in allocate_vpe_l2_table()
2766 /* Skip non-present CPUs */ in allocate_vpe_l2_table()
2800 table = gic_data_rdist_cpu(cpu)->vpe_l1_base; in allocate_vpe_l2_table()
2833 if (!gic_rdists->has_rvpeid) in allocate_vpe_l1_table()
2852 val = inherit_vpe_l1_table_from_rd(&gic_data_rdist()->vpe_table_mask); in allocate_vpe_l1_table()
2856 gic_data_rdist()->vpe_table_mask = kzalloc(sizeof(cpumask_t), GFP_ATOMIC); in allocate_vpe_l1_table()
2857 if (!gic_data_rdist()->vpe_table_mask) in allocate_vpe_l1_table()
2858 return -ENOMEM; in allocate_vpe_l1_table()
2916 val |= FIELD_PREP(GICR_VPROPBASER_4_1_SIZE, npg - 1); in allocate_vpe_l1_table()
2925 return -ENOMEM; in allocate_vpe_l1_table()
2927 gic_data_rdist()->vpe_l1_base = page_address(page); in allocate_vpe_l1_table()
2941 cpumask_set_cpu(smp_processor_id(), gic_data_rdist()->vpe_table_mask); in allocate_vpe_l1_table()
2945 cpumask_pr_args(gic_data_rdist()->vpe_table_mask)); in allocate_vpe_l1_table()
2954 its->collections = kcalloc(nr_cpu_ids, sizeof(*its->collections), in its_alloc_collections()
2956 if (!its->collections) in its_alloc_collections()
2957 return -ENOMEM; in its_alloc_collections()
2960 its->collections[i].target_address = ~0ULL; in its_alloc_collections()
2974 /* Make sure the GIC will observe the zero-ed page */ in its_allocate_pending_table()
3008 * flag the RD tables as pre-allocated if the stars do align. in allocate_lpi_tables()
3012 gic_rdists->flags |= (RDIST_FLAGS_RD_TABLES_PREALLOCATED | in allocate_lpi_tables()
3032 return -ENOMEM; in allocate_lpi_tables()
3035 gic_data_rdist_cpu(cpu)->pend_page = pend_page; in allocate_lpi_tables()
3051 count--; in read_vpend_dirty_clear()
3088 if (gic_data_rdist()->flags & RD_LOCAL_LPI_ENABLED) in its_cpu_init_lpis()
3092 if ((gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED) && in its_cpu_init_lpis()
3100 if (WARN_ON(gic_rdists->prop_table_pa != paddr)) in its_cpu_init_lpis()
3107 gic_data_rdist()->flags |= RD_LOCAL_PENDTABLE_PREALLOCATED; in its_cpu_init_lpis()
3112 pend_page = gic_data_rdist()->pend_page; in its_cpu_init_lpis()
3116 val = (gic_rdists->prop_table_pa | in its_cpu_init_lpis()
3119 ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK)); in its_cpu_init_lpis()
3130 * The HW reports non-shareable, we must in its_cpu_init_lpis()
3140 gic_rdists->flags |= RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING; in its_cpu_init_lpis()
3156 * The HW reports non-shareable, we must remove the in its_cpu_init_lpis()
3171 if (gic_rdists->has_vlpis && !gic_rdists->has_rvpeid) { in its_cpu_init_lpis()
3181 val = (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; in its_cpu_init_lpis()
3200 gic_rdists->has_rvpeid = false; in its_cpu_init_lpis()
3201 gic_rdists->has_vlpis = false; in its_cpu_init_lpis()
3206 gic_data_rdist()->flags |= RD_LOCAL_LPI_ENABLED; in its_cpu_init_lpis()
3209 gic_data_rdist()->flags & RD_LOCAL_PENDTABLE_PREALLOCATED ? in its_cpu_init_lpis()
3220 if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { in its_cpu_init_collection()
3224 if (its->numa_node != NUMA_NO_NODE && in its_cpu_init_collection()
3225 its->numa_node != of_node_to_nid(cpu_node)) in its_cpu_init_collection()
3233 if (gic_read_typer(its->base + GITS_TYPER) & GITS_TYPER_PTA) { in its_cpu_init_collection()
3238 target = gic_data_rdist()->phys_base; in its_cpu_init_collection()
3246 its->collections[cpu].target_address = target; in its_cpu_init_collection()
3247 its->collections[cpu].col_id = cpu; in its_cpu_init_collection()
3249 its_send_mapc(its, &its->collections[cpu], 1); in its_cpu_init_collection()
3250 its_send_invall(its, &its->collections[cpu]); in its_cpu_init_collection()
3270 raw_spin_lock_irqsave(&its->lock, flags); in its_find_device()
3272 list_for_each_entry(tmp, &its->its_device_list, entry) { in its_find_device()
3273 if (tmp->device_id == dev_id) { in its_find_device()
3279 raw_spin_unlock_irqrestore(&its->lock, flags); in its_find_device()
3289 if (GITS_BASER_TYPE(its->tables[i].val) == type) in its_get_baser()
3290 return &its->tables[i]; in its_get_baser()
3304 esz = GITS_BASER_ENTRY_SIZE(baser->val); in its_alloc_table_entry()
3305 if (!(baser->val & GITS_BASER_INDIRECT)) in its_alloc_table_entry()
3306 return (id < (PAGE_ORDER_TO_SIZE(baser->order) / esz)); in its_alloc_table_entry()
3309 idx = id >> ilog2(baser->psz / esz); in its_alloc_table_entry()
3310 if (idx >= (PAGE_ORDER_TO_SIZE(baser->order) / GITS_LVL1_ENTRY_SIZE)) in its_alloc_table_entry()
3313 table = baser->base; in its_alloc_table_entry()
3317 page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, in its_alloc_table_entry()
3318 get_order(baser->psz)); in its_alloc_table_entry()
3323 if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) in its_alloc_table_entry()
3324 gic_flush_dcache_to_poc(page_address(page), baser->psz); in its_alloc_table_entry()
3329 if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) in its_alloc_table_entry()
3379 if (!gic_rdists->has_rvpeid) in its_alloc_vpe_table()
3405 int sz; in its_create_device() local
3419 sz = nr_ites * (FIELD_GET(GITS_TYPER_ITT_ENTRY_SIZE, its->typer) + 1); in its_create_device()
3420 sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; in its_create_device()
3421 itt = kzalloc_node(sz, GFP_KERNEL, its->numa_node); in its_create_device()
3441 gic_flush_dcache_to_poc(itt, sz); in its_create_device()
3443 dev->its = its; in its_create_device()
3444 dev->itt = itt; in its_create_device()
3445 dev->nr_ites = nr_ites; in its_create_device()
3446 dev->event_map.lpi_map = lpi_map; in its_create_device()
3447 dev->event_map.col_map = col_map; in its_create_device()
3448 dev->event_map.lpi_base = lpi_base; in its_create_device()
3449 dev->event_map.nr_lpis = nr_lpis; in its_create_device()
3450 raw_spin_lock_init(&dev->event_map.vlpi_lock); in its_create_device()
3451 dev->device_id = dev_id; in its_create_device()
3452 INIT_LIST_HEAD(&dev->entry); in its_create_device()
3454 raw_spin_lock_irqsave(&its->lock, flags); in its_create_device()
3455 list_add(&dev->entry, &its->its_device_list); in its_create_device()
3456 raw_spin_unlock_irqrestore(&its->lock, flags); in its_create_device()
3468 raw_spin_lock_irqsave(&its_dev->its->lock, flags); in its_free_device()
3469 list_del(&its_dev->entry); in its_free_device()
3470 raw_spin_unlock_irqrestore(&its_dev->its->lock, flags); in its_free_device()
3471 kfree(its_dev->event_map.col_map); in its_free_device()
3472 kfree(its_dev->itt); in its_free_device()
3481 idx = bitmap_find_free_region(dev->event_map.lpi_map, in its_alloc_device_irq()
3482 dev->event_map.nr_lpis, in its_alloc_device_irq()
3485 return -ENOSPC; in its_alloc_device_irq()
3487 *hwirq = dev->event_map.lpi_base + idx; in its_alloc_device_irq()
3507 dev_id = info->scratchpad[0].ul; in its_msi_prepare()
3510 its = msi_info->data; in its_msi_prepare()
3512 if (!gic_rdists->has_direct_lpi && in its_msi_prepare()
3514 vpe_proxy.dev->its == its && in its_msi_prepare()
3515 dev_id == vpe_proxy.dev->device_id) { in its_msi_prepare()
3519 return -EINVAL; in its_msi_prepare()
3522 mutex_lock(&its->dev_alloc_lock); in its_msi_prepare()
3530 its_dev->shared = true; in its_msi_prepare()
3537 err = -ENOMEM; in its_msi_prepare()
3541 if (info->flags & MSI_ALLOC_FLAGS_PROXY_DEVICE) in its_msi_prepare()
3542 its_dev->shared = true; in its_msi_prepare()
3546 mutex_unlock(&its->dev_alloc_lock); in its_msi_prepare()
3547 info->scratchpad[0].ptr = its_dev; in its_msi_prepare()
3561 if (irq_domain_get_of_node(domain->parent)) { in its_irq_gic_domain_alloc()
3562 fwspec.fwnode = domain->parent->fwnode; in its_irq_gic_domain_alloc()
3567 } else if (is_fwnode_irqchip(domain->parent->fwnode)) { in its_irq_gic_domain_alloc()
3568 fwspec.fwnode = domain->parent->fwnode; in its_irq_gic_domain_alloc()
3573 return -EINVAL; in its_irq_gic_domain_alloc()
3583 struct its_device *its_dev = info->scratchpad[0].ptr; in its_irq_domain_alloc()
3584 struct its_node *its = its_dev->its; in its_irq_domain_alloc()
3594 err = iommu_dma_prepare_msi(info->desc, its->get_msi_base(its_dev)); in its_irq_domain_alloc()
3610 (int)(hwirq + i - its_dev->event_map.lpi_base), in its_irq_domain_alloc()
3626 return -EINVAL; in its_irq_domain_activate()
3629 its_dev->event_map.col_map[event] = cpu; in its_irq_domain_activate()
3633 its_send_mapti(its_dev, d->hwirq, event); in its_irq_domain_activate()
3643 its_dec_lpi_count(d, its_dev->event_map.col_map[event]); in its_irq_domain_deactivate()
3653 struct its_node *its = its_dev->its; in its_irq_domain_free()
3656 bitmap_release_region(its_dev->event_map.lpi_map, in its_irq_domain_free()
3667 mutex_lock(&its->dev_alloc_lock); in its_irq_domain_free()
3673 if (!its_dev->shared && in its_irq_domain_free()
3674 bitmap_empty(its_dev->event_map.lpi_map, in its_irq_domain_free()
3675 its_dev->event_map.nr_lpis)) { in its_irq_domain_free()
3676 its_lpi_free(its_dev->event_map.lpi_map, in its_irq_domain_free()
3677 its_dev->event_map.lpi_base, in its_irq_domain_free()
3678 its_dev->event_map.nr_lpis); in its_irq_domain_free()
3685 mutex_unlock(&its->dev_alloc_lock); in its_irq_domain_free()
3719 if (gic_rdists->has_rvpeid) in its_vpe_db_proxy_unmap_locked()
3723 if (vpe->vpe_proxy_event == -1) in its_vpe_db_proxy_unmap_locked()
3726 its_send_discard(vpe_proxy.dev, vpe->vpe_proxy_event); in its_vpe_db_proxy_unmap_locked()
3727 vpe_proxy.vpes[vpe->vpe_proxy_event] = NULL; in its_vpe_db_proxy_unmap_locked()
3737 vpe_proxy.next_victim = vpe->vpe_proxy_event; in its_vpe_db_proxy_unmap_locked()
3739 vpe->vpe_proxy_event = -1; in its_vpe_db_proxy_unmap_locked()
3745 if (gic_rdists->has_rvpeid) in its_vpe_db_proxy_unmap()
3748 if (!gic_rdists->has_direct_lpi) { in its_vpe_db_proxy_unmap()
3760 if (gic_rdists->has_rvpeid) in its_vpe_db_proxy_map_locked()
3764 if (vpe->vpe_proxy_event != -1) in its_vpe_db_proxy_map_locked()
3773 vpe->vpe_proxy_event = vpe_proxy.next_victim; in its_vpe_db_proxy_map_locked()
3774 vpe_proxy.next_victim = (vpe_proxy.next_victim + 1) % vpe_proxy.dev->nr_ites; in its_vpe_db_proxy_map_locked()
3776 vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = vpe->col_idx; in its_vpe_db_proxy_map_locked()
3777 its_send_mapti(vpe_proxy.dev, vpe->vpe_db_lpi, vpe->vpe_proxy_event); in its_vpe_db_proxy_map_locked()
3786 if (gic_rdists->has_rvpeid) in its_vpe_db_proxy_move()
3789 if (gic_rdists->has_direct_lpi) { in its_vpe_db_proxy_move()
3792 rdbase = per_cpu_ptr(gic_rdists->rdist, from)->rd_base; in its_vpe_db_proxy_move()
3793 gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); in its_vpe_db_proxy_move()
3803 target_col = &vpe_proxy.dev->its->collections[to]; in its_vpe_db_proxy_move()
3804 its_send_movi(vpe_proxy.dev, target_col, vpe->vpe_proxy_event); in its_vpe_db_proxy_move()
3805 vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = to; in its_vpe_db_proxy_move()
3823 if (!atomic_read(&vpe->vmapp_count)) in its_vpe_set_affinity()
3824 return -EINVAL; in its_vpe_set_affinity()
3835 * protect us, and that we must ensure nobody samples vpe->col_idx in its_vpe_set_affinity()
3837 * taken on any vLPI handling path that evaluates vpe->col_idx. in its_vpe_set_affinity()
3840 table_mask = gic_data_rdist_cpu(from)->vpe_table_mask; in its_vpe_set_affinity()
3854 vpe->col_idx = cpu; in its_vpe_set_affinity()
3871 if (!gic_rdists->has_vpend_valid_dirty) in its_wait_vpt_parse_complete()
3886 val = virt_to_phys(page_address(vpe->its_vm->vprop_page)) & in its_vpe_schedule()
3888 val |= (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; in its_vpe_schedule()
3895 val = virt_to_phys(page_address(vpe->vpt_page)) & in its_vpe_schedule()
3904 * easily. So in the end, vpe->pending_last is only an in its_vpe_schedule()
3911 val |= vpe->idai ? GICR_VPENDBASER_IDAI : 0; in its_vpe_schedule()
3923 vpe->idai = !!(val & GICR_VPENDBASER_IDAI); in its_vpe_deschedule()
3924 vpe->pending_last = !!(val & GICR_VPENDBASER_PendingLast); in its_vpe_deschedule()
3935 if (its_list_map && !vpe->its_vm->vlpi_count[its->list_nr]) in its_vpe_invall()
3952 switch (info->cmd_type) { in its_vpe_set_vcpu_affinity()
3970 return -EINVAL; in its_vpe_set_vcpu_affinity()
3982 cmd(vpe_proxy.dev, vpe->vpe_proxy_event); in its_vpe_send_cmd()
3991 if (gic_rdists->has_direct_lpi) in its_vpe_send_inv()
3992 __direct_lpi_inv(d, d->parent_data->hwirq); in its_vpe_send_inv()
4005 lpi_write_config(d->parent_data, LPI_PROP_ENABLED, 0); in its_vpe_mask_irq()
4012 lpi_write_config(d->parent_data, 0, LPI_PROP_ENABLED); in its_vpe_unmask_irq()
4023 return -EINVAL; in its_vpe_set_irqchip_state()
4025 if (gic_rdists->has_direct_lpi) { in its_vpe_set_irqchip_state()
4028 rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; in its_vpe_set_irqchip_state()
4030 gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_SETLPIR); in its_vpe_set_irqchip_state()
4032 gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); in its_vpe_set_irqchip_state()
4051 .name = "GICv4-vpe",
4095 lpi_write_config(d->parent_data, LPI_PROP_ENABLED, 0); in its_vpe_4_1_mask_irq()
4101 lpi_write_config(d->parent_data, 0, LPI_PROP_ENABLED); in its_vpe_4_1_unmask_irq()
4113 val |= info->g0en ? GICR_VPENDBASER_4_1_VGRP0EN : 0; in its_vpe_4_1_schedule()
4114 val |= info->g1en ? GICR_VPENDBASER_4_1_VGRP1EN : 0; in its_vpe_4_1_schedule()
4115 val |= FIELD_PREP(GICR_VPENDBASER_4_1_VPEID, vpe->vpe_id); in its_vpe_4_1_schedule()
4126 if (info->req_db) { in its_vpe_4_1_deschedule()
4130 * vPE is going to block: make the vPE non-resident with in its_vpe_4_1_deschedule()
4132 * we read-back PendingLast clear, then a doorbell will be in its_vpe_4_1_deschedule()
4139 raw_spin_lock_irqsave(&vpe->vpe_lock, flags); in its_vpe_4_1_deschedule()
4143 vpe->pending_last = !!(val & GICR_VPENDBASER_PendingLast); in its_vpe_4_1_deschedule()
4144 raw_spin_unlock_irqrestore(&vpe->vpe_lock, flags); in its_vpe_4_1_deschedule()
4147 * We're not blocking, so just make the vPE non-resident in its_vpe_4_1_deschedule()
4153 vpe->pending_last = true; in its_vpe_4_1_deschedule()
4165 val |= FIELD_PREP(GICR_INVALLR_VPEID, vpe->vpe_id); in its_vpe_4_1_invall()
4169 raw_spin_lock(&gic_data_rdist_cpu(cpu)->rd_lock); in its_vpe_4_1_invall()
4170 rdbase = per_cpu_ptr(gic_rdists->rdist, cpu)->rd_base; in its_vpe_4_1_invall()
4174 raw_spin_unlock(&gic_data_rdist_cpu(cpu)->rd_lock); in its_vpe_4_1_invall()
4183 switch (info->cmd_type) { in its_vpe_4_1_set_vcpu_affinity()
4201 return -EINVAL; in its_vpe_4_1_set_vcpu_affinity()
4206 .name = "GICv4.1-vpe",
4220 desc.its_vsgi_cmd.sgi = d->hwirq; in its_configure_sgi()
4221 desc.its_vsgi_cmd.priority = vpe->sgi_config[d->hwirq].priority; in its_configure_sgi()
4222 desc.its_vsgi_cmd.enable = vpe->sgi_config[d->hwirq].enabled; in its_configure_sgi()
4223 desc.its_vsgi_cmd.group = vpe->sgi_config[d->hwirq].group; in its_configure_sgi()
4238 vpe->sgi_config[d->hwirq].enabled = false; in its_sgi_mask_irq()
4246 vpe->sgi_config[d->hwirq].enabled = true; in its_sgi_unmask_irq()
4268 return -EINVAL; in its_sgi_set_irqchip_state()
4275 val = FIELD_PREP(GITS_SGIR_VPEID, vpe->vpe_id); in its_sgi_set_irqchip_state()
4276 val |= FIELD_PREP(GITS_SGIR_VINTID, d->hwirq); in its_sgi_set_irqchip_state()
4277 writeq_relaxed(val, its->sgir_base + GITS_SGIR - SZ_128K); in its_sgi_set_irqchip_state()
4296 return -EINVAL; in its_sgi_get_irqchip_state()
4301 * - Concurrent vPE affinity change: we must make sure it cannot in its_sgi_get_irqchip_state()
4305 * - Concurrent VSGIPENDR access: As it involves accessing two in its_sgi_get_irqchip_state()
4309 raw_spin_lock(&gic_data_rdist_cpu(cpu)->rd_lock); in its_sgi_get_irqchip_state()
4310 base = gic_data_rdist_cpu(cpu)->rd_base + SZ_128K; in its_sgi_get_irqchip_state()
4311 writel_relaxed(vpe->vpe_id, base + GICR_VSGIR); in its_sgi_get_irqchip_state()
4317 count--; in its_sgi_get_irqchip_state()
4327 raw_spin_unlock(&gic_data_rdist_cpu(cpu)->rd_lock); in its_sgi_get_irqchip_state()
4331 return -ENXIO; in its_sgi_get_irqchip_state()
4333 *val = !!(status & (1 << d->hwirq)); in its_sgi_get_irqchip_state()
4343 switch (info->cmd_type) { in its_sgi_set_vcpu_affinity()
4345 vpe->sgi_config[d->hwirq].priority = info->priority; in its_sgi_set_vcpu_affinity()
4346 vpe->sgi_config[d->hwirq].group = info->group; in its_sgi_set_vcpu_affinity()
4351 return -EINVAL; in its_sgi_set_vcpu_affinity()
4356 .name = "GICv4.1-sgi",
4376 vpe->sgi_config[i].priority = 0; in its_sgi_irq_domain_alloc()
4377 vpe->sgi_config[i].enabled = false; in its_sgi_irq_domain_alloc()
4378 vpe->sgi_config[i].group = false; in its_sgi_irq_domain_alloc()
4411 * - To change the configuration, CLEAR must be set to false, in its_sgi_irq_domain_deactivate()
4413 * - To clear the pending bit, CLEAR must be set to true, leaving in its_sgi_irq_domain_deactivate()
4418 vpe->sgi_config[d->hwirq].enabled = false; in its_sgi_irq_domain_deactivate()
4454 return -ENOMEM; in its_vpe_init()
4460 return -ENOMEM; in its_vpe_init()
4463 raw_spin_lock_init(&vpe->vpe_lock); in its_vpe_init()
4464 vpe->vpe_id = vpe_id; in its_vpe_init()
4465 vpe->vpt_page = vpt_page; in its_vpe_init()
4466 atomic_set(&vpe->vmapp_count, 0); in its_vpe_init()
4467 if (!gic_rdists->has_rvpeid) in its_vpe_init()
4468 vpe->vpe_proxy_event = -1; in its_vpe_init()
4476 its_vpe_id_free(vpe->vpe_id); in its_vpe_teardown()
4477 its_free_pending_table(vpe->vpt_page); in its_vpe_teardown()
4484 struct its_vm *vm = domain->host_data; in its_vpe_irq_domain_free()
4494 BUG_ON(vm != vpe->its_vm); in its_vpe_irq_domain_free()
4496 clear_bit(data->hwirq, vm->db_bitmap); in its_vpe_irq_domain_free()
4501 if (bitmap_empty(vm->db_bitmap, vm->nr_db_lpis)) { in its_vpe_irq_domain_free()
4502 its_lpi_free(vm->db_bitmap, vm->db_lpi_base, vm->nr_db_lpis); in its_vpe_irq_domain_free()
4503 its_free_prop_table(vm->vprop_page); in its_vpe_irq_domain_free()
4518 return -ENOMEM; in its_vpe_irq_domain_alloc()
4522 return -ENOMEM; in its_vpe_irq_domain_alloc()
4528 return -ENOMEM; in its_vpe_irq_domain_alloc()
4531 vm->db_bitmap = bitmap; in its_vpe_irq_domain_alloc()
4532 vm->db_lpi_base = base; in its_vpe_irq_domain_alloc()
4533 vm->nr_db_lpis = nr_ids; in its_vpe_irq_domain_alloc()
4534 vm->vprop_page = vprop_page; in its_vpe_irq_domain_alloc()
4536 if (gic_rdists->has_rvpeid) in its_vpe_irq_domain_alloc()
4540 vm->vpes[i]->vpe_db_lpi = base + i; in its_vpe_irq_domain_alloc()
4541 err = its_vpe_init(vm->vpes[i]); in its_vpe_irq_domain_alloc()
4545 vm->vpes[i]->vpe_db_lpi); in its_vpe_irq_domain_alloc()
4549 irqchip, vm->vpes[i]); in its_vpe_irq_domain_alloc()
4575 vpe->col_idx = cpumask_first(cpu_online_mask); in its_vpe_irq_domain_activate()
4585 irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); in its_vpe_irq_domain_activate()
4615 if (find_4_1_its() && !atomic_read(&vpe->vmapp_count)) in its_vpe_irq_domain_deactivate()
4616 gic_flush_dcache_to_poc(page_address(vpe->vpt_page), in its_vpe_irq_domain_deactivate()
4651 count--; in its_force_quiescent()
4653 return -EBUSY; in its_force_quiescent()
4665 its->typer &= ~GITS_TYPER_DEVBITS; in its_enable_quirk_cavium_22375()
4666 its->typer |= FIELD_PREP(GITS_TYPER_DEVBITS, 20 - 1); in its_enable_quirk_cavium_22375()
4667 its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_22375; in its_enable_quirk_cavium_22375()
4676 its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_23144; in its_enable_quirk_cavium_23144()
4686 its->typer &= ~GITS_TYPER_ITT_ENTRY_SIZE; in its_enable_quirk_qdf2400_e0065()
4687 its->typer |= FIELD_PREP(GITS_TYPER_ITT_ENTRY_SIZE, 16 - 1); in its_enable_quirk_qdf2400_e0065()
4694 struct its_node *its = its_dev->its; in its_irq_get_msi_base_pre_its()
4697 * The Socionext Synquacer SoC has a so-called 'pre-ITS', in its_irq_get_msi_base_pre_its()
4698 * which maps 32-bit writes targeted at a separate window of in its_irq_get_msi_base_pre_its()
4703 return its->pre_its_base + (its_dev->device_id << 2); in its_irq_get_msi_base_pre_its()
4712 if (!fwnode_property_read_u32_array(its->fwnode_handle, in its_enable_quirk_socionext_synquacer()
4713 "socionext,synquacer-pre-its", in its_enable_quirk_socionext_synquacer()
4717 its->pre_its_base = pre_its_window[0]; in its_enable_quirk_socionext_synquacer()
4718 its->get_msi_base = its_irq_get_msi_base_pre_its; in its_enable_quirk_socionext_synquacer()
4720 ids = ilog2(pre_its_window[1]) - 2; in its_enable_quirk_socionext_synquacer()
4722 its->typer &= ~GITS_TYPER_DEVBITS; in its_enable_quirk_socionext_synquacer()
4723 its->typer |= FIELD_PREP(GITS_TYPER_DEVBITS, ids - 1); in its_enable_quirk_socionext_synquacer()
4726 /* the pre-ITS breaks isolation, so disable MSI remapping */ in its_enable_quirk_socionext_synquacer()
4727 its->msi_domain_flags &= ~IRQ_DOMAIN_FLAG_ISOLATED_MSI; in its_enable_quirk_socionext_synquacer()
4741 its->vlpi_redist_offset = SZ_128K; in its_enable_quirk_hip07_161600802()
4753 its->flags |= ITS_FLAGS_FORCE_NON_SHAREABLE; in its_enable_rk3588001()
4754 gic_rdists->flags |= RDIST_FLAGS_FORCE_NON_SHAREABLE; in its_enable_rk3588001()
4763 its->flags |= ITS_FLAGS_FORCE_NON_SHAREABLE; in its_set_non_coherent()
4795 * The Socionext Synquacer SoC incorporates ARM's own GIC-500
4796 * implementation, but with a 'pre-ITS' added that requires
4799 .desc = "ITS: Socionext Synquacer pre-ITS",
4822 .desc = "ITS: non-coherent attribute",
4823 .property = "dma-noncoherent",
4832 u32 iidr = readl_relaxed(its->base + GITS_IIDR); in its_enable_quirks()
4836 if (is_of_node(its->fwnode_handle)) in its_enable_quirks()
4837 gic_enable_of_quirks(to_of_node(its->fwnode_handle), in its_enable_quirks()
4850 base = its->base; in its_save_disable()
4851 its->ctlr_save = readl_relaxed(base + GITS_CTLR); in its_save_disable()
4855 &its->phys_base, err); in its_save_disable()
4856 writel_relaxed(its->ctlr_save, base + GITS_CTLR); in its_save_disable()
4860 its->cbaser_save = gits_read_cbaser(base + GITS_CBASER); in its_save_disable()
4868 base = its->base; in its_save_disable()
4869 writel_relaxed(its->ctlr_save, base + GITS_CTLR); in its_save_disable()
4887 base = its->base; in its_restore_enable()
4901 &its->phys_base, ret); in its_restore_enable()
4905 gits_write_cbaser(its->cbaser_save, base + GITS_CBASER); in its_restore_enable()
4911 its->cmd_write = its->cmd_base; in its_restore_enable()
4916 struct its_baser *baser = &its->tables[i]; in its_restore_enable()
4918 if (!(baser->val & GITS_BASER_VALID)) in its_restore_enable()
4921 its_write_baser(its, baser, baser->val); in its_restore_enable()
4923 writel_relaxed(its->ctlr_save, base + GITS_CTLR); in its_restore_enable()
4930 if (its->collections[smp_processor_id()].col_id < in its_restore_enable()
4947 its_base = ioremap(res->start, SZ_64K); in its_map_one()
4949 pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start); in its_map_one()
4950 *err = -ENOMEM; in its_map_one()
4956 pr_warn("ITS@%pa: No ITS detected, giving up\n", &res->start); in its_map_one()
4957 *err = -ENODEV; in its_map_one()
4963 pr_warn("ITS@%pa: Failed to quiesce, giving up\n", &res->start); in its_map_one()
4981 return -ENOMEM; in its_init_domain()
4983 info->ops = &its_msi_domain_ops; in its_init_domain()
4984 info->data = its; in its_init_domain()
4987 its->msi_domain_flags, 0, in its_init_domain()
4988 its->fwnode_handle, &its_domain_ops, in its_init_domain()
4992 return -ENOMEM; in its_init_domain()
5006 if (gic_rdists->has_direct_lpi) { in its_init_vpe_domain()
5018 return -ENOMEM; in its_init_vpe_domain()
5021 devid = GENMASK(device_ids(its) - 1, 0); in its_init_vpe_domain()
5026 return -ENOMEM; in its_init_vpe_domain()
5029 BUG_ON(entries > vpe_proxy.dev->nr_ites); in its_init_vpe_domain()
5034 devid, vpe_proxy.dev->nr_ites); in its_init_vpe_domain()
5046 * guaranteed to be single-threaded, hence no in its_compute_its_list_map()
5053 &its->phys_base); in its_compute_its_list_map()
5054 return -EINVAL; in its_compute_its_list_map()
5057 ctlr = readl_relaxed(its->base + GITS_CTLR); in its_compute_its_list_map()
5060 writel_relaxed(ctlr, its->base + GITS_CTLR); in its_compute_its_list_map()
5061 ctlr = readl_relaxed(its->base + GITS_CTLR); in its_compute_its_list_map()
5069 &its->phys_base, its_number); in its_compute_its_list_map()
5070 return -EINVAL; in its_compute_its_list_map()
5086 if (!(its->typer & GITS_TYPER_VMOVP)) { in its_probe_one()
5091 its->list_nr = err; in its_probe_one()
5094 &its->phys_base, err); in its_probe_one()
5096 pr_info("ITS@%pa: Single VMOVP capable\n", &its->phys_base); in its_probe_one()
5100 u32 svpet = FIELD_GET(GITS_TYPER_SVPET, its->typer); in its_probe_one()
5102 its->sgir_base = ioremap(its->phys_base + SZ_128K, SZ_64K); in its_probe_one()
5103 if (!its->sgir_base) { in its_probe_one()
5104 err = -ENOMEM; in its_probe_one()
5108 its->mpidr = readl_relaxed(its->base + GITS_MPIDR); in its_probe_one()
5111 &its->phys_base, its->mpidr, svpet); in its_probe_one()
5115 page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, in its_probe_one()
5118 err = -ENOMEM; in its_probe_one()
5121 its->cmd_base = (void *)page_address(page); in its_probe_one()
5122 its->cmd_write = its->cmd_base; in its_probe_one()
5132 baser = (virt_to_phys(its->cmd_base) | in its_probe_one()
5135 (ITS_CMD_QUEUE_SZ / SZ_4K - 1) | in its_probe_one()
5138 gits_write_cbaser(baser, its->base + GITS_CBASER); in its_probe_one()
5139 tmp = gits_read_cbaser(its->base + GITS_CBASER); in its_probe_one()
5141 if (its->flags & ITS_FLAGS_FORCE_NON_SHAREABLE) in its_probe_one()
5147 * The HW reports non-shareable, we must in its_probe_one()
5154 gits_write_cbaser(baser, its->base + GITS_CBASER); in its_probe_one()
5157 its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING; in its_probe_one()
5160 gits_write_cwriter(0, its->base + GITS_CWRITER); in its_probe_one()
5161 ctlr = readl_relaxed(its->base + GITS_CTLR); in its_probe_one()
5165 writel_relaxed(ctlr, its->base + GITS_CTLR); in its_probe_one()
5172 list_add(&its->entry, &its_nodes); in its_probe_one()
5180 free_pages((unsigned long)its->cmd_base, get_order(ITS_CMD_QUEUE_SZ)); in its_probe_one()
5182 if (its->sgir_base) in its_probe_one()
5183 iounmap(its->sgir_base); in its_probe_one()
5185 pr_err("ITS@%pa: failed probing (%d)\n", &its->phys_base, err); in its_probe_one()
5202 return -ENXIO; in redist_disable_lpis()
5211 * LPIs before trying to re-enable them. They are already in redist_disable_lpis()
5216 if ((gic_data_rdist()->flags & RD_LOCAL_LPI_ENABLED) || in redist_disable_lpis()
5217 (gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED)) in redist_disable_lpis()
5243 return -ETIMEDOUT; in redist_disable_lpis()
5246 timeout--; in redist_disable_lpis()
5256 return -EBUSY; in redist_disable_lpis()
5280 cpuhp_remove_state_nocalls(gic_rdists->cpuhp_memreserve_state); in rdist_memreserve_cpuhp_cleanup_workfn()
5281 gic_rdists->cpuhp_memreserve_state = CPUHP_INVALID; in rdist_memreserve_cpuhp_cleanup_workfn()
5293 if (gic_data_rdist()->flags & RD_LOCAL_MEMRESERVE_DONE) in its_cpu_memreserve_lpi()
5296 pend_page = gic_data_rdist()->pend_page; in its_cpu_memreserve_lpi()
5298 ret = -ENOMEM; in its_cpu_memreserve_lpi()
5302 * If the pending table was pre-programmed, free the memory we in its_cpu_memreserve_lpi()
5306 if (gic_data_rdist()->flags & RD_LOCAL_PENDTABLE_PREALLOCATED) { in its_cpu_memreserve_lpi()
5308 gic_data_rdist()->pend_page = NULL; in its_cpu_memreserve_lpi()
5320 gic_data_rdist()->flags |= RD_LOCAL_MEMRESERVE_DONE; in its_cpu_memreserve_lpi()
5342 { .compatible = "arm,gic-v3-its", },
5363 raw_spin_lock_init(&its->lock); in its_node_init()
5364 mutex_init(&its->dev_alloc_lock); in its_node_init()
5365 INIT_LIST_HEAD(&its->entry); in its_node_init()
5366 INIT_LIST_HEAD(&its->its_device_list); in its_node_init()
5368 its->typer = gic_read_typer(its_base + GITS_TYPER); in its_node_init()
5369 its->base = its_base; in its_node_init()
5370 its->phys_base = res->start; in its_node_init()
5371 its->get_msi_base = its_irq_get_msi_base; in its_node_init()
5372 its->msi_domain_flags = IRQ_DOMAIN_FLAG_ISOLATED_MSI; in its_node_init()
5374 its->numa_node = numa_node; in its_node_init()
5375 its->fwnode_handle = handle; in its_node_init()
5386 iounmap(its->base); in its_node_destroy()
5405 !of_property_read_bool(np, "msi-controller") || in its_of_probe()
5420 if (!of_property_read_bool(np, "msi-controller")) { in its_of_probe()
5421 pr_warn("%pOF: no msi-controller property, ITS ignored\n", in its_of_probe()
5432 its = its_node_init(&res, &np->fwnode, of_node_to_nid(np)); in its_of_probe()
5434 return -ENOMEM; in its_of_probe()
5485 return -EINVAL; in gic_acpi_parse_srat_its()
5487 if (its_affinity->header.length < sizeof(*its_affinity)) { in gic_acpi_parse_srat_its()
5489 its_affinity->header.length); in gic_acpi_parse_srat_its()
5490 return -EINVAL; in gic_acpi_parse_srat_its()
5498 node = pxm_to_node(its_affinity->proximity_domain); in gic_acpi_parse_srat_its()
5506 its_srat_maps[its_in_srat].its_id = its_affinity->its_id; in gic_acpi_parse_srat_its()
5508 pr_info("SRAT: PXM %d -> ITS %d -> Node %d\n", in gic_acpi_parse_srat_its()
5509 its_affinity->proximity_domain, its_affinity->its_id, node); in gic_acpi_parse_srat_its()
5558 res.start = its_entry->base_address; in gic_acpi_parse_madt_its()
5559 res.end = its_entry->base_address + ACPI_GICV3_ITS_MEM_SIZE - 1; in gic_acpi_parse_madt_its()
5566 return -ENOMEM; in gic_acpi_parse_madt_its()
5569 err = iort_register_domain_token(its_entry->translation_id, res.start, in gic_acpi_parse_madt_its()
5573 &res.start, its_entry->translation_id); in gic_acpi_parse_madt_its()
5578 acpi_get_its_numa_node(its_entry->translation_id)); in gic_acpi_parse_madt_its()
5580 err = -ENOMEM; in gic_acpi_parse_madt_its()
5589 iort_deregister_domain_token(its_entry->translation_id); in gic_acpi_parse_madt_its()
5603 .start = its_entry->base_address, in its_acpi_reset()
5604 .end = its_entry->base_address + ACPI_GICV3_ITS_MEM_SIZE - 1, in its_acpi_reset()
5640 gic_rdists->cpuhp_memreserve_state = CPUHP_INVALID; in its_lpi_memreserve_init()
5648 gic_rdists->cpuhp_memreserve_state = state; in its_lpi_memreserve_init()
5673 return -ENXIO; in its_init()
5686 if (WARN_ON(!has_v4_1 && rdists->has_rvpeid)) in its_init()
5687 rdists->has_rvpeid = false; in its_init()
5689 if (has_v4 & rdists->has_vlpis) { in its_init()
5699 rdists->has_vlpis = false; in its_init()