Lines Matching full:dcfg
89 const struct imx_mu_dcfg *dcfg; member
159 status = imx_mu_read(priv, priv->dcfg->xSR[IMX_MU_TSR]); in imx_mu_tx_waiting_write()
160 can_write = status & IMX_MU_xSR_TEn(priv->dcfg->type, idx % 4); in imx_mu_tx_waiting_write()
169 imx_mu_write(priv, val, priv->dcfg->xTR + (idx % 4) * 4); in imx_mu_tx_waiting_write()
183 status = imx_mu_read(priv, priv->dcfg->xSR[IMX_MU_RSR]); in imx_mu_rx_waiting_read()
184 can_read = status & IMX_MU_xSR_RFn(priv->dcfg->type, idx % 4); in imx_mu_rx_waiting_read()
193 *val = imx_mu_read(priv, priv->dcfg->xRR + (idx % 4) * 4); in imx_mu_rx_waiting_read()
205 val = imx_mu_read(priv, priv->dcfg->xCR[type]); in imx_mu_xcr_rmw()
208 imx_mu_write(priv, val, priv->dcfg->xCR[type]); in imx_mu_xcr_rmw()
222 imx_mu_write(priv, *arg, priv->dcfg->xTR + cp->idx * 4); in imx_mu_generic_tx()
223 imx_mu_xcr_rmw(priv, IMX_MU_TCR, IMX_MU_xCR_TIEn(priv->dcfg->type, cp->idx), 0); in imx_mu_generic_tx()
226 imx_mu_xcr_rmw(priv, IMX_MU_GCR, IMX_MU_xCR_GIRn(priv->dcfg->type, cp->idx), 0); in imx_mu_generic_tx()
242 dat = imx_mu_read(priv, priv->dcfg->xRR + (cp->idx) * 4); in imx_mu_generic_rx()
251 imx_mu_write(priv, IMX_MU_xSR_GIPn(priv->dcfg->type, cp->idx), in imx_mu_generic_rxdb()
252 priv->dcfg->xSR[IMX_MU_GSR]); in imx_mu_generic_rxdb()
265 if (priv->dcfg->type & IMX_MU_V2_S4) { in imx_mu_specific_tx()
292 imx_mu_write(priv, *arg++, priv->dcfg->xTR + (i % num_tr) * 4); in imx_mu_specific_tx()
294 ret = readl_poll_timeout(priv->base + priv->dcfg->xSR[IMX_MU_TSR], in imx_mu_specific_tx()
296 xsr & IMX_MU_xSR_TEn(priv->dcfg->type, i % num_tr), in imx_mu_specific_tx()
302 imx_mu_write(priv, *arg++, priv->dcfg->xTR + (i % num_tr) * 4); in imx_mu_specific_tx()
305 imx_mu_xcr_rmw(priv, IMX_MU_TCR, IMX_MU_xCR_TIEn(priv->dcfg->type, cp->idx), 0); in imx_mu_specific_tx()
324 imx_mu_xcr_rmw(priv, IMX_MU_RCR, 0, IMX_MU_xCR_RIEn(priv->dcfg->type, 0)); in imx_mu_specific_rx()
325 *data++ = imx_mu_read(priv, priv->dcfg->xRR); in imx_mu_specific_rx()
327 if (priv->dcfg->type & IMX_MU_V2_S4) { in imx_mu_specific_rx()
341 ret = readl_poll_timeout(priv->base + priv->dcfg->xSR[IMX_MU_RSR], xsr, in imx_mu_specific_rx()
342 xsr & IMX_MU_xSR_RFn(priv->dcfg->type, i % 4), 0, in imx_mu_specific_rx()
348 *data++ = imx_mu_read(priv, priv->dcfg->xRR + (i % 4) * 4); in imx_mu_specific_rx()
351 imx_mu_xcr_rmw(priv, IMX_MU_RCR, IMX_MU_xCR_RIEn(priv->dcfg->type, 0), 0); in imx_mu_specific_rx()
387 imx_mu_write(priv, *arg++, priv->dcfg->xTR); in imx_mu_seco_tx()
392 IMX_MU_xCR_GIRn(priv->dcfg->type, cp->idx), 0); in imx_mu_seco_tx()
398 priv->dcfg->xTR + (i % 4) * 4); in imx_mu_seco_tx()
437 *data++ = imx_mu_read(priv, priv->dcfg->xRR); in imx_mu_seco_rxdb()
457 imx_mu_write(priv, IMX_MU_xSR_GIPn(priv->dcfg->type, cp->idx), in imx_mu_seco_rxdb()
458 priv->dcfg->xSR[IMX_MU_GSR]); in imx_mu_seco_rxdb()
492 ctrl = imx_mu_read(priv, priv->dcfg->xCR[IMX_MU_TCR]); in imx_mu_isr()
493 val = imx_mu_read(priv, priv->dcfg->xSR[IMX_MU_TSR]); in imx_mu_isr()
494 val &= IMX_MU_xSR_TEn(priv->dcfg->type, cp->idx) & in imx_mu_isr()
495 (ctrl & IMX_MU_xCR_TIEn(priv->dcfg->type, cp->idx)); in imx_mu_isr()
498 ctrl = imx_mu_read(priv, priv->dcfg->xCR[IMX_MU_RCR]); in imx_mu_isr()
499 val = imx_mu_read(priv, priv->dcfg->xSR[IMX_MU_RSR]); in imx_mu_isr()
500 val &= IMX_MU_xSR_RFn(priv->dcfg->type, cp->idx) & in imx_mu_isr()
501 (ctrl & IMX_MU_xCR_RIEn(priv->dcfg->type, cp->idx)); in imx_mu_isr()
504 ctrl = imx_mu_read(priv, priv->dcfg->xCR[IMX_MU_GIER]); in imx_mu_isr()
505 val = imx_mu_read(priv, priv->dcfg->xSR[IMX_MU_GSR]); in imx_mu_isr()
506 val &= IMX_MU_xSR_GIPn(priv->dcfg->type, cp->idx) & in imx_mu_isr()
507 (ctrl & IMX_MU_xCR_GIEn(priv->dcfg->type, cp->idx)); in imx_mu_isr()
520 if ((val == IMX_MU_xSR_TEn(priv->dcfg->type, cp->idx)) && in imx_mu_isr()
522 imx_mu_xcr_rmw(priv, IMX_MU_TCR, 0, IMX_MU_xCR_TIEn(priv->dcfg->type, cp->idx)); in imx_mu_isr()
524 } else if ((val == IMX_MU_xSR_RFn(priv->dcfg->type, cp->idx)) && in imx_mu_isr()
526 priv->dcfg->rx(priv, cp); in imx_mu_isr()
527 } else if ((val == IMX_MU_xSR_GIPn(priv->dcfg->type, cp->idx)) && in imx_mu_isr()
529 priv->dcfg->rxdb(priv, cp); in imx_mu_isr()
546 return priv->dcfg->tx(priv, cp, data); in imx_mu_send_data()
568 if (!(priv->dcfg->type & IMX_MU_V2_IRQ)) in imx_mu_startup()
579 imx_mu_xcr_rmw(priv, IMX_MU_RCR, IMX_MU_xCR_RIEn(priv->dcfg->type, cp->idx), 0); in imx_mu_startup()
582 imx_mu_xcr_rmw(priv, IMX_MU_GIER, IMX_MU_xCR_GIEn(priv->dcfg->type, cp->idx), 0); in imx_mu_startup()
606 imx_mu_xcr_rmw(priv, IMX_MU_TCR, 0, IMX_MU_xCR_TIEn(priv->dcfg->type, cp->idx)); in imx_mu_shutdown()
609 imx_mu_xcr_rmw(priv, IMX_MU_RCR, 0, IMX_MU_xCR_RIEn(priv->dcfg->type, cp->idx)); in imx_mu_shutdown()
612 imx_mu_xcr_rmw(priv, IMX_MU_GIER, 0, IMX_MU_xCR_GIEn(priv->dcfg->type, cp->idx)); in imx_mu_shutdown()
615 imx_mu_xcr_rmw(priv, IMX_MU_CR, IMX_MU_xCR_RST(priv->dcfg->type), 0); in imx_mu_shutdown()
616 ret = readl_poll_timeout(priv->base + priv->dcfg->xSR[IMX_MU_SR], sr, in imx_mu_shutdown()
617 !(sr & IMX_MU_xSR_RST(priv->dcfg->type)), 1, 5); in imx_mu_shutdown()
738 imx_mu_write(priv, 0, priv->dcfg->xCR[i]); in imx_mu_init_generic()
741 val = imx_mu_read(priv, priv->dcfg->xSR[IMX_MU_GSR]); in imx_mu_init_generic()
742 imx_mu_write(priv, val, priv->dcfg->xSR[IMX_MU_GSR]); in imx_mu_init_generic()
746 imx_mu_read(priv, priv->dcfg->xRR + (i % 4) * 4); in imx_mu_init_generic()
752 int num_chans = priv->dcfg->type & IMX_MU_V2_S4 ? IMX_MU_S4_CHANS : IMX_MU_SCU_CHANS; in imx_mu_init_specific()
770 imx_mu_write(priv, 0, priv->dcfg->xCR[i]); in imx_mu_init_specific()
784 const struct imx_mu_dcfg *dcfg; in imx_mu_probe() local
798 dcfg = of_device_get_match_data(dev); in imx_mu_probe()
799 if (!dcfg) in imx_mu_probe()
801 priv->dcfg = dcfg; in imx_mu_probe()
802 if (priv->dcfg->type & IMX_MU_V2_IRQ) { in imx_mu_probe()
818 if (priv->dcfg->type & IMX_MU_V2_S4) in imx_mu_probe()
843 priv->dcfg->init(priv); in imx_mu_probe()
986 priv->xcr[i] = imx_mu_read(priv, priv->dcfg->xCR[i]); in imx_mu_suspend_noirq()
1007 if (!priv->clk && !imx_mu_read(priv, priv->dcfg->xCR[0])) { in imx_mu_resume_noirq()
1009 imx_mu_write(priv, priv->xcr[i], priv->dcfg->xCR[i]); in imx_mu_resume_noirq()